3408509f | 20-Mar-2017 |
Heiko Stübner <heiko@sntech.de> |
rockchip: rk3188: sdram: Set correct sdram base
Right now we're setting the wrong value of 0 as base in the ram_info struct, which is obviously wrong for the rk3188. So instead set the correct value
rockchip: rk3188: sdram: Set correct sdram base
Right now we're setting the wrong value of 0 as base in the ram_info struct, which is obviously wrong for the rk3188. So instead set the correct value we already have in CONFIG_SYS_SDRAM_BASE.
Signed-off-by: Heiko Stuebner <heiko@sntech.de> Acked-by: Simon Glass <sjg@chromium.org>
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3e747197 | 18-Feb-2017 |
Heiko Stübner <heiko@sntech.de> |
rockchip: rk3188: Add sdram driver
The sdram controller blocks are very similar to the rk3288 in utilizing memory scheduler, Designware uPCTL and Designware PUBL blocks, only limited to one bank ins
rockchip: rk3188: Add sdram driver
The sdram controller blocks are very similar to the rk3288 in utilizing memory scheduler, Designware uPCTL and Designware PUBL blocks, only limited to one bank instead of two.
There are some minimal differences when setting up the ram, so it gets a separate driver for the rk3188 but reuses the driver structs, as there is no need to define the same again.
More optimization can happen when the modelling of the controller parts in the dts actually follow the hardware layout hopefully at some point in the future.
Signed-off-by: Heiko Stuebner <heiko@sntech.de> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Kever Yang <kever.yang@rock-chips.com>
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