xref: /openbmc/u-boot/arch/arm/mach-socfpga/reset_manager.c (revision 83d290c56fab2d38cd1ab4c4cc7099559c1d5046)
1 // SPDX-License-Identifier: GPL-2.0+
2 /*
3  *  Copyright (C) 2013 Altera Corporation <www.altera.com>
4  */
5 
6 
7 #include <common.h>
8 #include <asm/io.h>
9 #include <asm/arch/reset_manager.h>
10 
11 static const struct socfpga_reset_manager *reset_manager_base =
12 		(void *)SOCFPGA_RSTMGR_ADDRESS;
13 
14 /*
15  * Write the reset manager register to cause reset
16  */
17 void reset_cpu(ulong addr)
18 {
19 	/* request a warm reset */
20 	writel(1 << RSTMGR_CTRL_SWWARMRSTREQ_LSB,
21 	       &reset_manager_base->ctrl);
22 	/*
23 	 * infinite loop here as watchdog will trigger and reset
24 	 * the processor
25 	 */
26 	while (1)
27 		;
28 }
29