History log of /openbmc/linux/arch/arm64/boot/dts/qcom/sc7280.dtsi (Results 151 – 172 of 172)
Revision Date Author Comments
# 4cbb02fa 20-Jul-2021 Sibi Sankar <sibis@codeaurora.org>

arm64: dts: qcom: sc7280: Fixup cpufreq domain info for cpu7

The SC7280 SoC supports a 4-Silver/3-Gold/1-Gold+ configuration and hence
the cpu7 node should point to cpufreq domain 2 instead.

Fixes:

arm64: dts: qcom: sc7280: Fixup cpufreq domain info for cpu7

The SC7280 SoC supports a 4-Silver/3-Gold/1-Gold+ configuration and hence
the cpu7 node should point to cpufreq domain 2 instead.

Fixes: 7dbd121a2c58 ("arm64: dts: qcom: sc7280: Add cpufreq hw node")
Signed-off-by: Sibi Sankar <sibis@codeaurora.org>
Link: https://lore.kernel.org/r/1626800953-613-1-git-send-email-sibis@codeaurora.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>

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# 1c39e6f9 06-Jul-2021 Sandeep Maheswaram <sanm@codeaurora.org>

arm64: dts: qcom: sc7280: Add USB related nodes

Add nodes for DWC3 USB controller, QMP and HS USB PHYs in sc7280 SOC.

Signed-off-by: Sandeep Maheswaram <sanm@codeaurora.org>
Reviewed-by: Matthias K

arm64: dts: qcom: sc7280: Add USB related nodes

Add nodes for DWC3 USB controller, QMP and HS USB PHYs in sc7280 SOC.

Signed-off-by: Sandeep Maheswaram <sanm@codeaurora.org>
Reviewed-by: Matthias Kaehlcke <mka@chromium.org>
Reviewed-by: Stephen Boyd <swboyd@chromium.org>
Link: https://lore.kernel.org/r/1625576413-12324-3-git-send-email-sanm@codeaurora.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>

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# 298c81a7 13-Jul-2021 Shaik Sajida Bhanu <sbhanu@codeaurora.org>

arm64: dts: qcom: sc7280: Add nodes for eMMC and SD card

Add nodes for eMMC and SD card on sc7280.

Signed-off-by: Shaik Sajida Bhanu <sbhanu@codeaurora.org>
Reviewed-by: Stephen Boyd <swboyd@chromi

arm64: dts: qcom: sc7280: Add nodes for eMMC and SD card

Add nodes for eMMC and SD card on sc7280.

Signed-off-by: Shaik Sajida Bhanu <sbhanu@codeaurora.org>
Reviewed-by: Stephen Boyd <swboyd@chromium.org>
Link: https://lore.kernel.org/r/1626159971-22519-1-git-send-email-sbhanu@codeaurora.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>

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# 297e6e38 27-Apr-2021 Odelu Kukatla <okukatla@codeaurora.org>

arm64: dts: sc7280: Add interconnect provider DT nodes

Add the DT nodes for the network-on-chip interconnect buses found
on sc7280-based platforms.

Signed-off-by: Odelu Kukatla <okukatla@codeaurora

arm64: dts: sc7280: Add interconnect provider DT nodes

Add the DT nodes for the network-on-chip interconnect buses found
on sc7280-based platforms.

Signed-off-by: Odelu Kukatla <okukatla@codeaurora.org>
Link: https://lore.kernel.org/r/1619517059-12109-4-git-send-email-okukatla@codeaurora.org
[bjorn: Sorted nodes and dropped include]
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>

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# c3bbe55c 27-Apr-2021 Sibi Sankar <sibis@codeaurora.org>

arm64: dts: qcom: sc7280: Add nodes to boot WPSS

Add miscellaneous nodes to boot the Wireless Processor Subsystem (WPSS) on
SC7280 SoCs.

Signed-off-by: Sibi Sankar <sibis@codeaurora.org>
Link: http

arm64: dts: qcom: sc7280: Add nodes to boot WPSS

Add miscellaneous nodes to boot the Wireless Processor Subsystem (WPSS) on
SC7280 SoCs.

Signed-off-by: Sibi Sankar <sibis@codeaurora.org>
Link: https://lore.kernel.org/r/1619508824-14413-6-git-send-email-sibis@codeaurora.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>

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# 422a2952 09-Apr-2021 Taniya Das <tdas@codeaurora.org>

arm64: dts: qcom: sc7280: Add clock controller nodes

Add support for the video, gpu, display, lpass clock controller
device nodes for SC7280 SoC.

Signed-off-by: Taniya Das <tdas@codeaurora.org>
Lin

arm64: dts: qcom: sc7280: Add clock controller nodes

Add support for the video, gpu, display, lpass clock controller
device nodes for SC7280 SoC.

Signed-off-by: Taniya Das <tdas@codeaurora.org>
Link: https://lore.kernel.org/r/1618020280-5470-3-git-send-email-tdas@codeaurora.org
[bjorn: Dropped includes, as they are not present in v5.13-rc1]
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>

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# 7dbd121a 09-Apr-2021 Taniya Das <tdas@codeaurora.org>

arm64: dts: qcom: sc7280: Add cpufreq hw node

Add cpufreq HW device node to scale 4-Silver/3-Gold/1-Gold+
cores on SC7280 SoCs.

Reviewed-by: Matthias Kaehlcke <mka@chromium.org>
Signed-off-by: Tani

arm64: dts: qcom: sc7280: Add cpufreq hw node

Add cpufreq HW device node to scale 4-Silver/3-Gold/1-Gold+
cores on SC7280 SoCs.

Reviewed-by: Matthias Kaehlcke <mka@chromium.org>
Signed-off-by: Taniya Das <tdas@codeaurora.org>
Link: https://lore.kernel.org/r/1618020280-5470-2-git-send-email-tdas@codeaurora.org
[bjorn: Dropped reg-names]
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>

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# 9ec1c586 07-May-2021 Rajeshwari Ravindra Kamble <rkambl@codeaurora.org>

arm64: dts: qcom: SC7280: Add thermal zone support

Adding thermal zone and cooling maps support in SC7280.

Reviewed-by: Matthias Kaehlcke <mka@chromium.org>
Signed-off-by: Rajeshwari Ravindra Kambl

arm64: dts: qcom: SC7280: Add thermal zone support

Adding thermal zone and cooling maps support in SC7280.

Reviewed-by: Matthias Kaehlcke <mka@chromium.org>
Signed-off-by: Rajeshwari Ravindra Kamble <rkambl@codeaurora.org>
Link: https://lore.kernel.org/r/1620367641-23383-4-git-send-email-rkambl@codeaurora.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>

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# 132f5a8d 07-May-2021 Rajeshwari Ravindra Kamble <rkambl@codeaurora.org>

arm64: dts: qcom: SC7280: Add device node support for TSENS

Adding device node for TSENS controller and critical interrupt support in SC7280.

Signed-off-by: Rajeshwari Ravindra Kamble <rkambl@codea

arm64: dts: qcom: SC7280: Add device node support for TSENS

Adding device node for TSENS controller and critical interrupt support in SC7280.

Signed-off-by: Rajeshwari Ravindra Kamble <rkambl@codeaurora.org>
Reviewed-by: Matthias Kaehlcke <mka@chromium.org>
Link: https://lore.kernel.org/r/1620367641-23383-3-git-send-email-rkambl@codeaurora.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>

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# 544cebe1 15-Mar-2021 Sai Prakash Ranjan <saiprakash.ranjan@codeaurora.org>

arm64: dts: qcom: sc7280: Add Coresight support

Add coresight components found on SC7280 SoC.

Cc: Mathieu Poirier <mathieu.poirier@linaro.org>
Cc: Suzuki K Poulose <suzuki.poulose@arm.com>
Cc: Mike

arm64: dts: qcom: sc7280: Add Coresight support

Add coresight components found on SC7280 SoC.

Cc: Mathieu Poirier <mathieu.poirier@linaro.org>
Cc: Suzuki K Poulose <suzuki.poulose@arm.com>
Cc: Mike Leach <mike.leach@linaro.org>
Cc: Leo Yan <leo.yan@linaro.org>
Signed-off-by: Sai Prakash Ranjan <saiprakash.ranjan@codeaurora.org>
Link: https://lore.kernel.org/r/de07324628f88900b72357f4ef7f0c7db7e3409d.1615832893.git.saiprakash.ranjan@codeaurora.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>

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# 208979a8 15-Mar-2021 Sai Prakash Ranjan <saiprakash.ranjan@codeaurora.org>

arm64: dts: qcom: sc7280: Add AOSS QMP node

Add a DT node for the AOSS QMP on SC7280 SoC.

Signed-off-by: Sai Prakash Ranjan <saiprakash.ranjan@codeaurora.org>
Link: https://lore.kernel.org/r/12f013

arm64: dts: qcom: sc7280: Add AOSS QMP node

Add a DT node for the AOSS QMP on SC7280 SoC.

Signed-off-by: Sai Prakash Ranjan <saiprakash.ranjan@codeaurora.org>
Link: https://lore.kernel.org/r/12f013a09989dbc3075bfb204653dc02d54ae8a1.1615832893.git.saiprakash.ranjan@codeaurora.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>

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# 2257fac9 15-Mar-2021 Sai Prakash Ranjan <saiprakash.ranjan@codeaurora.org>

arm64: dts: qcom: sc7280: Add IPCC for SC7280 SoC

Add the IPCC DT node which is used to send and receive IPC
signals with remoteprocs for SC7280 SoC.

Cc: Manivannan Sadhasivam <manivannan.sadhasiva

arm64: dts: qcom: sc7280: Add IPCC for SC7280 SoC

Add the IPCC DT node which is used to send and receive IPC
signals with remoteprocs for SC7280 SoC.

Cc: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Cc: Jassi Brar <jaswinder.singh@linaro.org>
Signed-off-by: Sai Prakash Ranjan <saiprakash.ranjan@codeaurora.org>
Reviewed-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Reviewed-by: Stephen Boyd <swboyd@chromium.org>
Link: https://lore.kernel.org/r/8374f407386209d2e7891763de3fa2450a14ad60.1615832893.git.saiprakash.ranjan@codeaurora.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>

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# 0392968d 15-Mar-2021 Sai Prakash Ranjan <saiprakash.ranjan@codeaurora.org>

arm64: dts: qcom: sc7280: Add device tree node for LLCC

Add a DT node for Last level cache (aka. system cache)
controller which provides control over the last level
cache present on SC7280 SoC.

Sig

arm64: dts: qcom: sc7280: Add device tree node for LLCC

Add a DT node for Last level cache (aka. system cache)
controller which provides control over the last level
cache present on SC7280 SoC.

Signed-off-by: Sai Prakash Ranjan <saiprakash.ranjan@codeaurora.org>
Reviewed-by: Stephen Boyd <swboyd@chromium.org>
Link: https://lore.kernel.org/r/5bacaa8350e0d9553dccd623a15513590e795b47.1615832893.git.saiprakash.ranjan@codeaurora.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>

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# 1608784b 11-Mar-2021 Rajendra Nayak <rnayak@codeaurora.org>

arm64: dts: qcom: sc7280: Add rpmh power-domain node

Add the DT node for the rpmhpd power controller on SC7280 SoCs.

Signed-off-by: Rajendra Nayak <rnayak@codeaurora.org>
Reviewed-by: Stephen Boyd

arm64: dts: qcom: sc7280: Add rpmh power-domain node

Add the DT node for the rpmhpd power controller on SC7280 SoCs.

Signed-off-by: Rajendra Nayak <rnayak@codeaurora.org>
Reviewed-by: Stephen Boyd <swboyd@chromium.org>
Link: https://lore.kernel.org/r/1615461961-17716-15-git-send-email-rnayak@codeaurora.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>

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# 0ef5463c 11-Mar-2021 Maulik Shah <mkshah@codeaurora.org>

arm64: dts: qcom: sc7280: Add cpuidle states

Add cpuidle states for little and big cpus.
The latency values are preliminary placeholders and will be updated
once testing provides the real numbers.

arm64: dts: qcom: sc7280: Add cpuidle states

Add cpuidle states for little and big cpus.
The latency values are preliminary placeholders and will be updated
once testing provides the real numbers.

Signed-off-by: Maulik Shah <mkshah@codeaurora.org>
Signed-off-by: Rajendra Nayak <rnayak@codeaurora.org>
Reviewed-by: Stephen Boyd <swboyd@chromium.org>
Link: https://lore.kernel.org/r/1615461961-17716-14-git-send-email-rnayak@codeaurora.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>

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# 14abf8df 11-Mar-2021 satya priya <skakit@codeaurora.org>

arm64: dts: qcom: sc7280: Add SPMI PMIC arbiter device for SC7280

Add SPMI PMIC arbiter device to communicate with PMICs
attached to SPMI bus.

Signed-off-by: satya priya <skakit@codeaurora.org>
Sig

arm64: dts: qcom: sc7280: Add SPMI PMIC arbiter device for SC7280

Add SPMI PMIC arbiter device to communicate with PMICs
attached to SPMI bus.

Signed-off-by: satya priya <skakit@codeaurora.org>
Signed-off-by: Rajendra Nayak <rnayak@codeaurora.org>
Link: https://lore.kernel.org/r/1615461961-17716-13-git-send-email-rnayak@codeaurora.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>

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# 0e51f883 11-Mar-2021 Sai Prakash Ranjan <saiprakash.ranjan@codeaurora.org>

arm64: dts: qcom: sc7280: Add APSS watchdog node

Add APSS (Application Processor Subsystem) watchdog
DT node for SC7280 SoC.

Signed-off-by: Sai Prakash Ranjan <saiprakash.ranjan@codeaurora.org>
Sig

arm64: dts: qcom: sc7280: Add APSS watchdog node

Add APSS (Application Processor Subsystem) watchdog
DT node for SC7280 SoC.

Signed-off-by: Sai Prakash Ranjan <saiprakash.ranjan@codeaurora.org>
Signed-off-by: Rajendra Nayak <rnayak@codeaurora.org>
Reviewed-by: Stephen Boyd <swboyd@chromium.org>
Link: https://lore.kernel.org/r/1615461961-17716-12-git-send-email-rnayak@codeaurora.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>

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# e9d73974 11-Mar-2021 Maulik Shah <mkshah@codeaurora.org>

arm64: dts: qcom: sc7280: Add reserved memory for fw

Add fw reserved memory area for CPUCP (CPUSS control
processor) and AOP (Always ON processor)

Signed-off-by: Maulik Shah <mkshah@codeaurora.org>

arm64: dts: qcom: sc7280: Add reserved memory for fw

Add fw reserved memory area for CPUCP (CPUSS control
processor) and AOP (Always ON processor)

Signed-off-by: Maulik Shah <mkshah@codeaurora.org>
Signed-off-by: Rajendra Nayak <rnayak@codeaurora.org>
Link: https://lore.kernel.org/r/1615461961-17716-10-git-send-email-rnayak@codeaurora.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>

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# c73ed104 11-Mar-2021 Sai Prakash Ranjan <saiprakash.ranjan@codeaurora.org>

arm64: dts: qcom: sc7280: Add device node for APPS SMMU

Adding device node for APPS SMMU available on SC7280 chipset.
This is shared among the multiple client devices such as
display, video, usb, mm

arm64: dts: qcom: sc7280: Add device node for APPS SMMU

Adding device node for APPS SMMU available on SC7280 chipset.
This is shared among the multiple client devices such as
display, video, usb, mmc and others.

Signed-off-by: Sai Prakash Ranjan <saiprakash.ranjan@codeaurora.org>
Signed-off-by: Rajendra Nayak <rnayak@codeaurora.org>
Link: https://lore.kernel.org/r/1615461961-17716-9-git-send-email-rnayak@codeaurora.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>

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# ab7772de 11-Mar-2021 Rajendra Nayak <rnayak@codeaurora.org>

arm64: dts: qcom: SC7280: Add rpmhcc clock controller node

Add rpmhcc clock controller node for SC7280. Also add references to
rpmhcc clocks in gcc.

Signed-off-by: Taniya Das <tdas@codeaurora.org>

arm64: dts: qcom: SC7280: Add rpmhcc clock controller node

Add rpmhcc clock controller node for SC7280. Also add references to
rpmhcc clocks in gcc.

Signed-off-by: Taniya Das <tdas@codeaurora.org>
Signed-off-by: Rajendra Nayak <rnayak@codeaurora.org>
Reviewed-by: Stephen Boyd <swboyd@chromium.org>
Link: https://lore.kernel.org/r/1615461961-17716-7-git-send-email-rnayak@codeaurora.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>

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# 3450bb5b 11-Mar-2021 Maulik Shah <mkshah@codeaurora.org>

arm64: dts: qcom: sc7280: Add RSC and PDC devices

Add PDC interrupt controller along with apps RSC device.
Also add reserved memory for command_db.

Signed-off-by: Maulik Shah <mkshah@codeaurora.org

arm64: dts: qcom: sc7280: Add RSC and PDC devices

Add PDC interrupt controller along with apps RSC device.
Also add reserved memory for command_db.

Signed-off-by: Maulik Shah <mkshah@codeaurora.org>
Signed-off-by: Rajendra Nayak <rnayak@codeaurora.org>
Link: https://lore.kernel.org/r/1615461961-17716-6-git-send-email-rnayak@codeaurora.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>

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# 7a1f4e7f 11-Mar-2021 Rajendra Nayak <rnayak@codeaurora.org>

arm64: dts: qcom: sc7280: Add basic dts/dtsi files for sc7280 soc

Add initial device tree support for the sc7280 SoC and the IDP
boards based on this SoC

Signed-off-by: Rajendra Nayak <rnayak@codea

arm64: dts: qcom: sc7280: Add basic dts/dtsi files for sc7280 soc

Add initial device tree support for the sc7280 SoC and the IDP
boards based on this SoC

Signed-off-by: Rajendra Nayak <rnayak@codeaurora.org>
Reviewed-by: Stephen Boyd <swboyd@chromium.org>
Link: https://lore.kernel.org/r/1615461961-17716-4-git-send-email-rnayak@codeaurora.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>

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