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Searched refs:SDHCI_CLOCK_CONTROL (Results 1 – 24 of 24) sorted by relevance

/openbmc/linux/drivers/mmc/host/
H A Dsdhci-milbeaut.c92 clk = sdhci_readw(host, SDHCI_CLOCK_CONTROL); in sdhci_milbeaut_reset()
94 sdhci_writew(host, clk, SDHCI_CLOCK_CONTROL); in sdhci_milbeaut_reset()
99 sdhci_writew(host, clk, SDHCI_CLOCK_CONTROL); in sdhci_milbeaut_reset()
105 clk = sdhci_readw(host, SDHCI_CLOCK_CONTROL); in sdhci_milbeaut_reset()
218 ctl = sdhci_readw(host, SDHCI_CLOCK_CONTROL); in sdhci_milbeaut_init()
220 sdhci_writew(host, ctl, SDHCI_CLOCK_CONTROL); in sdhci_milbeaut_init()
H A Dsdhci-pci-o2micro.c260 sdhci_writeb(host, 0, SDHCI_CLOCK_CONTROL); in sdhci_o2_dll_recovery()
277 sdhci_writeb(host, scratch_8, SDHCI_CLOCK_CONTROL); in sdhci_o2_dll_recovery()
288 SDHCI_CLOCK_CONTROL); in sdhci_o2_dll_recovery()
350 reg_val = sdhci_readw(host, SDHCI_CLOCK_CONTROL); in sdhci_o2_execute_tuning()
352 sdhci_writew(host, reg_val, SDHCI_CLOCK_CONTROL); in sdhci_o2_execute_tuning()
374 reg_val = sdhci_readw(host, SDHCI_CLOCK_CONTROL); in sdhci_o2_execute_tuning()
376 sdhci_writew(host, reg_val, SDHCI_CLOCK_CONTROL); in sdhci_o2_execute_tuning()
569 sdhci_writew(host, clk, SDHCI_CLOCK_CONTROL); in sdhci_o2_enable_clk()
574 sdhci_writew(host, clk, SDHCI_CLOCK_CONTROL); in sdhci_o2_enable_clk()
589 sdhci_writew(host, 0, SDHCI_CLOCK_CONTROL); in sdhci_pci_o2_set_clock()
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H A Dsdhci-of-at91.c76 clk = sdhci_readw(host, SDHCI_CLOCK_CONTROL); in sdhci_at91_set_clock()
78 sdhci_writew(host, clk, SDHCI_CLOCK_CONTROL); in sdhci_at91_set_clock()
86 sdhci_writew(host, clk, SDHCI_CLOCK_CONTROL); in sdhci_at91_set_clock()
90 1000, 20000, false, host, SDHCI_CLOCK_CONTROL)) { in sdhci_at91_set_clock()
97 sdhci_writew(host, clk, SDHCI_CLOCK_CONTROL); in sdhci_at91_set_clock()
H A Dsdhci-s3c.c268 writew(0, host->ioaddr + SDHCI_CLOCK_CONTROL); in sdhci_s3c_set_clock()
379 sdhci_writew(host, 0, SDHCI_CLOCK_CONTROL); in sdhci_cmu_set_clock()
386 clk = sdhci_readw(host, SDHCI_CLOCK_CONTROL); in sdhci_cmu_set_clock()
388 sdhci_writew(host, clk, SDHCI_CLOCK_CONTROL); in sdhci_cmu_set_clock()
398 sdhci_writew(host, clk, SDHCI_CLOCK_CONTROL); in sdhci_cmu_set_clock()
402 while (!((clk = sdhci_readw(host, SDHCI_CLOCK_CONTROL)) in sdhci_cmu_set_clock()
414 sdhci_writew(host, clk, SDHCI_CLOCK_CONTROL); in sdhci_cmu_set_clock()
H A Dsdhci-pci-gli.c528 sdhci_writew(host, 0, SDHCI_CLOCK_CONTROL); in sdhci_gl9750_set_clock()
727 sdhci_writew(host, 0, SDHCI_CLOCK_CONTROL); in sdhci_gl9755_set_clock()
933 sdhci_writew(host, 0, SDHCI_CLOCK_CONTROL); in sdhci_gl9767_set_clock()
1042 value = sdhci_readw(host, SDHCI_CLOCK_CONTROL); in gl9767_init_sd_express()
1044 sdhci_writew(host, value, SDHCI_CLOCK_CONTROL); in gl9767_init_sd_express()
1076 value = sdhci_readw(host, SDHCI_CLOCK_CONTROL); in gl9767_init_sd_express()
1078 sdhci_writew(host, value, SDHCI_CLOCK_CONTROL); in gl9767_init_sd_express()
1391 clock = sdhci_readw(host, SDHCI_CLOCK_CONTROL); in gl9763e_runtime_suspend()
1393 sdhci_writew(host, clock, SDHCI_CLOCK_CONTROL); in gl9763e_runtime_suspend()
1407 clock = sdhci_readw(host, SDHCI_CLOCK_CONTROL); in gl9763e_runtime_resume()
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H A Dsdhci-sprd.c178 u16 ctrl = sdhci_readw(host, SDHCI_CLOCK_CONTROL); in sdhci_sprd_sd_clk_off()
181 sdhci_writew(host, ctrl, SDHCI_CLOCK_CONTROL); in sdhci_sprd_sd_clk_off()
188 ctrl = sdhci_readw(host, SDHCI_CLOCK_CONTROL); in sdhci_sprd_sd_clk_on()
190 sdhci_writew(host, ctrl, SDHCI_CLOCK_CONTROL); in sdhci_sprd_sd_clk_on()
236 sdhci_writew(host, 0, SDHCI_CLOCK_CONTROL); in _sdhci_sprd_set_clock()
296 sdhci_writew(host, 0, SDHCI_CLOCK_CONTROL); in sdhci_sprd_set_clock()
H A Dsdhci-xenon-phy.c228 1100, 20000, false, host, SDHCI_CLOCK_CONTROL); in xenon_check_stability_internal_clk()
639 reg = sdhci_readl(host, SDHCI_CLOCK_CONTROL); in xenon_emmc_phy_set()
641 sdhci_writew(host, reg, SDHCI_CLOCK_CONTROL); in xenon_emmc_phy_set()
663 reg = sdhci_readl(host, SDHCI_CLOCK_CONTROL); in xenon_emmc_phy_set()
665 sdhci_writew(host, reg, SDHCI_CLOCK_CONTROL); in xenon_emmc_phy_set()
H A Dsdhci_f_sdh30.c77 if (sdhci_readw(host, SDHCI_CLOCK_CONTROL) == 0) in sdhci_f_sdh30_reset()
78 sdhci_writew(host, 0xBC01, SDHCI_CLOCK_CONTROL); in sdhci_f_sdh30_reset()
H A Dsdhci-of-dwcmshc.c591 ctrl = sdhci_readw(host, SDHCI_CLOCK_CONTROL); in dwcmshc_disable_card_clk()
594 sdhci_writew(host, ctrl, SDHCI_CLOCK_CONTROL); in dwcmshc_disable_card_clk()
697 ctrl = sdhci_readw(host, SDHCI_CLOCK_CONTROL); in dwcmshc_enable_card_clk()
700 sdhci_writew(host, ctrl, SDHCI_CLOCK_CONTROL); in dwcmshc_enable_card_clk()
H A Dsdhci-pci-dwc-mshc.c70 sdhci_writew(host, clk, SDHCI_CLOCK_CONTROL); in sdhci_snps_set_clock()
H A Dsdhci-xenon.c30 reg = sdhci_readl(host, SDHCI_CLOCK_CONTROL); in xenon_enable_internal_clk()
32 sdhci_writel(host, reg, SDHCI_CLOCK_CONTROL); in xenon_enable_internal_clk()
38 reg = sdhci_readw(host, SDHCI_CLOCK_CONTROL); in xenon_enable_internal_clk()
H A Dsdhci-of-arasan.c413 sdhci_writew(host, 0, SDHCI_CLOCK_CONTROL); in sdhci_arasan_set_clock()
418 sdhci_writew(host, 0, SDHCI_CLOCK_CONTROL); in sdhci_arasan_set_clock()
1088 clk = sdhci_readw(host, SDHCI_CLOCK_CONTROL); in arasan_zynqmp_dll_reset()
1090 sdhci_writew(host, clk, SDHCI_CLOCK_CONTROL); in arasan_zynqmp_dll_reset()
1095 clk = sdhci_readw(host, SDHCI_CLOCK_CONTROL); in arasan_zynqmp_dll_reset()
H A Dsdhci.c75 sdhci_readw(host, SDHCI_CLOCK_CONTROL)); in sdhci_dumpregs()
1898 clk = sdhci_readw(host, SDHCI_CLOCK_CONTROL); in sdhci_calc_clk()
1983 sdhci_writew(host, clk, SDHCI_CLOCK_CONTROL); in sdhci_enable_clk()
1990 clk = sdhci_readw(host, SDHCI_CLOCK_CONTROL); in sdhci_enable_clk()
2006 sdhci_writew(host, clk, SDHCI_CLOCK_CONTROL); in sdhci_enable_clk()
2013 clk = sdhci_readw(host, SDHCI_CLOCK_CONTROL); in sdhci_enable_clk()
2028 sdhci_writew(host, clk, SDHCI_CLOCK_CONTROL); in sdhci_enable_clk()
2038 sdhci_writew(host, 0, SDHCI_CLOCK_CONTROL); in sdhci_set_clock()
2417 clk = sdhci_readw(host, SDHCI_CLOCK_CONTROL); in sdhci_set_ios()
2420 sdhci_writew(host, clk, SDHCI_CLOCK_CONTROL); in sdhci_set_ios()
H A Dsdhci-brcmstb.c90 sdhci_writew(host, clk, SDHCI_CLOCK_CONTROL); in sdhci_brcmstb_set_clock()
H A Dsdhci-esdhc-mcf.c274 esdhc_clrset_be(host, 0x0000fff7, temp, SDHCI_CLOCK_CONTROL); in esdhc_mcf_pltfm_set_clock()
H A Dsdhci-of-aspeed.c249 sdhci_writew(host, 0, SDHCI_CLOCK_CONTROL); in aspeed_sdhci_set_clock()
H A Dsdhci.h117 #define SDHCI_CLOCK_CONTROL 0x2C macro
H A Dsdhci-tegra.c256 reg = sdhci_readw(host, SDHCI_CLOCK_CONTROL); in tegra_sdhci_configure_card_clk()
267 sdhci_writew(host, reg, SDHCI_CLOCK_CONTROL); in tegra_sdhci_configure_card_clk()
H A Dsdhci-msm.c1770 sdhci_writew(host, 0, SDHCI_CLOCK_CONTROL); in __sdhci_msm_set_clock()
1780 clk = sdhci_readw(host, SDHCI_CLOCK_CONTROL); in __sdhci_msm_set_clock()
H A Dsdhci-esdhc-imx.c696 case SDHCI_CLOCK_CONTROL: in esdhc_writew_le()
/openbmc/u-boot/drivers/mmc/
H A Dzynq_sdhci.c63 clk = sdhci_readw(host, SDHCI_CLOCK_CONTROL); in arasan_zynqmp_dll_reset()
65 sdhci_writew(host, clk, SDHCI_CLOCK_CONTROL); in arasan_zynqmp_dll_reset()
72 while (!((clk = sdhci_readw(host, SDHCI_CLOCK_CONTROL)) in arasan_zynqmp_dll_reset()
84 sdhci_writew(host, clk, SDHCI_CLOCK_CONTROL); in arasan_zynqmp_dll_reset()
H A Dxenon_sdhci.c153 var = sdhci_readl(host, SDHCI_CLOCK_CONTROL); in xenon_mmc_phy_init()
246 var = sdhci_readl(host, SDHCI_CLOCK_CONTROL); in xenon_mmc_phy_set()
248 sdhci_writew(host, var, SDHCI_CLOCK_CONTROL); in xenon_mmc_phy_set()
260 var = sdhci_readl(host, SDHCI_CLOCK_CONTROL); in xenon_mmc_phy_set()
262 sdhci_writew(host, var, SDHCI_CLOCK_CONTROL); in xenon_mmc_phy_set()
H A Dsdhci.c348 sdhci_writew(host, 0, SDHCI_CLOCK_CONTROL);
403 sdhci_writew(host, clk, SDHCI_CLOCK_CONTROL);
407 while (!((clk = sdhci_readw(host, SDHCI_CLOCK_CONTROL))
419 sdhci_writew(host, clk, SDHCI_CLOCK_CONTROL);
/openbmc/u-boot/include/
H A Dsdhci.h93 #define SDHCI_CLOCK_CONTROL 0x2C macro