Revision tags: v6.6.25, v6.6.24, v6.6.23 |
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#
15279912 |
| 19-Mar-2024 |
Liming Sun <limings@nvidia.com> |
sdhci-of-dwcmshc: disable PM runtime in dwcmshc_remove()
commit 03749309909935070253accab314288d332a204d upstream.
This commit disables PM runtime in dwcmshc_remove() to avoid the error message bel
sdhci-of-dwcmshc: disable PM runtime in dwcmshc_remove()
commit 03749309909935070253accab314288d332a204d upstream.
This commit disables PM runtime in dwcmshc_remove() to avoid the error message below when reloading the sdhci-of-dwcmshc.ko
sdhci-dwcmshc MLNXBF30:00: Unbalanced pm_runtime_enable!
Fixes: 48fe8fadbe5e ("mmc: sdhci-of-dwcmshc: Add runtime PM operations") Reviewed-by: David Thompson <davthompson@nvidia.com> Signed-off-by: Liming Sun <limings@nvidia.com> Acked-by: Adrian Hunter <adrian.hunter@intel.com> Cc: stable@vger.kernel.org Link: https://lore.kernel.org/r/b9155963ffb12d18375002bf9ac9a3f98b727fc8.1710854108.git.limings@nvidia.com Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
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Revision tags: v6.6.25, v6.6.24, v6.6.23 |
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#
15279912 |
| 19-Mar-2024 |
Liming Sun <limings@nvidia.com> |
sdhci-of-dwcmshc: disable PM runtime in dwcmshc_remove()
commit 03749309909935070253accab314288d332a204d upstream.
This commit disables PM runtime in dwcmshc_remove() to avoid the error message bel
sdhci-of-dwcmshc: disable PM runtime in dwcmshc_remove()
commit 03749309909935070253accab314288d332a204d upstream.
This commit disables PM runtime in dwcmshc_remove() to avoid the error message below when reloading the sdhci-of-dwcmshc.ko
sdhci-dwcmshc MLNXBF30:00: Unbalanced pm_runtime_enable!
Fixes: 48fe8fadbe5e ("mmc: sdhci-of-dwcmshc: Add runtime PM operations") Reviewed-by: David Thompson <davthompson@nvidia.com> Signed-off-by: Liming Sun <limings@nvidia.com> Acked-by: Adrian Hunter <adrian.hunter@intel.com> Cc: stable@vger.kernel.org Link: https://lore.kernel.org/r/b9155963ffb12d18375002bf9ac9a3f98b727fc8.1710854108.git.limings@nvidia.com Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
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Revision tags: v6.6.16, v6.6.15, v6.6.14, v6.6.13, v6.6.12, v6.6.11, v6.6.10, v6.6.9, v6.6.8, v6.6.7, v6.6.6, v6.6.5, v6.6.4, v6.6.3, v6.6.2, v6.5.11, v6.6.1, v6.5.10, v6.6, v6.5.9, v6.5.8, v6.5.7, v6.5.6, v6.5.5, v6.5.4, v6.5.3, v6.5.2, v6.1.51, v6.5.1, v6.1.50, v6.5, v6.1.49, v6.1.48 |
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48fe8fad |
| 22-Aug-2023 |
Liming Sun <limings@nvidia.com> |
mmc: sdhci-of-dwcmshc: Add runtime PM operations
This commit implements the runtime PM operations to disable eMMC card clock when idle.
Reviewed-by: David Thompson <davthompson@nvidia.com> Signed-o
mmc: sdhci-of-dwcmshc: Add runtime PM operations
This commit implements the runtime PM operations to disable eMMC card clock when idle.
Reviewed-by: David Thompson <davthompson@nvidia.com> Signed-off-by: Liming Sun <limings@nvidia.com> Acked-by: Adrian Hunter <adrian.hunter@intel.com> Link: https://lore.kernel.org/r/20230822195929.168552-2-limings@nvidia.com Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
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a11937b3 |
| 22-Aug-2023 |
Liming Sun <limings@nvidia.com> |
mmc: sdhci-of-dwcmshc: Add error handling in dwcmshc_resume
This commit adds handling in dwcmshc_resume() for different error cases.
Signed-off-by: Liming Sun <limings@nvidia.com> Acked-by: Adrian
mmc: sdhci-of-dwcmshc: Add error handling in dwcmshc_resume
This commit adds handling in dwcmshc_resume() for different error cases.
Signed-off-by: Liming Sun <limings@nvidia.com> Acked-by: Adrian Hunter <adrian.hunter@intel.com> Link: https://lore.kernel.org/r/20230822195929.168552-1-limings@nvidia.com Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
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Revision tags: v6.1.46, v6.1.45, v6.1.44, v6.1.43 |
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5905a1f1 |
| 27-Jul-2023 |
Yangtao Li <frank.li@vivo.com> |
mmc: sdhci-of-dwcmshc: Convert to platform remove callback returning void
The .remove() callback for a platform driver returns an int which makes many driver authors wrongly assume it's possible to
mmc: sdhci-of-dwcmshc: Convert to platform remove callback returning void
The .remove() callback for a platform driver returns an int which makes many driver authors wrongly assume it's possible to do error handling by returning an error code. However the value returned is (mostly) ignored and this typically results in resource leaks. To improve here there is a quest to make the remove callback return void. In the first step of this quest all drivers are converted to .remove_new() which already returns void.
Trivially convert this driver from always returning zero in the remove callback to the void returning variant.
Cc: Uwe Kleine-König <u.kleine-koenig@pengutronix.de> Signed-off-by: Yangtao Li <frank.li@vivo.com> Acked-by: Adrian Hunter <adrian.hunter@intel.com> Link: https://lore.kernel.org/r/20230727070051.17778-26-frank.li@vivo.com Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
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Revision tags: v6.1.42, v6.1.41, v6.1.40, v6.1.39 |
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c62da8a8 |
| 18-Jul-2023 |
Rob Herring <robh@kernel.org> |
mmc: Explicitly include correct DT includes
The DT of_device.h and of_platform.h date back to the separate of_platform_bus_type before it as merged into the regular platform bus. As part of that mer
mmc: Explicitly include correct DT includes
The DT of_device.h and of_platform.h date back to the separate of_platform_bus_type before it as merged into the regular platform bus. As part of that merge prepping Arm DT support 13 years ago, they "temporarily" include each other. They also include platform_device.h and of.h. As a result, there's a pretty much random mix of those include files used throughout the tree. In order to detangle these headers and replace the implicit includes with struct declarations, users need to explicitly include the correct includes.
Signed-off-by: Rob Herring <robh@kernel.org> Acked-by: Adrian Hunter <adrian.hunter@intel.com> Link: https://lore.kernel.org/r/20230718143054.1065288-1-robh@kernel.org Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
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Revision tags: v6.1.38, v6.1.37, v6.1.36, v6.4, v6.1.35, v6.1.34, v6.1.33, v6.1.32, v6.1.31, v6.1.30, v6.1.29, v6.1.28, v6.1.27, v6.1.26, v6.3, v6.1.25, v6.1.24, v6.1.23, v6.1.22, v6.1.21, v6.1.20, v6.1.19, v6.1.18, v6.1.17, v6.1.16 |
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49502408 |
| 09-Mar-2023 |
Vasily Khoruzhick <anarsoul@gmail.com> |
mmc: sdhci-of-dwcmshc: properly determine max clock on Rockchip
Currently .get_max_clock returns the current clock rate for cclk_emmc on rk35xx, thus max clock gets set to whatever bootloader set it
mmc: sdhci-of-dwcmshc: properly determine max clock on Rockchip
Currently .get_max_clock returns the current clock rate for cclk_emmc on rk35xx, thus max clock gets set to whatever bootloader set it to.
In case of u-boot, it is intentionally reset to 50 MHz if it boots from eMMC, see mmc_deinit() in u-boot sources. As a result, HS200 and HS400 modes are never selected by Linux, because dwcmshc_rk35xx_postinit clears appropriate caps if host->mmc->f_max is < 52MHz
cclk_emmc is not a fixed clock on rk35xx, so using sdhci_pltfm_clk_get_max_clock is not appropriate here.
Implement rk35xx_get_max_clock that returns actual max clock for cclk_emmc.
Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Acked-by: Adrian Hunter <adrian.hunter@intel.com> Link: https://lore.kernel.org/r/20230310010349.509132-1-anarsoul@gmail.com Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
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Revision tags: v6.1.15, v6.1.14, v6.1.13, v6.2, v6.1.12, v6.1.11, v6.1.10 |
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cfd4ea48 |
| 02-Feb-2023 |
Liming Sun <limings@nvidia.com> |
mmc: sdhci-of-dwcmshc: add the missing device table IDs for acpi
This commit adds the missing MODULE_DEVICE_TABLE for acpi, or else it won't be loaded automatically when compiled as a kernel module.
mmc: sdhci-of-dwcmshc: add the missing device table IDs for acpi
This commit adds the missing MODULE_DEVICE_TABLE for acpi, or else it won't be loaded automatically when compiled as a kernel module.
Reviewed-by: David Thompson <davthompson@nvidia.com> Signed-off-by: Liming Sun <limings@nvidia.com> Link: https://lore.kernel.org/r/f57ad0f8fdf663465bca74467c344dfa305a3199.1675305696.git.limings@nvidia.com Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
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b75a52b0 |
| 01-Feb-2023 |
Shawn Lin <shawn.lin@rock-chips.com> |
mmc: sdhci-of-dwcmshc: Update DLL and pre-change delay for rockchip platform
For Rockchip platform, DLL bypass bit and start bit need to be set if DLL is not locked. And adjust pre-change delay to 0
mmc: sdhci-of-dwcmshc: Update DLL and pre-change delay for rockchip platform
For Rockchip platform, DLL bypass bit and start bit need to be set if DLL is not locked. And adjust pre-change delay to 0x3 for better signal test result.
Signed-off-by: Shawn Lin <shawn.lin@rock-chips.com> Link: https://lore.kernel.org/r/1675298118-64243-2-git-send-email-shawn.lin@rock-chips.com Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
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Revision tags: v6.1.9, v6.1.8, v6.1.7, v6.1.6, v6.1.5, v6.0.19 |
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95921151 |
| 11-Jan-2023 |
Liming Sun <limings@nvidia.com> |
mmc: sdhci-of-dwcmshc: enable host V4 support for BlueField-3 SoC
This commit enables SDHCI Host V4 support on Bluefield-3 SoC to be consistent with the default setting in firmware(UEFI).
Reviewed-
mmc: sdhci-of-dwcmshc: enable host V4 support for BlueField-3 SoC
This commit enables SDHCI Host V4 support on Bluefield-3 SoC to be consistent with the default setting in firmware(UEFI).
Reviewed-by: David Woods <davwoods@nvidia.com> Signed-off-by: Liming Sun <limings@nvidia.com> Acked-by: Adrian Hunter <adrian.hunter@intel.com> Link: https://lore.kernel.org/r/990885f566c32ac8e6888ad6b434fb70d1a5d7af.1673460632.git.limings@nvidia.com Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
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Revision tags: v6.0.18, v6.1.4, v6.1.3, v6.0.17, v6.1.2, v6.0.16, v6.1.1, v6.0.15, v6.0.14, v6.0.13, v6.1, v6.0.12, v6.0.11, v6.0.10, v5.15.80, v6.0.9, v5.15.79, v6.0.8, v5.15.78, v6.0.7, v5.15.77, v5.15.76, v6.0.6, v6.0.5, v5.15.75, v6.0.4, v6.0.3, v6.0.2, v5.15.74, v5.15.73, v6.0.1, v5.15.72, v6.0, v5.15.71, v5.15.70, v5.15.69, v5.15.68, v5.15.67, v5.15.66, v5.15.65, v5.15.64, v5.15.63, v5.15.62, v5.15.61, v5.15.60 |
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a0753ef6 |
| 09-Aug-2022 |
Liming Sun <limings@nvidia.com> |
mmc: sdhci-of-dwcmshc: Re-enable support for the BlueField-3 SoC
The commit 08f3dff799d4 (mmc: sdhci-of-dwcmshc: add rockchip platform support") introduces the use of_device_get_match_data() to chec
mmc: sdhci-of-dwcmshc: Re-enable support for the BlueField-3 SoC
The commit 08f3dff799d4 (mmc: sdhci-of-dwcmshc: add rockchip platform support") introduces the use of_device_get_match_data() to check for some chips. Unfortunately, it also breaks the BlueField-3 FW, which uses ACPI.
To fix the problem, let's add the ACPI match data and the corresponding quirks to re-enable the support for the BlueField-3 SoC.
Reviewed-by: David Woods <davwoods@nvidia.com> Signed-off-by: Liming Sun <limings@nvidia.com> Acked-by: Adrian Hunter <adrian.hunter@intel.com> Fixes: 08f3dff799d4 ("mmc: sdhci-of-dwcmshc: add rockchip platform support") Cc: stable@vger.kernel.org Link: https://lore.kernel.org/r/20220809173742.178440-1-limings@nvidia.com [Ulf: Clarified the commit message a bit] Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
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Revision tags: v5.15.59, v5.19, v5.15.58, v5.15.57, v5.15.56, v5.15.55, v5.15.54, v5.15.53, v5.15.52, v5.15.51, v5.15.50, v5.15.49, v5.15.48, v5.15.47, v5.15.46, v5.15.45, v5.15.44, v5.15.43, v5.15.42, v5.18, v5.15.41, v5.15.40, v5.15.39, v5.15.38 |
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c6f361cb |
| 04-May-2022 |
Yifeng Zhao <yifeng.zhao@rock-chips.com> |
mmc: sdhci-of-dwcmshc: add support for rk3588
Add support for RK3588's DWCMSHC controller, which is used for providing the rootfs on the RK3588 evaluation board.
Signed-off-by: Yifeng Zhao <yifeng.
mmc: sdhci-of-dwcmshc: add support for rk3588
Add support for RK3588's DWCMSHC controller, which is used for providing the rootfs on the RK3588 evaluation board.
Signed-off-by: Yifeng Zhao <yifeng.zhao@rock-chips.com> [port from vendor BSP] Acked-by: Adrian Hunter <adrian.hunter@intel.com> Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.com> Link: https://lore.kernel.org/r/20220504213251.264819-12-sebastian.reichel@collabora.com Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
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86e1a8e1 |
| 04-May-2022 |
Sebastian Reichel <sebastian.reichel@collabora.com> |
mmc: sdhci-of-dwcmshc: rename rk3568 to rk35xx
Prepare driver for rk3588 support by renaming the internal data structures.
Acked-by: Adrian Hunter <adrian.hunter@intel.com> Signed-off-by: Sebastian
mmc: sdhci-of-dwcmshc: rename rk3568 to rk35xx
Prepare driver for rk3588 support by renaming the internal data structures.
Acked-by: Adrian Hunter <adrian.hunter@intel.com> Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.com> Link: https://lore.kernel.org/r/20220504213251.264819-11-sebastian.reichel@collabora.com Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
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#
70f83220 |
| 04-May-2022 |
Yifeng Zhao <yifeng.zhao@rock-chips.com> |
mmc: sdhci-of-dwcmshc: add reset call back for rockchip Socs
The reset function build in the SDHCI will not reset the logic circuit related to the tuning function, which may cause data reading error
mmc: sdhci-of-dwcmshc: add reset call back for rockchip Socs
The reset function build in the SDHCI will not reset the logic circuit related to the tuning function, which may cause data reading errors. Resetting the complete SDHCI controller through the reset controller fixes the issue.
Signed-off-by: Yifeng Zhao <yifeng.zhao@rock-chips.com> [rebase, use optional variant of reset getter] Acked-by: Adrian Hunter <adrian.hunter@intel.com> Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.com> Link: https://lore.kernel.org/r/20220504213251.264819-10-sebastian.reichel@collabora.com Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
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#
71beead9 |
| 09-Aug-2022 |
Liming Sun <limings@nvidia.com> |
mmc: sdhci-of-dwcmshc: Re-enable support for the BlueField-3 SoC
[ Upstream commit a0753ef66c34c1739580219dca664eda648164b7 ]
The commit 08f3dff799d4 (mmc: sdhci-of-dwcmshc: add rockchip platform s
mmc: sdhci-of-dwcmshc: Re-enable support for the BlueField-3 SoC
[ Upstream commit a0753ef66c34c1739580219dca664eda648164b7 ]
The commit 08f3dff799d4 (mmc: sdhci-of-dwcmshc: add rockchip platform support") introduces the use of_device_get_match_data() to check for some chips. Unfortunately, it also breaks the BlueField-3 FW, which uses ACPI.
To fix the problem, let's add the ACPI match data and the corresponding quirks to re-enable the support for the BlueField-3 SoC.
Reviewed-by: David Woods <davwoods@nvidia.com> Signed-off-by: Liming Sun <limings@nvidia.com> Acked-by: Adrian Hunter <adrian.hunter@intel.com> Fixes: 08f3dff799d4 ("mmc: sdhci-of-dwcmshc: add rockchip platform support") Cc: stable@vger.kernel.org Link: https://lore.kernel.org/r/20220809173742.178440-1-limings@nvidia.com [Ulf: Clarified the commit message a bit] Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org> Signed-off-by: Sasha Levin <sashal@kernel.org>
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68b6cbaa |
| 04-May-2022 |
Sebastian Reichel <sebastian.reichel@collabora.com> |
mmc: sdhci-of-dwcmshc: rename rk3568 to rk35xx
[ Upstream commit 86e1a8e1f9b555af342c53ae06284eeeab9a4263 ]
Prepare driver for rk3588 support by renaming the internal data structures.
Acked-by: Ad
mmc: sdhci-of-dwcmshc: rename rk3568 to rk35xx
[ Upstream commit 86e1a8e1f9b555af342c53ae06284eeeab9a4263 ]
Prepare driver for rk3588 support by renaming the internal data structures.
Acked-by: Adrian Hunter <adrian.hunter@intel.com> Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.com> Link: https://lore.kernel.org/r/20220504213251.264819-11-sebastian.reichel@collabora.com Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org> Signed-off-by: Sasha Levin <sashal@kernel.org>
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#
c038e409 |
| 04-May-2022 |
Yifeng Zhao <yifeng.zhao@rock-chips.com> |
mmc: sdhci-of-dwcmshc: add reset call back for rockchip Socs
[ Upstream commit 70f832206fe72e9998b46363e8e59e89b0b757bc ]
The reset function build in the SDHCI will not reset the logic circuit rela
mmc: sdhci-of-dwcmshc: add reset call back for rockchip Socs
[ Upstream commit 70f832206fe72e9998b46363e8e59e89b0b757bc ]
The reset function build in the SDHCI will not reset the logic circuit related to the tuning function, which may cause data reading errors. Resetting the complete SDHCI controller through the reset controller fixes the issue.
Signed-off-by: Yifeng Zhao <yifeng.zhao@rock-chips.com> [rebase, use optional variant of reset getter] Acked-by: Adrian Hunter <adrian.hunter@intel.com> Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.com> Link: https://lore.kernel.org/r/20220504213251.264819-10-sebastian.reichel@collabora.com Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org> Signed-off-by: Sasha Levin <sashal@kernel.org>
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#
71beead9 |
| 09-Aug-2022 |
Liming Sun <limings@nvidia.com> |
mmc: sdhci-of-dwcmshc: Re-enable support for the BlueField-3 SoC
[ Upstream commit a0753ef66c34c1739580219dca664eda648164b7 ]
The commit 08f3dff799d4 (mmc: sdhci-of-dwcmshc: add rockchip platform s
mmc: sdhci-of-dwcmshc: Re-enable support for the BlueField-3 SoC
[ Upstream commit a0753ef66c34c1739580219dca664eda648164b7 ]
The commit 08f3dff799d4 (mmc: sdhci-of-dwcmshc: add rockchip platform support") introduces the use of_device_get_match_data() to check for some chips. Unfortunately, it also breaks the BlueField-3 FW, which uses ACPI.
To fix the problem, let's add the ACPI match data and the corresponding quirks to re-enable the support for the BlueField-3 SoC.
Reviewed-by: David Woods <davwoods@nvidia.com> Signed-off-by: Liming Sun <limings@nvidia.com> Acked-by: Adrian Hunter <adrian.hunter@intel.com> Fixes: 08f3dff799d4 ("mmc: sdhci-of-dwcmshc: add rockchip platform support") Cc: stable@vger.kernel.org Link: https://lore.kernel.org/r/20220809173742.178440-1-limings@nvidia.com [Ulf: Clarified the commit message a bit] Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org> Signed-off-by: Sasha Levin <sashal@kernel.org>
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#
68b6cbaa |
| 04-May-2022 |
Sebastian Reichel <sebastian.reichel@collabora.com> |
mmc: sdhci-of-dwcmshc: rename rk3568 to rk35xx
[ Upstream commit 86e1a8e1f9b555af342c53ae06284eeeab9a4263 ]
Prepare driver for rk3588 support by renaming the internal data structures.
Acked-by: Ad
mmc: sdhci-of-dwcmshc: rename rk3568 to rk35xx
[ Upstream commit 86e1a8e1f9b555af342c53ae06284eeeab9a4263 ]
Prepare driver for rk3588 support by renaming the internal data structures.
Acked-by: Adrian Hunter <adrian.hunter@intel.com> Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.com> Link: https://lore.kernel.org/r/20220504213251.264819-11-sebastian.reichel@collabora.com Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org> Signed-off-by: Sasha Levin <sashal@kernel.org>
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#
c038e409 |
| 04-May-2022 |
Yifeng Zhao <yifeng.zhao@rock-chips.com> |
mmc: sdhci-of-dwcmshc: add reset call back for rockchip Socs
[ Upstream commit 70f832206fe72e9998b46363e8e59e89b0b757bc ]
The reset function build in the SDHCI will not reset the logic circuit rela
mmc: sdhci-of-dwcmshc: add reset call back for rockchip Socs
[ Upstream commit 70f832206fe72e9998b46363e8e59e89b0b757bc ]
The reset function build in the SDHCI will not reset the logic circuit related to the tuning function, which may cause data reading errors. Resetting the complete SDHCI controller through the reset controller fixes the issue.
Signed-off-by: Yifeng Zhao <yifeng.zhao@rock-chips.com> [rebase, use optional variant of reset getter] Acked-by: Adrian Hunter <adrian.hunter@intel.com> Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.com> Link: https://lore.kernel.org/r/20220504213251.264819-10-sebastian.reichel@collabora.com Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org> Signed-off-by: Sasha Levin <sashal@kernel.org>
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#
71beead9 |
| 09-Aug-2022 |
Liming Sun <limings@nvidia.com> |
mmc: sdhci-of-dwcmshc: Re-enable support for the BlueField-3 SoC
[ Upstream commit a0753ef66c34c1739580219dca664eda648164b7 ]
The commit 08f3dff799d4 (mmc: sdhci-of-dwcmshc: add rockchip platform s
mmc: sdhci-of-dwcmshc: Re-enable support for the BlueField-3 SoC
[ Upstream commit a0753ef66c34c1739580219dca664eda648164b7 ]
The commit 08f3dff799d4 (mmc: sdhci-of-dwcmshc: add rockchip platform support") introduces the use of_device_get_match_data() to check for some chips. Unfortunately, it also breaks the BlueField-3 FW, which uses ACPI.
To fix the problem, let's add the ACPI match data and the corresponding quirks to re-enable the support for the BlueField-3 SoC.
Reviewed-by: David Woods <davwoods@nvidia.com> Signed-off-by: Liming Sun <limings@nvidia.com> Acked-by: Adrian Hunter <adrian.hunter@intel.com> Fixes: 08f3dff799d4 ("mmc: sdhci-of-dwcmshc: add rockchip platform support") Cc: stable@vger.kernel.org Link: https://lore.kernel.org/r/20220809173742.178440-1-limings@nvidia.com [Ulf: Clarified the commit message a bit] Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org> Signed-off-by: Sasha Levin <sashal@kernel.org>
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68b6cbaa |
| 04-May-2022 |
Sebastian Reichel <sebastian.reichel@collabora.com> |
mmc: sdhci-of-dwcmshc: rename rk3568 to rk35xx
[ Upstream commit 86e1a8e1f9b555af342c53ae06284eeeab9a4263 ]
Prepare driver for rk3588 support by renaming the internal data structures.
Acked-by: Ad
mmc: sdhci-of-dwcmshc: rename rk3568 to rk35xx
[ Upstream commit 86e1a8e1f9b555af342c53ae06284eeeab9a4263 ]
Prepare driver for rk3588 support by renaming the internal data structures.
Acked-by: Adrian Hunter <adrian.hunter@intel.com> Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.com> Link: https://lore.kernel.org/r/20220504213251.264819-11-sebastian.reichel@collabora.com Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org> Signed-off-by: Sasha Levin <sashal@kernel.org>
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c038e409 |
| 04-May-2022 |
Yifeng Zhao <yifeng.zhao@rock-chips.com> |
mmc: sdhci-of-dwcmshc: add reset call back for rockchip Socs
[ Upstream commit 70f832206fe72e9998b46363e8e59e89b0b757bc ]
The reset function build in the SDHCI will not reset the logic circuit rela
mmc: sdhci-of-dwcmshc: add reset call back for rockchip Socs
[ Upstream commit 70f832206fe72e9998b46363e8e59e89b0b757bc ]
The reset function build in the SDHCI will not reset the logic circuit related to the tuning function, which may cause data reading errors. Resetting the complete SDHCI controller through the reset controller fixes the issue.
Signed-off-by: Yifeng Zhao <yifeng.zhao@rock-chips.com> [rebase, use optional variant of reset getter] Acked-by: Adrian Hunter <adrian.hunter@intel.com> Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.com> Link: https://lore.kernel.org/r/20220504213251.264819-10-sebastian.reichel@collabora.com Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org> Signed-off-by: Sasha Levin <sashal@kernel.org>
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71beead9 |
| 09-Aug-2022 |
Liming Sun <limings@nvidia.com> |
mmc: sdhci-of-dwcmshc: Re-enable support for the BlueField-3 SoC
[ Upstream commit a0753ef66c34c1739580219dca664eda648164b7 ]
The commit 08f3dff799d4 (mmc: sdhci-of-dwcmshc: add rockchip platform s
mmc: sdhci-of-dwcmshc: Re-enable support for the BlueField-3 SoC
[ Upstream commit a0753ef66c34c1739580219dca664eda648164b7 ]
The commit 08f3dff799d4 (mmc: sdhci-of-dwcmshc: add rockchip platform support") introduces the use of_device_get_match_data() to check for some chips. Unfortunately, it also breaks the BlueField-3 FW, which uses ACPI.
To fix the problem, let's add the ACPI match data and the corresponding quirks to re-enable the support for the BlueField-3 SoC.
Reviewed-by: David Woods <davwoods@nvidia.com> Signed-off-by: Liming Sun <limings@nvidia.com> Acked-by: Adrian Hunter <adrian.hunter@intel.com> Fixes: 08f3dff799d4 ("mmc: sdhci-of-dwcmshc: add rockchip platform support") Cc: stable@vger.kernel.org Link: https://lore.kernel.org/r/20220809173742.178440-1-limings@nvidia.com [Ulf: Clarified the commit message a bit] Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org> Signed-off-by: Sasha Levin <sashal@kernel.org>
show more ...
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68b6cbaa |
| 04-May-2022 |
Sebastian Reichel <sebastian.reichel@collabora.com> |
mmc: sdhci-of-dwcmshc: rename rk3568 to rk35xx
[ Upstream commit 86e1a8e1f9b555af342c53ae06284eeeab9a4263 ]
Prepare driver for rk3588 support by renaming the internal data structures.
Acked-by: Ad
mmc: sdhci-of-dwcmshc: rename rk3568 to rk35xx
[ Upstream commit 86e1a8e1f9b555af342c53ae06284eeeab9a4263 ]
Prepare driver for rk3588 support by renaming the internal data structures.
Acked-by: Adrian Hunter <adrian.hunter@intel.com> Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.com> Link: https://lore.kernel.org/r/20220504213251.264819-11-sebastian.reichel@collabora.com Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org> Signed-off-by: Sasha Levin <sashal@kernel.org>
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