Merge branch 'ryan_port' into aspeed-dev-v2019.04

mmc: SD: Add property for timing phase and drive type

Config appropriate timing phase and drive type during
probe or attach eMMC/SD.

add sdhci support gpio switch

Merge git://git.denx.de/u-boot-tegra

Merge tag 'xilinx-for-v2018.07' of git://www.denx.de/git/u-boot-microblaze

Xilinx changes for v2018.07

microblaze:
- Align defconfig

zynq:
- Rework fpga initializat

Merge tag 'xilinx-for-v2018.07' of git://www.denx.de/git/u-boot-microblaze

Xilinx changes for v2018.07

microblaze:
- Align defconfig

zynq:
- Rework fpga initialization and cpuinfo handling

zynqmp:
- Add ZynqMP R5 support
- Wire and enable watchdog on zcu100-revC
- Setup MMU map for DDR at run time
- Show board info based on DT and cleanup IDENT_STRING

zynqmp tools:
- Add read partition support
- Add initial support for Xilinx bif format for boot.bin generation

mmc:
- Fix get_timer usage on 64bit cpus
- Add support for SD3.0 UHS mode

nand-zynq:
- Add support for 16bit buswidth
- Use address cycles from onfi params

scsi:
- convert ceva sata to UCLASS_AHCI

timer:
- Add Cadence TTC for ZynqMP r5

watchdog:
- Minor cadence driver cleanup

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mmc: sdhci: Read capabilities register1 and update host caps

This patch reads the capabilities register1 and update the host
caps accordingly for mmc layer usage. This patch mainly reads

mmc: sdhci: Read capabilities register1 and update host caps

This patch reads the capabilities register1 and update the host
caps accordingly for mmc layer usage. This patch mainly reads
for UHS capabilities inorder to support SD3.0.

Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>

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sdhci: Add new sdhci ops for platform specific tuning and delays

This patch adds new hooks for any platform specific tuning and
tap delays programing. These are needed for supporting

sdhci: Add new sdhci ops for platform specific tuning and delays

This patch adds new hooks for any platform specific tuning and
tap delays programing. These are needed for supporting
SD3.0.

Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>

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Merge git://git.denx.de/u-boot-sunxi

SPDX: Convert all of our single license tags to Linux Kernel style

When U-Boot started using SPDX tags we were among the early adopters and
there weren't a lot of other examples to borro

SPDX: Convert all of our single license tags to Linux Kernel style

When U-Boot started using SPDX tags we were among the early adopters and
there weren't a lot of other examples to borrow from. So we picked the
area of the file that usually had a full license text and replaced it
with an appropriate SPDX-License-Identifier: entry. Since then, the
Linux Kernel has adopted SPDX tags and they place it as the very first
line in a file (except where shebangs are used, then it's second line)
and with slightly different comment styles than us.

In part due to community overlap, in part due to better tag visibility
and in part for other minor reasons, switch over to that style.

This commit changes all instances where we have a single declared
license in the tag as both the before and after are identical in tag
contents. There's also a few places where I found we did not have a tag
and have introduced one.

Signed-off-by: Tom Rini <trini@konsulko.com>

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Merge git://git.denx.de/u-boot-usb

Merge git://git.denx.de/u-boot-sh

Merge git://git.denx.de/u-boot-mmc

mmc: sdhci: add SDHCI_QUIRK_BROKEN_HISPD_MODE

Some IP-core implementations of the SDHCI have different troubles on the
silicon where they are placed.

On ZYNQ platform for exampl

mmc: sdhci: add SDHCI_QUIRK_BROKEN_HISPD_MODE

Some IP-core implementations of the SDHCI have different troubles on the
silicon where they are placed.

On ZYNQ platform for example Xilinx doesn't accept the hold timing of an
eMMC chip which operates in High-Speed mode and must be forced to
operate in non high-speed mode. To get rid of this
"SDHCI_QUIRK_BROKEN_HISPD_MODE" is introduced.

For more details about this refer to the Xilinx answer-recor #59999
https://www.xilinx.com/support/answers/59999.html

This commit:
- doesn't set HISPD bit on the host-conroller
- reflects this fact within the host-controller capabilities

Upon this the layer above (mmc-driver) can setup the card correctly.

Otherwise the MMC card will be switched into high-speed mode and causes
possible timing violation on the host-controller side.

Signed-off-by: Hannes Schmelzer <oe5hpm@oevsv.at>

Signed-off-by: Hannes Schmelzer <hannes.schmelzer@br-automation.com>

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Merge tag 'signed-efi-next' of git://github.com/agraf/u-boot

EFI Fixes for 2017.09:
- Fix GOP w/o display
- Fix LocateHandle
- Fix exit return value truncation
- Fix

Merge tag 'signed-efi-next' of git://github.com/agraf/u-boot

EFI Fixes for 2017.09:
- Fix GOP w/o display
- Fix LocateHandle
- Fix exit return value truncation
- Fix missing EFIAPI in efi_locate_handle (for x86)

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Merge branch 'master' of git://git.denx.de/u-boot-mmc

dm: mmc: Drop CONFIG_DM_MMC_OPS

All boards which use DM_MMC have now been converted to use DM_MMC_OPS.
Drop the option and good riddance.

Signed-off-by: Simon Glass <sjg@chromiu

dm: mmc: Drop CONFIG_DM_MMC_OPS

All boards which use DM_MMC have now been converted to use DM_MMC_OPS.
Drop the option and good riddance.

Signed-off-by: Simon Glass <sjg@chromium.org>

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Merge git://www.denx.de/git/u-boot-marvell

Merge git://git.denx.de/u-boot-mpc85xx

mmc: sdhci: Add support for optional controller specific set_ios_post()

Some SDHCI drivers might need to do some special controller configuration
after the common clock set_ios() functio

mmc: sdhci: Add support for optional controller specific set_ios_post()

Some SDHCI drivers might need to do some special controller configuration
after the common clock set_ios() function has been called (speed / width
configuration). This patch adds a call to the newly created function
set_ios_port() when its configured in the host driver.

This will be used by the Xenon SDHCI controller driver used on the
Marvell Armada 3700 and 7k/8k ARM64 SoCs.

Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Jaehoon Chung <jh80.chung@samsung.com>
Cc: Simon Glass <sjg@chromium.org>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>

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mmc: sdhci: Distinguish between base clock and maximum peripheral frequency

The sdhci controller assumes that the base clock frequency is fully supported by
the peripheral and doesn't su

mmc: sdhci: Distinguish between base clock and maximum peripheral frequency

The sdhci controller assumes that the base clock frequency is fully supported by
the peripheral and doesn't support hardware limitations. The Linux kernel
distinguishes between base clock (max_clk) of the host controller and maximum
frequency (f_max) of the card interface. Use the same differentiation and allow
the platform to constrain the peripheral interface.

Signed-off-by: Stefan Herbrechtsmeier <stefan.herbrechtsmeier@weidmueller.com>

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Merge git://git.denx.de/u-boot-fsl-qoriq

Merge git://git.denx.de/u-boot-samsung

Merge branch 'master' of git://git.denx.de/u-boot-video

Merge tag 'xilinx-for-v2017.03' of git://www.denx.de/git/u-boot-microblaze

Xilinx changes for v2017.03

- ATF handoff
- DT syncups
- gem: Use wait_for_bit(), add simple clk s

Merge tag 'xilinx-for-v2017.03' of git://www.denx.de/git/u-boot-microblaze

Xilinx changes for v2017.03

- ATF handoff
- DT syncups
- gem: Use wait_for_bit(), add simple clk support
- Simple clk driver for ZynqMP
- Other small changes

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mmc: sdhci: remove the SDHCI_QUIRK_NO_SIMULT_VDD_AND_POWER

Ther is no usage anywhere. It doesn't need to maintain this bit.

Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com>