| 72246065 | 20-Aug-2023 |
Richard Henderson <richard.henderson@linaro.org> |
fpu: Handle m68k extended precision denormals properly
Motorola treats denormals with explicit integer bit set as
having unbiased exponent 0, unlike Intel which treats it as
having unbiased exponent
fpu: Handle m68k extended precision denormals properly
Motorola treats denormals with explicit integer bit set as
having unbiased exponent 0, unlike Intel which treats it as
having unbiased exponent 1 (more like all other IEEE formats
that have no explicit integer bit).
Add a flag on FloatFmt to differentiate the behaviour.
Reported-by: Keith Packard <keithp@keithp.com>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
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| dee3fcfb | 01-Apr-2022 |
Richard Henderson <richard.henderson@linaro.org> |
softfloat: Use FloatRelation for fracN_cmp
Since the caller, partsN_compare, is now exclusively
using FloatRelation, it's clearer to use it here too.
Signed-off-by: Richard Henderson <richard.hende
softfloat: Use FloatRelation for fracN_cmp
Since the caller, partsN_compare, is now exclusively
using FloatRelation, it's clearer to use it here too.
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Message-Id: <20220401132240.79730-4-richard.henderson@linaro.org>
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| 9343c884 | 01-Apr-2022 |
Richard Henderson <richard.henderson@linaro.org> |
softfloat: Use FloatRelation within partsN_compare
As the return type is FloatRelation, it's clearer to
use the type for 'cmp' within the function.
Signed-off-by: Richard Henderson <richard.henders
softfloat: Use FloatRelation within partsN_compare
As the return type is FloatRelation, it's clearer to
use the type for 'cmp' within the function.
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Message-Id: <20220401132240.79730-3-richard.henderson@linaro.org>
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| bea59230 | 30-Mar-2022 |
Matheus Ferst <matheus.ferst@eldorado.org.br> |
softfloat: add float128_to_int128
Implements float128_to_int128 based on parts_float_to_int logic.
Signed-off-by: Matheus Ferst <matheus.ferst@eldorado.org.br>
Reviewed-by: Richard Henderson <richa
softfloat: add float128_to_int128
Implements float128_to_int128 based on parts_float_to_int logic.
Signed-off-by: Matheus Ferst <matheus.ferst@eldorado.org.br>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20220330175932.6995-7-matheus.ferst@eldorado.org.br>
Signed-off-by: Daniel Henrique Barboza <danielhb413@gmail.com>
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| 4de49ddf | 30-Mar-2022 |
Matheus Ferst <matheus.ferst@eldorado.org.br> |
softfloat: add float128_to_uint128
Implements float128_to_uint128 based on parts_float_to_uint logic.
Signed-off-by: Matheus Ferst <matheus.ferst@eldorado.org.br>
Reviewed-by: Richard Henderson <ri
softfloat: add float128_to_uint128
Implements float128_to_uint128 based on parts_float_to_uint logic.
Signed-off-by: Matheus Ferst <matheus.ferst@eldorado.org.br>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20220330175932.6995-6-matheus.ferst@eldorado.org.br>
Signed-off-by: Daniel Henrique Barboza <danielhb413@gmail.com>
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| 95c1b71e | 30-Mar-2022 |
Matheus Ferst <matheus.ferst@eldorado.org.br> |
softfloat: add int128_to_float128
Based on parts_sint_to_float, implements int128_to_float128 to convert a
signed 128-bit value received through an Int128 argument.
Signed-off-by: Matheus Ferst <ma
softfloat: add int128_to_float128
Based on parts_sint_to_float, implements int128_to_float128 to convert a
signed 128-bit value received through an Int128 argument.
Signed-off-by: Matheus Ferst <matheus.ferst@eldorado.org.br>
Message-Id: <20220330175932.6995-5-matheus.ferst@eldorado.org.br>
Signed-off-by: Daniel Henrique Barboza <danielhb413@gmail.com>
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| 42636fb9 | 17-Dec-2021 |
Richard Henderson <richard.henderson@linaro.org> |
softfloat: Add float64r32 arithmetic routines
These variants take a float64 as input, compute the result to
infinite precision (as we do with FloatParts), round the result
to the precision and dynam
softfloat: Add float64r32 arithmetic routines
These variants take a float64 as input, compute the result to
infinite precision (as we do with FloatParts), round the result
to the precision and dynamic range of float32, and then return
the result in the format of float64.
This is the operation PowerPC requires for its float32 operations.
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20211119160502.17432-28-richard.henderson@linaro.org>
Signed-off-by: Cédric Le Goater <clg@kaod.org>
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| e706d445 | 17-Dec-2021 |
Richard Henderson <richard.henderson@linaro.org> |
softfloat: Add flag specific to signaling nans
PowerPC has this flag, and it's easier to compute it here
than after the fact.
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message
softfloat: Add flag specific to signaling nans
PowerPC has this flag, and it's easier to compute it here
than after the fact.
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20211119160502.17432-8-richard.henderson@linaro.org>
Signed-off-by: Cédric Le Goater <clg@kaod.org>
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| 81254b02 | 17-Dec-2021 |
Richard Henderson <richard.henderson@linaro.org> |
softfloat: Add flag specific to convert non-nan to int
PowerPC has this flag, and it's easier to compute it here
than after the fact.
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
softfloat: Add flag specific to convert non-nan to int
PowerPC has this flag, and it's easier to compute it here
than after the fact.
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20211119160502.17432-7-richard.henderson@linaro.org>
Signed-off-by: Cédric Le Goater <clg@kaod.org>
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| f8718aab | 17-Dec-2021 |
Richard Henderson <richard.henderson@linaro.org> |
softfloat: Add flag specific to sqrt(-x)
PowerPC has this flag, and it's easier to compute it here
than after the fact.
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <
softfloat: Add flag specific to sqrt(-x)
PowerPC has this flag, and it's easier to compute it here
than after the fact.
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20211119160502.17432-6-richard.henderson@linaro.org>
Signed-off-by: Cédric Le Goater <clg@kaod.org>
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| 10cc9640 | 17-Dec-2021 |
Richard Henderson <richard.henderson@linaro.org> |
softfloat: Add flags specific to Inf / Inf and 0 / 0
PowerPC has these flags, and it's easier to compute them here
than after the fact.
Signed-off-by: Richard Henderson <richard.henderson@linaro.or
softfloat: Add flags specific to Inf / Inf and 0 / 0
PowerPC has these flags, and it's easier to compute them here
than after the fact.
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20211119160502.17432-5-richard.henderson@linaro.org>
Signed-off-by: Cédric Le Goater <clg@kaod.org>
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| bead3c9b | 17-Dec-2021 |
Richard Henderson <richard.henderson@linaro.org> |
softfloat: Add flag specific to Inf * 0
PowerPC has this flag, and it's easier to compute it here
than after the fact.
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <2
softfloat: Add flag specific to Inf * 0
PowerPC has this flag, and it's easier to compute it here
than after the fact.
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20211119160502.17432-4-richard.henderson@linaro.org>
Signed-off-by: Cédric Le Goater <clg@kaod.org>
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