xref: /openbmc/qemu/hw/ppc/ppc440_bamboo.c (revision 1d3daf95)
1 /*
2  * QEMU PowerPC 440 Bamboo board emulation
3  *
4  * Copyright 2007 IBM Corporation.
5  * Authors:
6  *  Jerone Young <jyoung5@us.ibm.com>
7  *  Christian Ehrhardt <ehrhardt@linux.vnet.ibm.com>
8  *  Hollis Blanchard <hollisb@us.ibm.com>
9  *
10  * This work is licensed under the GNU GPL license version 2 or later.
11  *
12  */
13 
14 #include "qemu/osdep.h"
15 #include "qemu/units.h"
16 #include "qemu/datadir.h"
17 #include "qemu/error-report.h"
18 #include "net/net.h"
19 #include "hw/pci/pci.h"
20 #include "hw/boards.h"
21 #include "sysemu/kvm.h"
22 #include "sysemu/device_tree.h"
23 #include "hw/loader.h"
24 #include "elf.h"
25 #include "hw/char/serial.h"
26 #include "hw/ppc/ppc.h"
27 #include "ppc405.h"
28 #include "sysemu/sysemu.h"
29 #include "sysemu/reset.h"
30 #include "hw/sysbus.h"
31 #include "hw/intc/ppc-uic.h"
32 #include "hw/qdev-properties.h"
33 #include "qapi/error.h"
34 
35 #include <libfdt.h>
36 
37 #define BINARY_DEVICE_TREE_FILE "bamboo.dtb"
38 
39 /* from u-boot */
40 #define KERNEL_ADDR  0x1000000
41 #define FDT_ADDR     0x1800000
42 #define RAMDISK_ADDR 0x1900000
43 
44 #define PPC440EP_PCI_CONFIG     0xeec00000
45 #define PPC440EP_PCI_INTACK     0xeed00000
46 #define PPC440EP_PCI_SPECIAL    0xeed00000
47 #define PPC440EP_PCI_REGS       0xef400000
48 #define PPC440EP_PCI_IO         0xe8000000
49 #define PPC440EP_PCI_IOLEN      0x00010000
50 
51 static hwaddr entry;
52 
53 static int bamboo_load_device_tree(MachineState *machine,
54                                    hwaddr addr,
55                                    hwaddr initrd_base,
56                                    hwaddr initrd_size)
57 {
58     int ret = -1;
59     uint32_t mem_reg_property[] = { 0, 0, cpu_to_be32(machine->ram_size) };
60     char *filename;
61     int fdt_size;
62     void *fdt;
63     uint32_t tb_freq = 400000000;
64     uint32_t clock_freq = 400000000;
65 
66     filename = qemu_find_file(QEMU_FILE_TYPE_BIOS, BINARY_DEVICE_TREE_FILE);
67     if (!filename) {
68         return -1;
69     }
70     fdt = load_device_tree(filename, &fdt_size);
71     g_free(filename);
72     if (fdt == NULL) {
73         return -1;
74     }
75 
76     /* Manipulate device tree in memory. */
77 
78     ret = qemu_fdt_setprop(fdt, "/memory", "reg", mem_reg_property,
79                            sizeof(mem_reg_property));
80     if (ret < 0) {
81         fprintf(stderr, "couldn't set /memory/reg\n");
82     }
83     ret = qemu_fdt_setprop_cell(fdt, "/chosen", "linux,initrd-start",
84                                 initrd_base);
85     if (ret < 0) {
86         fprintf(stderr, "couldn't set /chosen/linux,initrd-start\n");
87     }
88     ret = qemu_fdt_setprop_cell(fdt, "/chosen", "linux,initrd-end",
89                                 (initrd_base + initrd_size));
90     if (ret < 0) {
91         fprintf(stderr, "couldn't set /chosen/linux,initrd-end\n");
92     }
93     ret = qemu_fdt_setprop_string(fdt, "/chosen", "bootargs",
94                                   machine->kernel_cmdline);
95     if (ret < 0) {
96         fprintf(stderr, "couldn't set /chosen/bootargs\n");
97     }
98 
99     qemu_fdt_setprop_cell(fdt, "/cpus/cpu@0", "clock-frequency",
100                           clock_freq);
101     qemu_fdt_setprop_cell(fdt, "/cpus/cpu@0", "timebase-frequency",
102                           tb_freq);
103 
104     rom_add_blob_fixed(BINARY_DEVICE_TREE_FILE, fdt, fdt_size, addr);
105 
106     /* Set ms->fdt for 'dumpdtb' QMP/HMP command */
107     machine->fdt = fdt;
108 
109     return 0;
110 }
111 
112 /* Create reset TLB entries for BookE, spanning the 32bit addr space.  */
113 static void mmubooke_create_initial_mapping(CPUPPCState *env,
114                                      target_ulong va,
115                                      hwaddr pa)
116 {
117     ppcemb_tlb_t *tlb = &env->tlb.tlbe[0];
118 
119     tlb->attr = 0;
120     tlb->prot = PAGE_VALID | ((PAGE_READ | PAGE_WRITE | PAGE_EXEC) << 4);
121     tlb->size = 1U << 31; /* up to 0x80000000  */
122     tlb->EPN = va & TARGET_PAGE_MASK;
123     tlb->RPN = pa & TARGET_PAGE_MASK;
124     tlb->PID = 0;
125 
126     tlb = &env->tlb.tlbe[1];
127     tlb->attr = 0;
128     tlb->prot = PAGE_VALID | ((PAGE_READ | PAGE_WRITE | PAGE_EXEC) << 4);
129     tlb->size = 1U << 31; /* up to 0xffffffff  */
130     tlb->EPN = 0x80000000 & TARGET_PAGE_MASK;
131     tlb->RPN = 0x80000000 & TARGET_PAGE_MASK;
132     tlb->PID = 0;
133 }
134 
135 static void main_cpu_reset(void *opaque)
136 {
137     PowerPCCPU *cpu = opaque;
138     CPUPPCState *env = &cpu->env;
139 
140     cpu_reset(CPU(cpu));
141     env->gpr[1] = (16 * MiB) - 8;
142     env->gpr[3] = FDT_ADDR;
143     env->nip = entry;
144 
145     /* Create a mapping for the kernel.  */
146     mmubooke_create_initial_mapping(env, 0, 0);
147 }
148 
149 static void bamboo_init(MachineState *machine)
150 {
151     const char *kernel_filename = machine->kernel_filename;
152     const char *initrd_filename = machine->initrd_filename;
153     MachineClass *mc = MACHINE_GET_CLASS(machine);
154     unsigned int pci_irq_nrs[4] = { 28, 27, 26, 25 };
155     MemoryRegion *address_space_mem = get_system_memory();
156     MemoryRegion *isa = g_new(MemoryRegion, 1);
157     PCIBus *pcibus;
158     PowerPCCPU *cpu;
159     CPUPPCState *env;
160     target_long initrd_size = 0;
161     DeviceState *dev;
162     DeviceState *uicdev;
163     SysBusDevice *uicsbd;
164     int success;
165     int i;
166 
167     if (kvm_enabled()) {
168         error_report("machine %s does not support the KVM accelerator",
169                      MACHINE_GET_CLASS(machine)->name);
170         exit(EXIT_FAILURE);
171     }
172 
173     cpu = POWERPC_CPU(cpu_create(machine->cpu_type));
174     env = &cpu->env;
175 
176     if (env->mmu_model != POWERPC_MMU_BOOKE) {
177         error_report("MMU model %i not supported by this machine",
178                      env->mmu_model);
179         exit(1);
180     }
181 
182     qemu_register_reset(main_cpu_reset, cpu);
183     ppc_booke_timers_init(cpu, 400000000, 0);
184     ppc_dcr_init(env, NULL, NULL);
185 
186     /* interrupt controller */
187     uicdev = qdev_new(TYPE_PPC_UIC);
188     ppc4xx_dcr_realize(PPC4xx_DCR_DEVICE(uicdev), cpu, &error_fatal);
189     object_unref(OBJECT(uicdev));
190     uicsbd = SYS_BUS_DEVICE(uicdev);
191     sysbus_connect_irq(uicsbd, PPCUIC_OUTPUT_INT,
192                        qdev_get_gpio_in(DEVICE(cpu), PPC40x_INPUT_INT));
193     sysbus_connect_irq(uicsbd, PPCUIC_OUTPUT_CINT,
194                        qdev_get_gpio_in(DEVICE(cpu), PPC40x_INPUT_CINT));
195 
196     /* SDRAM controller */
197     dev = qdev_new(TYPE_PPC4xx_SDRAM_DDR);
198     object_property_set_link(OBJECT(dev), "dram", OBJECT(machine->ram),
199                              &error_abort);
200     ppc4xx_dcr_realize(PPC4xx_DCR_DEVICE(dev), cpu, &error_fatal);
201     object_unref(OBJECT(dev));
202     /* XXX 440EP's ECC interrupts are on UIC1, but we've only created UIC0. */
203     sysbus_connect_irq(SYS_BUS_DEVICE(dev), 0, qdev_get_gpio_in(uicdev, 14));
204     /* Enable SDRAM memory regions, this should be done by the firmware */
205     ppc4xx_sdram_ddr_enable(PPC4xx_SDRAM_DDR(dev));
206 
207     /* PCI */
208     dev = sysbus_create_varargs(TYPE_PPC4xx_PCI_HOST_BRIDGE,
209                                 PPC440EP_PCI_CONFIG,
210                                 qdev_get_gpio_in(uicdev, pci_irq_nrs[0]),
211                                 qdev_get_gpio_in(uicdev, pci_irq_nrs[1]),
212                                 qdev_get_gpio_in(uicdev, pci_irq_nrs[2]),
213                                 qdev_get_gpio_in(uicdev, pci_irq_nrs[3]),
214                                 NULL);
215     pcibus = (PCIBus *)qdev_get_child_bus(dev, "pci.0");
216     if (!pcibus) {
217         error_report("couldn't create PCI controller");
218         exit(1);
219     }
220 
221     memory_region_init_alias(isa, NULL, "isa_mmio",
222                              get_system_io(), 0, PPC440EP_PCI_IOLEN);
223     memory_region_add_subregion(get_system_memory(), PPC440EP_PCI_IO, isa);
224 
225     if (serial_hd(0) != NULL) {
226         serial_mm_init(address_space_mem, 0xef600300, 0,
227                        qdev_get_gpio_in(uicdev, 0),
228                        PPC_SERIAL_MM_BAUDBASE, serial_hd(0),
229                        DEVICE_BIG_ENDIAN);
230     }
231     if (serial_hd(1) != NULL) {
232         serial_mm_init(address_space_mem, 0xef600400, 0,
233                        qdev_get_gpio_in(uicdev, 1),
234                        PPC_SERIAL_MM_BAUDBASE, serial_hd(1),
235                        DEVICE_BIG_ENDIAN);
236     }
237 
238     if (pcibus) {
239         /* Register network interfaces. */
240         for (i = 0; i < nb_nics; i++) {
241             /*
242              * There are no PCI NICs on the Bamboo board, but there are
243              * PCI slots, so we can pick whatever default model we want.
244              */
245             pci_nic_init_nofail(&nd_table[i], pcibus, mc->default_nic, NULL);
246         }
247     }
248 
249     /* Load kernel. */
250     if (kernel_filename) {
251         hwaddr loadaddr = LOAD_UIMAGE_LOADADDR_INVALID;
252         success = load_uimage(kernel_filename, &entry, &loadaddr, NULL,
253                               NULL, NULL);
254         if (success < 0) {
255             uint64_t elf_entry;
256             success = load_elf(kernel_filename, NULL, NULL, NULL, &elf_entry,
257                                NULL, NULL, NULL, 1, PPC_ELF_MACHINE, 0, 0);
258             entry = elf_entry;
259         }
260         /* XXX try again as binary */
261         if (success < 0) {
262             error_report("could not load kernel '%s'", kernel_filename);
263             exit(1);
264         }
265     }
266 
267     /* Load initrd. */
268     if (initrd_filename) {
269         initrd_size = load_image_targphys(initrd_filename, RAMDISK_ADDR,
270                                           machine->ram_size - RAMDISK_ADDR);
271 
272         if (initrd_size < 0) {
273             error_report("could not load ram disk '%s' at %x",
274                          initrd_filename, RAMDISK_ADDR);
275             exit(1);
276         }
277     }
278 
279     /* If we're loading a kernel directly, we must load the device tree too. */
280     if (kernel_filename) {
281         if (bamboo_load_device_tree(machine, FDT_ADDR,
282                                     RAMDISK_ADDR, initrd_size) < 0) {
283             error_report("couldn't load device tree");
284             exit(1);
285         }
286     }
287 }
288 
289 static void bamboo_machine_init(MachineClass *mc)
290 {
291     mc->desc = "bamboo";
292     mc->init = bamboo_init;
293     mc->default_cpu_type = POWERPC_CPU_TYPE_NAME("440epb");
294     mc->default_ram_id = "ppc4xx.sdram";
295     mc->default_nic = "e1000";
296 }
297 
298 DEFINE_MACHINE("bamboo", bamboo_machine_init)
299