ARM64: dts: meson: add MMC resets

Add reset lines to the mmc controllers of the meson gx and axg SoCs

Signed-off-by: Jerome Brunet <jbrunet@baylibre.com>
Signed-off-by: Kevin Hi

ARM64: dts: meson: add MMC resets

Add reset lines to the mmc controllers of the meson gx and axg SoCs

Signed-off-by: Jerome Brunet <jbrunet@baylibre.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>

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ARM64: dts: meson-axg: add an 32K alt aoclk

The ao_clk81 in AO domain have two clock source,
one from a 32K alt crystal we name it as ao_alt_clk,
another is the clk81 signal from EE

ARM64: dts: meson-axg: add an 32K alt aoclk

The ao_clk81 in AO domain have two clock source,
one from a 32K alt crystal we name it as ao_alt_clk,
another is the clk81 signal from EE domain.

Acked-by: Jerome Brunet <jbrunet@baylibre.com>
Signed-off-by: Yixun Lan <yixun.lan@amlogic.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>

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ARM64: dts: meson-axg: add tdm pins

Add tdm pins to amlogic's A113 device tree

Signed-off-by: Jerome Brunet <jbrunet@baylibre.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.

ARM64: dts: meson-axg: add tdm pins

Add tdm pins to amlogic's A113 device tree

Signed-off-by: Jerome Brunet <jbrunet@baylibre.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>

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ARM64: dts: meson-axg: add GPIO interrupt controller support

Add the GPIO interrupt controller driver which found in the Amlogic's
Meson-AXG SoC, the controller share the similar ASIC IP

ARM64: dts: meson-axg: add GPIO interrupt controller support

Add the GPIO interrupt controller driver which found in the Amlogic's
Meson-AXG SoC, the controller share the similar ASIC IP as other meson SoCs.

Signed-off-by: Yixun Lan <yixun.lan@amlogic.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>

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ARM64: dts: meson-axg: enable the eMMC controller

The IP of eMMC controller in AXG is similiar to Meson-GX series.
Here we add the initial support of the HS200 mode with
clock runnin

ARM64: dts: meson-axg: enable the eMMC controller

The IP of eMMC controller in AXG is similiar to Meson-GX series.
Here we add the initial support of the HS200 mode with
clock running at 166MHz (to be safe), since we found some eMMC chip
fail to run at 200MHz due to tunning phase error.

Signed-off-by: Nan Li <nan.li@amlogic.com>
Signed-off-by: Yixun Lan <yixun.lan@amlogic.com>
[khilman: drop incorrect SDIO pwrseq property]
Signed-off-by: Kevin Hilman <khilman@baylibre.com>

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ARM64: dts: meson-axg: use hhi syscon for the clock controller

Like the meson-gx, the axg clock controller should go through a syscon
to access the hhi register region, and not directly

ARM64: dts: meson-axg: use hhi syscon for the clock controller

Like the meson-gx, the axg clock controller should go through a syscon
to access the hhi register region, and not directly map the region.
This way, the hhi register region can be used safely by multiple drivers.

Signed-off-by: Jerome Brunet <jbrunet@baylibre.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>

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ARM64: dts: amlogic: Convert to new-style SPDX license identifiers

Move the SPDX-License-Identifier lines to the top and drop the
license splat.

Signed-off-by: Neil Armstrong <n

ARM64: dts: amlogic: Convert to new-style SPDX license identifiers

Move the SPDX-License-Identifier lines to the top and drop the
license splat.

Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>

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ARM64: dts: meson-axg: fix pwm_AO_cd compatible

The compatible in pwm_AO_cd is wrong and does not match anything.
Correct this with the correct compatible string

Fixes: 4a81e5dd

ARM64: dts: meson-axg: fix pwm_AO_cd compatible

The compatible in pwm_AO_cd is wrong and does not match anything.
Correct this with the correct compatible string

Fixes: 4a81e5ddfb43 ("ARM64: dts: meson-axg: add PWM DT info for Meson-Axg SoC")
Signed-off-by: Jerome Brunet <jbrunet@baylibre.com>
Reviewed-by: Neil Armstrong <narmstrong@baylibre.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>

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ARM64: dts: meson-axg: add sec_AO system controller

add the secure AO system controller with chipid enabled

Signed-off-by: Jerome Brunet <jbrunet@baylibre.com>
Reviewed-by: Neil

ARM64: dts: meson-axg: add sec_AO system controller

add the secure AO system controller with chipid enabled

Signed-off-by: Jerome Brunet <jbrunet@baylibre.com>
Reviewed-by: Neil Armstrong <narmstrong@baylibre.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>

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ARM64: dts: meson-axg: uart: Add the pinctrl info description

Describe the pinctrl info for the UART controller which is found
in the Meson-AXG SoCs.

Signed-off-by: Yixun Lan <y

ARM64: dts: meson-axg: uart: Add the pinctrl info description

Describe the pinctrl info for the UART controller which is found
in the Meson-AXG SoCs.

Signed-off-by: Yixun Lan <yixun.lan@amlogic.com>
[khilman: s/uart_ao_b_gpioz/uart_ao_b_z/ ]
Signed-off-by: Kevin Hilman <khilman@baylibre.com>

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ARM64: dts: meson-axg: uart: drop legacy compatible name from EE UART

When update the clock info for the UART controller in the EE domain,
the driver explicitly require 'pclk' in order t

ARM64: dts: meson-axg: uart: drop legacy compatible name from EE UART

When update the clock info for the UART controller in the EE domain,
the driver explicitly require 'pclk' in order to work properly.

With current logic of the code, the driver will go for the legacy clock probe
routine if it find current compatible string match to 'amlogic,meson-uart',
which result in not requesting the 'pclk' clock, thus break the driver in the end.

Acked-by: Jerome Brunet <jbrunet@baylibre.com>
Signed-off-by: Yixun Lan <yixun.lan@amlogic.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>

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ARM64: dts: meson-axg: add RMII pins for ethernet controller

Comparing to RGMII interface, the RMII interface require few pins.
So it's worth describing them here.

Signed-off-by

ARM64: dts: meson-axg: add RMII pins for ethernet controller

Comparing to RGMII interface, the RMII interface require few pins.
So it's worth describing them here.

Signed-off-by: Yixun Lan <yixun.lan@amlogic.com>
Acked-by: Neil Armstrong <narmstrong@baylibre.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>

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ARM64: dts: meson-axg: describe pin DT info for I2C controller

Describe all the pin mux for the I2C controller which found in
Meson-AXG SoC.

Signed-off-by: Jian Hu <jian.hu@amlo

ARM64: dts: meson-axg: describe pin DT info for I2C controller

Describe all the pin mux for the I2C controller which found in
Meson-AXG SoC.

Signed-off-by: Jian Hu <jian.hu@amlogic.com>
Signed-off-by: Yixun Lan <yixun.lan@amlogic.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>

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ARM64: dts: meson-axg: add I2C DT info for Meson-AXG SoC

There are four I2C masters in EE domain, and one I2C Master in
AO domain, the DT info here should describe them all.

Sig

ARM64: dts: meson-axg: add I2C DT info for Meson-AXG SoC

There are four I2C masters in EE domain, and one I2C Master in
AO domain, the DT info here should describe them all.

Signed-off-by: Jian Hu <jian.hu@amlogic.com>
Signed-off-by: Yixun Lan <yixun.lan@amlogic.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>

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ARM64: meson-axg: enable hardware rng

Enable the hardware random generator

Signed-off-by: Jerome Brunet <jbrunet@baylibre.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>

ARM64: dts: meson: uart: fix address space range

The address space range is actually 0x18, fixed here.

Reviewed-by: Jerome Brunet <jbrunet@baylibre.com>
Signed-off-by: Yixun Lan

ARM64: dts: meson: uart: fix address space range

The address space range is actually 0x18, fixed here.

Reviewed-by: Jerome Brunet <jbrunet@baylibre.com>
Signed-off-by: Yixun Lan <yixun.lan@amlogic.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>

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ARM64: dts: meson-axg: add ethernet mac controller

Add DT info for the stmmac ethernet MAC which found in
the Amlogic's Meson-AXG SoC, also describe the ethernet
pinctrl & clock info

ARM64: dts: meson-axg: add ethernet mac controller

Add DT info for the stmmac ethernet MAC which found in
the Amlogic's Meson-AXG SoC, also describe the ethernet
pinctrl & clock information here.

Reviewed-by: Neil Armstrong <narmstrong@baylibre.com>
Signed-off-by: Yixun Lan <yixun.lan@amlogic.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>

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ARM64: dts: meson-axg: add the SPICC controller

Add DT info for the SPICC controller which found in
the Amlogic's Meson-AXG SoC.

Signed-off-by: Sunny Luo <sunny.luo@amlogic.com>

ARM64: dts: meson-axg: add the SPICC controller

Add DT info for the SPICC controller which found in
the Amlogic's Meson-AXG SoC.

Signed-off-by: Sunny Luo <sunny.luo@amlogic.com>
Signed-off-by: Yixun Lan <yixun.lan@amlogic.com>
Reviewed-by: Neil Armstrong <narmstrong@baylibre.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>

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ARM64: dts: meson-axg: enable IR controller

Enable IR remote controller which found in Amlogic's Meson-AXG SoCs.

Signed-off-by: Yixun Lan <yixun.lan@amlogic.com>
Signed-off-by:

ARM64: dts: meson-axg: enable IR controller

Enable IR remote controller which found in Amlogic's Meson-AXG SoCs.

Signed-off-by: Yixun Lan <yixun.lan@amlogic.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>

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arm64: dts: meson-axg: switch uart_ao clock to CLK81

Switch the uart_ao pclk to CLK81 since the clock driver is ready.

Signed-off-by: Yixun Lan <yixun.lan@amlogic.com>
Reviewed-

arm64: dts: meson-axg: switch uart_ao clock to CLK81

Switch the uart_ao pclk to CLK81 since the clock driver is ready.

Signed-off-by: Yixun Lan <yixun.lan@amlogic.com>
Reviewed-by: Neil Armstrong <narmstrong@baylibre.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>

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arm64: dts: meson-axg: add new reset DT node

Add reset DT node for Amlogic's Meson-AXG SoC.

Signed-off-by: Yixun Lan <yixun.lan@amlogic.com>
Reviewed-by: Neil Armstrong <narmstr

arm64: dts: meson-axg: add new reset DT node

Add reset DT node for Amlogic's Meson-AXG SoC.

Signed-off-by: Yixun Lan <yixun.lan@amlogic.com>
Reviewed-by: Neil Armstrong <narmstrong@baylibre.com>

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ARM64: dts: meson-axg: add PWM DT info for Meson-Axg SoC

Add PWM DT info for the Amlogic's Meson-Axg SoC.

Signed-off-by: Jian Hu <jian.hu@amlogic.com>
Signed-off-by: Yixun Lan <

ARM64: dts: meson-axg: add PWM DT info for Meson-Axg SoC

Add PWM DT info for the Amlogic's Meson-Axg SoC.

Signed-off-by: Jian Hu <jian.hu@amlogic.com>
Signed-off-by: Yixun Lan <yixun.lan@amlogic.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>

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ARM64: dts: meson-axg: add pinctrl DT info for Meson-AXG SoC

Add new pinctrl DT info for the Amlogic's Meson-AXG SoC.

Reviewed-by: Neil Armstrong <narmstrong@baylibre.com>
Signe

ARM64: dts: meson-axg: add pinctrl DT info for Meson-AXG SoC

Add new pinctrl DT info for the Amlogic's Meson-AXG SoC.

Reviewed-by: Neil Armstrong <narmstrong@baylibre.com>
Signed-off-by: Xingyu Chen <xingyu.chen@amlogic.com>
Signed-off-by: Yixun Lan <yixun.lan@amlogic.com>
[khilman: dropped unnecessary include]
Signed-off-by: Kevin Hilman <khilman@baylibre.com>

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arm64: dts: meson-axg: add clock DT info for Meson AXG SoC

Try to add Hiubus DT info, and also enable clock DT info
for the Amlogic's Meson-AXG SoC.

Acked-by: Rob Herring <robh@

arm64: dts: meson-axg: add clock DT info for Meson AXG SoC

Try to add Hiubus DT info, and also enable clock DT info
for the Amlogic's Meson-AXG SoC.

Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Qiufang Dai <qiufang.dai@amlogic.com>
Signed-off-by: Yixun Lan <yixun.lan@amlogic.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>

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ARM64: dts: amlogic: use generic bus node names

The DT spec recommends that node-names have generic names like "bus".
Fix that in the Amlogic DTs, while leaving the label names to have m

ARM64: dts: amlogic: use generic bus node names

The DT spec recommends that node-names have generic names like "bus".
Fix that in the Amlogic DTs, while leaving the label names to have more
SoC-specific names that match with the HW documentation.

Suggested-by: Stephen Boyd <sboyd@codeaurora.org>
Reviewed-by: Neil Armstrong <narmstrong@baylibre.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>

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