ARM64: dts: meson-axg: add sec_AO system controller

add the secure AO system controller with chipid enabled

Signed-off-by: Jerome Brunet <jbrunet@baylibre.com>
Reviewed-by: Neil Armstrong <narmstro

ARM64: dts: meson-axg: add sec_AO system controller

add the secure AO system controller with chipid enabled

Signed-off-by: Jerome Brunet <jbrunet@baylibre.com>
Reviewed-by: Neil Armstrong <narmstrong@baylibre.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>

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ARM64: dts: meson-axg: uart: Add the pinctrl info description

Describe the pinctrl info for the UART controller which is found
in the Meson-AXG SoCs.

Signed-off-by: Yixun Lan <yixun.lan@amlogic.com

ARM64: dts: meson-axg: uart: Add the pinctrl info description

Describe the pinctrl info for the UART controller which is found
in the Meson-AXG SoCs.

Signed-off-by: Yixun Lan <yixun.lan@amlogic.com>
[khilman: s/uart_ao_b_gpioz/uart_ao_b_z/ ]
Signed-off-by: Kevin Hilman <khilman@baylibre.com>

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ARM64: dts: meson-axg: uart: drop legacy compatible name from EE UART

When update the clock info for the UART controller in the EE domain,
the driver explicitly require 'pclk' in order to work prope

ARM64: dts: meson-axg: uart: drop legacy compatible name from EE UART

When update the clock info for the UART controller in the EE domain,
the driver explicitly require 'pclk' in order to work properly.

With current logic of the code, the driver will go for the legacy clock probe
routine if it find current compatible string match to 'amlogic,meson-uart',
which result in not requesting the 'pclk' clock, thus break the driver in the end.

Acked-by: Jerome Brunet <jbrunet@baylibre.com>
Signed-off-by: Yixun Lan <yixun.lan@amlogic.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>

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ARM64: dts: meson-axg: add RMII pins for ethernet controller

Comparing to RGMII interface, the RMII interface require few pins.
So it's worth describing them here.

Signed-off-by: Yixun Lan <yixun.l

ARM64: dts: meson-axg: add RMII pins for ethernet controller

Comparing to RGMII interface, the RMII interface require few pins.
So it's worth describing them here.

Signed-off-by: Yixun Lan <yixun.lan@amlogic.com>
Acked-by: Neil Armstrong <narmstrong@baylibre.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>

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ARM64: dts: meson-axg: describe pin DT info for I2C controller

Describe all the pin mux for the I2C controller which found in
Meson-AXG SoC.

Signed-off-by: Jian Hu <jian.hu@amlogic.com>
Signed-off-

ARM64: dts: meson-axg: describe pin DT info for I2C controller

Describe all the pin mux for the I2C controller which found in
Meson-AXG SoC.

Signed-off-by: Jian Hu <jian.hu@amlogic.com>
Signed-off-by: Yixun Lan <yixun.lan@amlogic.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>

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ARM64: dts: meson-axg: add I2C DT info for Meson-AXG SoC

There are four I2C masters in EE domain, and one I2C Master in
AO domain, the DT info here should describe them all.

Signed-off-by: Jian Hu

ARM64: dts: meson-axg: add I2C DT info for Meson-AXG SoC

There are four I2C masters in EE domain, and one I2C Master in
AO domain, the DT info here should describe them all.

Signed-off-by: Jian Hu <jian.hu@amlogic.com>
Signed-off-by: Yixun Lan <yixun.lan@amlogic.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>

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ARM64: meson-axg: enable hardware rng

Enable the hardware random generator

Signed-off-by: Jerome Brunet <jbrunet@baylibre.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>

ARM64: dts: meson: uart: fix address space range

The address space range is actually 0x18, fixed here.

Reviewed-by: Jerome Brunet <jbrunet@baylibre.com>
Signed-off-by: Yixun Lan <yixun.lan@amlogic.

ARM64: dts: meson: uart: fix address space range

The address space range is actually 0x18, fixed here.

Reviewed-by: Jerome Brunet <jbrunet@baylibre.com>
Signed-off-by: Yixun Lan <yixun.lan@amlogic.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>

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ARM64: dts: meson-axg: add ethernet mac controller

Add DT info for the stmmac ethernet MAC which found in
the Amlogic's Meson-AXG SoC, also describe the ethernet
pinctrl & clock information here.

R

ARM64: dts: meson-axg: add ethernet mac controller

Add DT info for the stmmac ethernet MAC which found in
the Amlogic's Meson-AXG SoC, also describe the ethernet
pinctrl & clock information here.

Reviewed-by: Neil Armstrong <narmstrong@baylibre.com>
Signed-off-by: Yixun Lan <yixun.lan@amlogic.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>

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ARM64: dts: meson-axg: add the SPICC controller

Add DT info for the SPICC controller which found in
the Amlogic's Meson-AXG SoC.

Signed-off-by: Sunny Luo <sunny.luo@amlogic.com>
Signed-off-by: Yixu

ARM64: dts: meson-axg: add the SPICC controller

Add DT info for the SPICC controller which found in
the Amlogic's Meson-AXG SoC.

Signed-off-by: Sunny Luo <sunny.luo@amlogic.com>
Signed-off-by: Yixun Lan <yixun.lan@amlogic.com>
Reviewed-by: Neil Armstrong <narmstrong@baylibre.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>

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ARM64: dts: meson-axg: enable IR controller

Enable IR remote controller which found in Amlogic's Meson-AXG SoCs.

Signed-off-by: Yixun Lan <yixun.lan@amlogic.com>
Signed-off-by: Kevin Hilman <khilma

ARM64: dts: meson-axg: enable IR controller

Enable IR remote controller which found in Amlogic's Meson-AXG SoCs.

Signed-off-by: Yixun Lan <yixun.lan@amlogic.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>

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arm64: dts: meson-axg: switch uart_ao clock to CLK81

Switch the uart_ao pclk to CLK81 since the clock driver is ready.

Signed-off-by: Yixun Lan <yixun.lan@amlogic.com>
Reviewed-by: Neil Armstrong <

arm64: dts: meson-axg: switch uart_ao clock to CLK81

Switch the uart_ao pclk to CLK81 since the clock driver is ready.

Signed-off-by: Yixun Lan <yixun.lan@amlogic.com>
Reviewed-by: Neil Armstrong <narmstrong@baylibre.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>

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arm64: dts: meson-axg: add new reset DT node

Add reset DT node for Amlogic's Meson-AXG SoC.

Signed-off-by: Yixun Lan <yixun.lan@amlogic.com>
Reviewed-by: Neil Armstrong <narmstrong@baylibre.com>

ARM64: dts: meson-axg: add PWM DT info for Meson-Axg SoC

Add PWM DT info for the Amlogic's Meson-Axg SoC.

Signed-off-by: Jian Hu <jian.hu@amlogic.com>
Signed-off-by: Yixun Lan <yixun.lan@amlogic.co

ARM64: dts: meson-axg: add PWM DT info for Meson-Axg SoC

Add PWM DT info for the Amlogic's Meson-Axg SoC.

Signed-off-by: Jian Hu <jian.hu@amlogic.com>
Signed-off-by: Yixun Lan <yixun.lan@amlogic.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>

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ARM64: dts: meson-axg: add pinctrl DT info for Meson-AXG SoC

Add new pinctrl DT info for the Amlogic's Meson-AXG SoC.

Reviewed-by: Neil Armstrong <narmstrong@baylibre.com>
Signed-off-by: Xingyu Che

ARM64: dts: meson-axg: add pinctrl DT info for Meson-AXG SoC

Add new pinctrl DT info for the Amlogic's Meson-AXG SoC.

Reviewed-by: Neil Armstrong <narmstrong@baylibre.com>
Signed-off-by: Xingyu Chen <xingyu.chen@amlogic.com>
Signed-off-by: Yixun Lan <yixun.lan@amlogic.com>
[khilman: dropped unnecessary include]
Signed-off-by: Kevin Hilman <khilman@baylibre.com>

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arm64: dts: meson-axg: add clock DT info for Meson AXG SoC

Try to add Hiubus DT info, and also enable clock DT info
for the Amlogic's Meson-AXG SoC.

Acked-by: Rob Herring <robh@kernel.org>
Signed-o

arm64: dts: meson-axg: add clock DT info for Meson AXG SoC

Try to add Hiubus DT info, and also enable clock DT info
for the Amlogic's Meson-AXG SoC.

Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Qiufang Dai <qiufang.dai@amlogic.com>
Signed-off-by: Yixun Lan <yixun.lan@amlogic.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>

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ARM64: dts: amlogic: use generic bus node names

The DT spec recommends that node-names have generic names like "bus".
Fix that in the Amlogic DTs, while leaving the label names to have more
SoC-spec

ARM64: dts: amlogic: use generic bus node names

The DT spec recommends that node-names have generic names like "bus".
Fix that in the Amlogic DTs, while leaving the label names to have more
SoC-specific names that match with the HW documentation.

Suggested-by: Stephen Boyd <sboyd@codeaurora.org>
Reviewed-by: Neil Armstrong <narmstrong@baylibre.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>

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arm64: dts: meson-axg: add initial A113D SoC DT support

Try to add basic DT support for the Amlogic's Meson-AXG A113D SoC,
which describe components as follows: Reserve Memory, CPU, GIC, IRQ,
Timer,

arm64: dts: meson-axg: add initial A113D SoC DT support

Try to add basic DT support for the Amlogic's Meson-AXG A113D SoC,
which describe components as follows: Reserve Memory, CPU, GIC, IRQ,
Timer, UART. It's capable of booting up into the serial console.

Signed-off-by: Yixun Lan <yixun.lan@amlogic.com>
Reviewed-by: Andreas Färber <afaerber@suse.de>
Reviewed-by: Neil Armstrong <narmstrong@baylibre.com>
Reviewed-by: Kevin Hilman <khilman@baylibre.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>

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Revert "arm64: dts: amlogic: add missing ethernet reset ID"

commit 19f6fe976a61f9afc289b062b7ef67f99b72e7b9 upstream.

It has been reported on IRC and in KernelCI boot tests, this ch

Revert "arm64: dts: amlogic: add missing ethernet reset ID"

commit 19f6fe976a61f9afc289b062b7ef67f99b72e7b9 upstream.

It has been reported on IRC and in KernelCI boot tests, this change breaks
internal PHY support on the Amlogic G12A/SM1 Based boards.

We suspect the added signal to reset more than the Ethernet MAC but also
the MDIO/(RG)MII mux used to redirect the MAC signals to the internal PHY.

This reverts commit f3362f0c18174a1f334a419ab7d567a36bd1b3f3 while we find
and acceptable solution to cleanly reset the Ethernet MAC.

Reported-by: Corentin Labbe <clabbe@baylibre.com>
Acked-by: Jérôme Brunet <jbrunet@baylibre.com>
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
Link: https://lore.kernel.org/r/20210126080951.2383740-1-narmstrong@baylibre.com
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>

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arm64: dts: amlogic: add missing ethernet reset ID

Add reset external reset of the ethernet mac controller

Signed-off-by: Anand Moon <linux.amoon@gmail.com>
Signed-off-by: Jerom

arm64: dts: amlogic: add missing ethernet reset ID

Add reset external reset of the ethernet mac controller

Signed-off-by: Anand Moon <linux.amoon@gmail.com>
Signed-off-by: Jerome Brunet <jbrunet@baylibre.com>
Reviewed-by: Neil Armstrong <narmstrong@baylibre.com>
Reviewed-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
Link: https://lore.kernel.org/r/20201020120141.298240-1-jbrunet@baylibre.com

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arm64: dts: meson-axg: add USB nodes

This adds the USB Glue node, with the USB2 & USB3 controllers along the single
USB2 PHY node.

Signed-off-by: Neil Armstrong <narmstrong@bayl

arm64: dts: meson-axg: add USB nodes

This adds the USB Glue node, with the USB2 & USB3 controllers along the single
USB2 PHY node.

Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Reviewed-by: Kevin Hilman <khilman@baylibre.com>
Reviewed-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>

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arm64: dts: amlogic: Add the Ethernet "timing-adjustment" clock

Add the "timing-adjustment" clock now that we know how it is connected
to the PRG_ETHERNET registers. It is used internall

arm64: dts: amlogic: Add the Ethernet "timing-adjustment" clock

Add the "timing-adjustment" clock now that we know how it is connected
to the PRG_ETHERNET registers. It is used internally to generate the
RGMII RX delay on the MAC side (if needed).

Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
Reviewed-by: Neil Armstrong <narmstrong@baylibre.com>
Link: https://lore.kernel.org/r/20200620162347.26159-1-martin.blumenstingl@googlemail.com

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arm64: dts: meson: fixup SCP sram nodes

The GX and AXG SCP sram nodes were using invalid compatible and
node names for the sram entries.

Fixup the sram entries node names, and u

arm64: dts: meson: fixup SCP sram nodes

The GX and AXG SCP sram nodes were using invalid compatible and
node names for the sram entries.

Fixup the sram entries node names, and use proper compatible for them.

It notably fixes:
sram@c8000000: 'scp-shmem@0', 'scp-shmem@200' do not match any of the regexes: '^([a-z]*-)?sram(-section)?@[a-f0-9]+$', 'pinctrl-[0-9]+'

Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
Link: https://lore.kernel.org/r/20200326165958.19274-3-narmstrong@baylibre.com

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arm64: dts: meson: add audio fifo depths

Add the property describing the depth of the audio fifo on the axg, g12a
and sm1 SoC family

Signed-off-by: Jerome Brunet <jbrunet@baylib

arm64: dts: meson: add audio fifo depths

Add the property describing the depth of the audio fifo on the axg, g12a
and sm1 SoC family

Signed-off-by: Jerome Brunet <jbrunet@baylibre.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>

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arm64: dts: meson: Link nvmem and secure-monitor nodes

The former is going to use the latter to retrieve the efuses data.

Signed-off-by: Carlo Caione <ccaione@baylibre.com>
Sign

arm64: dts: meson: Link nvmem and secure-monitor nodes

The former is going to use the latter to retrieve the efuses data.

Signed-off-by: Carlo Caione <ccaione@baylibre.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>

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