arm64: dts: meson-axg: add tdmout formatters

Add the tdm devices responsible for serializing audio samples
for i2s/tdm interfaces

Signed-off-by: Jerome Brunet <jbrunet@baylibre.com>
Signed-off-by:

arm64: dts: meson-axg: add tdmout formatters

Add the tdm devices responsible for serializing audio samples
for i2s/tdm interfaces

Signed-off-by: Jerome Brunet <jbrunet@baylibre.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>

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arm64: dts: meson-axg: add tdmin formatters

Add the tdm devices responsible for decoding the data provided
through audio serial interface.

Signed-off-by: Jerome Brunet <jbrunet@baylibre.com>
Signed

arm64: dts: meson-axg: add tdmin formatters

Add the tdm devices responsible for decoding the data provided
through audio serial interface.

Signed-off-by: Jerome Brunet <jbrunet@baylibre.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>

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arm64: dts: meson-axg: add spdifout

Add the SPDIF output device of the axg audio subsystem

Signed-off-by: Jerome Brunet <jbrunet@baylibre.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>

arm64: dts: meson-axg: add audio arb reset controller

Add the audio memory arbiter which control the access of the audio
fifos to the DDR.

Signed-off-by: Jerome Brunet <jbrunet@baylibre.com>
Signed

arm64: dts: meson-axg: add audio arb reset controller

Add the audio memory arbiter which control the access of the audio
fifos to the DDR.

Signed-off-by: Jerome Brunet <jbrunet@baylibre.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>

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ARM64: dts: meson-axg: add the audio clock controller

Add the audio clock controller which is part of the audio bus
This controller takes 8 input plls, and the usual clock gate, from the
main clock

ARM64: dts: meson-axg: add the audio clock controller

Add the audio clock controller which is part of the audio bus
This controller takes 8 input plls, and the usual clock gate, from the
main clock controller. It provides the clocs for the all the devices of
the audio subsystem, such as tdms, spdif, pdm, etc.

Signed-off-by: Jerome Brunet <jbrunet@baylibre.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>

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ARM64: dts: meson-axg: add pdm pins

Add pdm input pin definitions to meson AXG

Signed-off-by: Jerome Brunet <jbrunet@baylibre.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>

ARM64: dts: meson-axg: add spdif input pins

Add spdif input pin definitions to meson AXG

Signed-off-by: Jerome Brunet <jbrunet@baylibre.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>

ARM64: dts: meson-axg: remove spdif out from gpio a7

Spdif out in not multiplexed on gpio A7 (spdif in is)
Remove this entry to fix the problem.

Fixes: 53c03b0aff36 ("ARM64: dts: meson-axg: add spd

ARM64: dts: meson-axg: remove spdif out from gpio a7

Spdif out in not multiplexed on gpio A7 (spdif in is)
Remove this entry to fix the problem.

Fixes: 53c03b0aff36 ("ARM64: dts: meson-axg: add spdif output pins")
Signed-off-by: Jerome Brunet <jbrunet@baylibre.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>

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ARM64: dts: meson-axg: remove vddio_ao18 from SoC dtsi

Regulator should not be defined inside the SoC dtsi file.
vddio_ao18 is already defined in the S400 board dts anyway.

Fixes: bb8a2ebd0498 ("AR

ARM64: dts: meson-axg: remove vddio_ao18 from SoC dtsi

Regulator should not be defined inside the SoC dtsi file.
vddio_ao18 is already defined in the S400 board dts anyway.

Fixes: bb8a2ebd0498 ("ARM64: dts: meson-axg: add saradc support")
Signed-off-by: Jerome Brunet <jbrunet@baylibre.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>

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ARM64: dts: meson-axg: add saradc support

Add the DT info for SAR ADC of the Amlogic's Meson-AXG SoC.

Signed-off-by: Xingyu Chen <xingyu.chen@amlogic.com>
Signed-off-by: Yixun Lan <yixun.lan@amlogi

ARM64: dts: meson-axg: add saradc support

Add the DT info for SAR ADC of the Amlogic's Meson-AXG SoC.

Signed-off-by: Xingyu Chen <xingyu.chen@amlogic.com>
Signed-off-by: Yixun Lan <yixun.lan@amlogic.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>

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ARM64: dts: meson-axg: add spdif output pins

Add the different pin configurations for the spdif output

Signed-off-by: Jerome Brunet <jbrunet@baylibre.com>
Signed-off-by: Kevin Hilman <khilman@bayli

ARM64: dts: meson-axg: add spdif output pins

Add the different pin configurations for the spdif output

Signed-off-by: Jerome Brunet <jbrunet@baylibre.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>

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ARM64: dts: meson: fix register ranges for SD/eMMC

Based on updated information from Amlogic, correct the register range
for the SD/eMMC blocks to the right size.

Reported-by: Yixun Lan <yixun.lan@

ARM64: dts: meson: fix register ranges for SD/eMMC

Based on updated information from Amlogic, correct the register range
for the SD/eMMC blocks to the right size.

Reported-by: Yixun Lan <yixun.lan@amlogic.com>
Tested-by: Yixun Lan <yixun.lan@amlogic.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>

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ARM64: dts: meson: fix clock source of the pclk for UART_AO

>From the hardware perspective, the actual pclk of the AO uarts
is the corresponding clkc_ao uart gate, not the main clock controller clk8

ARM64: dts: meson: fix clock source of the pclk for UART_AO

>From the hardware perspective, the actual pclk of the AO uarts
is the corresponding clkc_ao uart gate, not the main clock controller clk81.
This was not problem so far, because the uart_gate had
the CLK_IGNORE_UNUSED flag, which kept the gate open.

We plan to remove the CLK_IGNORE_UNUSED flag in another patch,
but before doing that, we need to fix the clock in the DTS file.

Signed-off-by: Yixun Lan <yixun.lan@amlogic.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>

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ARM64: dts: meson-axg: add AO clock driver

This add the AO (Always-On part) clock DT info for Meson-AXG SoC

Signed-off-by: Qiufang Dai <qiufang.dai@amlogic.com>
Signed-off-by: Yixun Lan <yixun.lan@

ARM64: dts: meson-axg: add AO clock driver

This add the AO (Always-On part) clock DT info for Meson-AXG SoC

Signed-off-by: Qiufang Dai <qiufang.dai@amlogic.com>
Signed-off-by: Yixun Lan <yixun.lan@amlogic.com>
[khilman: cleanup subject]
Signed-off-by: Kevin Hilman <khilman@baylibre.com>

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ARM64: dts: meson-axg: add i2c AO pins

Add the pins related to the i2c AO controller of the meson-axg platform

Signed-off-by: Jerome Brunet <jbrunet@baylibre.com>
Signed-off-by: Kevin Hilman <khilm

ARM64: dts: meson-axg: add i2c AO pins

Add the pins related to the i2c AO controller of the meson-axg platform

Signed-off-by: Jerome Brunet <jbrunet@baylibre.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>

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ARM64: dts: meson-axg: correct i2c AO clock

The clock specified for the i2c AO controller is the one for the EE
domain, which is incorrect as this controller needs the clock for AO
i2c controller.

ARM64: dts: meson-axg: correct i2c AO clock

The clock specified for the i2c AO controller is the one for the EE
domain, which is incorrect as this controller needs the clock for AO
i2c controller.

Fixes: dc6f858e2690 ("ARM64: dts: meson-axg: add I2C DT info for Meson-AXG SoC")
Signed-off-by: Jerome Brunet <jbrunet@baylibre.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>

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ARM64: dts: meson-axg: clean-up i2c nodes

Remove undocumented and unused "clk_i2c" clock name and the second
interrupt from i2c nodes of meson-axg platform. Those seems to have
been copy/pasted from

ARM64: dts: meson-axg: clean-up i2c nodes

Remove undocumented and unused "clk_i2c" clock name and the second
interrupt from i2c nodes of meson-axg platform. Those seems to have
been copy/pasted from the vendor kernel

Fixes: dc6f858e2690 ("ARM64: dts: meson-axg: add I2C DT info for Meson-AXG SoC")
Signed-off-by: Jerome Brunet <jbrunet@baylibre.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>

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ARM64: dts: meson: add MMC resets

Add reset lines to the mmc controllers of the meson gx and axg SoCs

Signed-off-by: Jerome Brunet <jbrunet@baylibre.com>
Signed-off-by: Kevin Hilman <khilman@baylib

ARM64: dts: meson: add MMC resets

Add reset lines to the mmc controllers of the meson gx and axg SoCs

Signed-off-by: Jerome Brunet <jbrunet@baylibre.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>

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ARM64: dts: meson-axg: add an 32K alt aoclk

The ao_clk81 in AO domain have two clock source,
one from a 32K alt crystal we name it as ao_alt_clk,
another is the clk81 signal from EE domain.

Acked-b

ARM64: dts: meson-axg: add an 32K alt aoclk

The ao_clk81 in AO domain have two clock source,
one from a 32K alt crystal we name it as ao_alt_clk,
another is the clk81 signal from EE domain.

Acked-by: Jerome Brunet <jbrunet@baylibre.com>
Signed-off-by: Yixun Lan <yixun.lan@amlogic.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>

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ARM64: dts: meson-axg: add tdm pins

Add tdm pins to amlogic's A113 device tree

Signed-off-by: Jerome Brunet <jbrunet@baylibre.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>

ARM64: dts: meson-axg: add GPIO interrupt controller support

Add the GPIO interrupt controller driver which found in the Amlogic's
Meson-AXG SoC, the controller share the similar ASIC IP as other me

ARM64: dts: meson-axg: add GPIO interrupt controller support

Add the GPIO interrupt controller driver which found in the Amlogic's
Meson-AXG SoC, the controller share the similar ASIC IP as other meson SoCs.

Signed-off-by: Yixun Lan <yixun.lan@amlogic.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>

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ARM64: dts: meson-axg: enable the eMMC controller

The IP of eMMC controller in AXG is similiar to Meson-GX series.
Here we add the initial support of the HS200 mode with
clock running at 166MHz (to

ARM64: dts: meson-axg: enable the eMMC controller

The IP of eMMC controller in AXG is similiar to Meson-GX series.
Here we add the initial support of the HS200 mode with
clock running at 166MHz (to be safe), since we found some eMMC chip
fail to run at 200MHz due to tunning phase error.

Signed-off-by: Nan Li <nan.li@amlogic.com>
Signed-off-by: Yixun Lan <yixun.lan@amlogic.com>
[khilman: drop incorrect SDIO pwrseq property]
Signed-off-by: Kevin Hilman <khilman@baylibre.com>

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ARM64: dts: meson-axg: use hhi syscon for the clock controller

Like the meson-gx, the axg clock controller should go through a syscon
to access the hhi register region, and not directly map the regi

ARM64: dts: meson-axg: use hhi syscon for the clock controller

Like the meson-gx, the axg clock controller should go through a syscon
to access the hhi register region, and not directly map the region.
This way, the hhi register region can be used safely by multiple drivers.

Signed-off-by: Jerome Brunet <jbrunet@baylibre.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>

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ARM64: dts: amlogic: Convert to new-style SPDX license identifiers

Move the SPDX-License-Identifier lines to the top and drop the
license splat.

Signed-off-by: Neil Armstrong <narmstrong@baylibre.c

ARM64: dts: amlogic: Convert to new-style SPDX license identifiers

Move the SPDX-License-Identifier lines to the top and drop the
license splat.

Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>

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ARM64: dts: meson-axg: fix pwm_AO_cd compatible

The compatible in pwm_AO_cd is wrong and does not match anything.
Correct this with the correct compatible string

Fixes: 4a81e5ddfb43 ("ARM64: dts: m

ARM64: dts: meson-axg: fix pwm_AO_cd compatible

The compatible in pwm_AO_cd is wrong and does not match anything.
Correct this with the correct compatible string

Fixes: 4a81e5ddfb43 ("ARM64: dts: meson-axg: add PWM DT info for Meson-Axg SoC")
Signed-off-by: Jerome Brunet <jbrunet@baylibre.com>
Reviewed-by: Neil Armstrong <narmstrong@baylibre.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>

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