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Searched refs:CLKDEV_CON_ID (Results 1 – 18 of 18) sorted by relevance

/openbmc/linux/arch/sh/kernel/cpu/sh4a/
H A Dclock-sh7366.c185 CLKDEV_CON_ID("rclk", &r_clk),
186 CLKDEV_CON_ID("extal", &extal_clk),
187 CLKDEV_CON_ID("dll_clk", &dll_clk),
188 CLKDEV_CON_ID("pll_clk", &pll_clk),
204 CLKDEV_CON_ID("tlb0", &mstp_clks[MSTP031]),
205 CLKDEV_CON_ID("ic0", &mstp_clks[MSTP030]),
206 CLKDEV_CON_ID("oc0", &mstp_clks[MSTP029]),
212 CLKDEV_CON_ID("sh0", &mstp_clks[MSTP020]),
214 CLKDEV_CON_ID("ubc0", &mstp_clks[MSTP017]),
218 CLKDEV_CON_ID("mfi0", &mstp_clks[MSTP011]),
[all …]
H A Dclock-sh7343.c187 CLKDEV_CON_ID("rclk", &r_clk),
188 CLKDEV_CON_ID("extal", &extal_clk),
189 CLKDEV_CON_ID("dll_clk", &dll_clk),
190 CLKDEV_CON_ID("pll_clk", &pll_clk),
206 CLKDEV_CON_ID("tlb0", &mstp_clks[MSTP031]),
207 CLKDEV_CON_ID("ic0", &mstp_clks[MSTP030]),
208 CLKDEV_CON_ID("oc0", &mstp_clks[MSTP029]),
214 CLKDEV_CON_ID("sh0", &mstp_clks[MSTP020]),
216 CLKDEV_CON_ID("ubc0", &mstp_clks[MSTP017]),
220 CLKDEV_CON_ID("mfi0", &mstp_clks[MSTP011]),
[all …]
H A Dclock-sh7734.c180 CLKDEV_CON_ID("extal", &extal_clk),
181 CLKDEV_CON_ID("pll_clk", &pll_clk),
204 CLKDEV_CON_ID("ssi0", &mstp_clks[MSTP012]),
205 CLKDEV_CON_ID("ssi1", &mstp_clks[MSTP011]),
206 CLKDEV_CON_ID("ssi2", &mstp_clks[MSTP010]),
207 CLKDEV_CON_ID("ssi3", &mstp_clks[MSTP009]),
208 CLKDEV_CON_ID("sss", &mstp_clks[MSTP008]),
209 CLKDEV_CON_ID("hspi", &mstp_clks[MSTP007]),
214 CLKDEV_CON_ID("2dg", &mstp_clks[MSTP106]),
215 CLKDEV_CON_ID("view", &mstp_clks[MSTP103]),
[all …]
H A Dclock-sh7723.c196 CLKDEV_CON_ID("rclk", &r_clk),
197 CLKDEV_CON_ID("extal", &extal_clk),
198 CLKDEV_CON_ID("dll_clk", &dll_clk),
199 CLKDEV_CON_ID("pll_clk", &pll_clk),
202 CLKDEV_CON_ID("cpu_clk", &div4_clks[DIV4_I]),
205 CLKDEV_CON_ID("bus_clk", &div4_clks[DIV4_B]),
206 CLKDEV_CON_ID("b3_clk", &div4_clks[DIV4_B3]),
216 CLKDEV_CON_ID("tlb0", &mstp_clks[HWBLK_TLB]),
217 CLKDEV_CON_ID("ic0", &mstp_clks[HWBLK_IC]),
218 CLKDEV_CON_ID("oc0", &mstp_clks[HWBLK_OC]),
[all …]
H A Dclock-sh7786.c127 CLKDEV_CON_ID("extal", &extal_clk),
128 CLKDEV_CON_ID("pll_clk", &pll_clk),
132 CLKDEV_CON_ID("du_clk", &div4_clks[DIV4_DU]),
133 CLKDEV_CON_ID("ddr_clk", &div4_clks[DIV4_DDR]),
134 CLKDEV_CON_ID("bus_clk", &div4_clks[DIV4_B]),
136 CLKDEV_CON_ID("cpu_clk", &div4_clks[DIV4_I]),
146 CLKDEV_CON_ID("ssi3_fck", &mstp_clks[MSTP023]),
147 CLKDEV_CON_ID("ssi2_fck", &mstp_clks[MSTP022]),
148 CLKDEV_CON_ID("ssi1_fck", &mstp_clks[MSTP021]),
163 CLKDEV_CON_ID("usb_fck", &mstp_clks[MSTP112]),
[all …]
H A Dclock-sh7785.c118 CLKDEV_CON_ID("extal", &extal_clk),
119 CLKDEV_CON_ID("pll_clk", &pll_clk),
123 CLKDEV_CON_ID("du_clk", &div4_clks[DIV4_DU]),
124 CLKDEV_CON_ID("ga_clk", &div4_clks[DIV4_GA]),
125 CLKDEV_CON_ID("ddr_clk", &div4_clks[DIV4_DDR]),
126 CLKDEV_CON_ID("bus_clk", &div4_clks[DIV4_B]),
128 CLKDEV_CON_ID("umem_clk", &div4_clks[DIV4_U]),
129 CLKDEV_CON_ID("cpu_clk", &div4_clks[DIV4_I]),
139 CLKDEV_CON_ID("ssi1_fck", &mstp_clks[MSTP021]),
140 CLKDEV_CON_ID("ssi0_fck", &mstp_clks[MSTP020]),
[all …]
H A Dclock-sh7724.c261 CLKDEV_CON_ID("rclk", &r_clk),
262 CLKDEV_CON_ID("extal", &extal_clk),
263 CLKDEV_CON_ID("fll_clk", &fll_clk),
264 CLKDEV_CON_ID("pll_clk", &pll_clk),
265 CLKDEV_CON_ID("div3_clk", &div3_clk),
268 CLKDEV_CON_ID("cpu_clk", &div4_clks[DIV4_I]),
270 CLKDEV_CON_ID("bus_clk", &div4_clks[DIV4_B]),
279 CLKDEV_CON_ID("spu_clk", &div6_clks[DIV6_S]),
282 CLKDEV_CON_ID("tlb0", &mstp_clks[HWBLK_TLB]),
283 CLKDEV_CON_ID("ic0", &mstp_clks[HWBLK_IC]),
[all …]
H A Dclock-sh7722.c171 CLKDEV_CON_ID("rclk", &r_clk),
172 CLKDEV_CON_ID("extal", &extal_clk),
173 CLKDEV_CON_ID("dll_clk", &dll_clk),
174 CLKDEV_CON_ID("pll_clk", &pll_clk),
177 CLKDEV_CON_ID("cpu_clk", &div4_clks[DIV4_I]),
180 CLKDEV_CON_ID("bus_clk", &div4_clks[DIV4_B]),
181 CLKDEV_CON_ID("b3_clk", &div4_clks[DIV4_B3]),
205 CLKDEV_CON_ID("rtc0", &mstp_clks[HWBLK_RTC]),
209 CLKDEV_CON_ID("2dg0", &mstp_clks[HWBLK_2DG]),
212 CLKDEV_CON_ID("jpu0", &mstp_clks[HWBLK_JPU]),
[all …]
H A Dclock-sh7757.c104 CLKDEV_CON_ID("extal", &extal_clk),
105 CLKDEV_CON_ID("pll_clk", &pll_clk),
114 CLKDEV_CON_ID("riic0", &mstp_clks[MSTP000]),
115 CLKDEV_CON_ID("riic1", &mstp_clks[MSTP000]),
116 CLKDEV_CON_ID("riic2", &mstp_clks[MSTP000]),
117 CLKDEV_CON_ID("riic3", &mstp_clks[MSTP000]),
118 CLKDEV_CON_ID("riic4", &mstp_clks[MSTP000]),
119 CLKDEV_CON_ID("riic5", &mstp_clks[MSTP000]),
120 CLKDEV_CON_ID("riic6", &mstp_clks[MSTP000]),
121 CLKDEV_CON_ID("riic7", &mstp_clks[MSTP000]),
[all …]
H A Dclock-shx3.c102 CLKDEV_CON_ID("extal", &extal_clk),
103 CLKDEV_CON_ID("pll_clk", &pll_clk),
108 CLKDEV_CON_ID("ddr_clk", &div4_clks[DIV4_DDR]),
109 CLKDEV_CON_ID("bus_clk", &div4_clks[DIV4_B]),
110 CLKDEV_CON_ID("shyway_clk", &div4_clks[DIV4_SH]),
111 CLKDEV_CON_ID("cpu_clk", &div4_clks[DIV4_I]),
119 CLKDEV_CON_ID("h8ex_fck", &mstp_clks[MSTP003]),
120 CLKDEV_CON_ID("csm_fck", &mstp_clks[MSTP002]),
121 CLKDEV_CON_ID("fe1_fck", &mstp_clks[MSTP001]),
122 CLKDEV_CON_ID("fe0_fck", &mstp_clks[MSTP000]),
[all …]
H A Dclock-sh7763.c93 CLKDEV_CON_ID("shyway_clk", &sh7763_shyway_clk),
H A Dclock-sh7780.c99 CLKDEV_CON_ID("shyway_clk", &sh7780_shyway_clk),
/openbmc/linux/arch/sh/kernel/cpu/sh2a/
H A Dclock-sh7264.c106 CLKDEV_CON_ID("rclk", &r_clk),
107 CLKDEV_CON_ID("extal", &extal_clk),
108 CLKDEV_CON_ID("pll_clk", &pll_clk),
111 CLKDEV_CON_ID("cpu_clk", &div4_clks[DIV4_I]),
112 CLKDEV_CON_ID("peripheral_clk", &div4_clks[DIV4_P]),
123 CLKDEV_CON_ID("vdc3", &mstp_clks[MSTP74]),
125 CLKDEV_CON_ID("usb0", &mstp_clks[MSTP60]),
127 CLKDEV_CON_ID("sdhi0", &mstp_clks[MSTP34]),
128 CLKDEV_CON_ID("sdhi1", &mstp_clks[MSTP33]),
129 CLKDEV_CON_ID("adc0", &mstp_clks[MSTP32]),
[all …]
H A Dclock-sh7269.c140 CLKDEV_CON_ID("rclk", &r_clk),
141 CLKDEV_CON_ID("extal", &extal_clk),
142 CLKDEV_CON_ID("pll_clk", &pll_clk),
143 CLKDEV_CON_ID("peripheral_clk", &peripheral1_clk),
146 CLKDEV_CON_ID("cpu_clk", &div4_clks[DIV4_I]),
147 CLKDEV_CON_ID("bus_clk", &div4_clks[DIV4_B]),
159 CLKDEV_CON_ID("usb0", &mstp_clks[MSTP60]),
161 CLKDEV_CON_ID("adc0", &mstp_clks[MSTP32]),
162 CLKDEV_CON_ID("rtc0", &mstp_clks[MSTP30]),
/openbmc/linux/arch/sh/kernel/cpu/
H A Dclock-cpg.c41 CLKDEV_CON_ID("master_clk", &master_clk),
42 CLKDEV_CON_ID("peripheral_clk", &peripheral_clk),
43 CLKDEV_CON_ID("bus_clk", &bus_clk),
44 CLKDEV_CON_ID("cpu_clk", &cpu_clk),
/openbmc/linux/arch/sh/kernel/cpu/sh4/
H A Dclock-sh4-202.c149 CLKDEV_CON_ID("emi_clk", &sh4202_emi_clk),
150 CLKDEV_CON_ID("femi_clk", &sh4202_femi_clk),
151 CLKDEV_CON_ID("shoc_clk", &sh4202_shoc_clk),
/openbmc/linux/include/linux/
H A Dsh_clk.h200 #define CLKDEV_CON_ID(_id, _clk) { .con_id = _id, .clk = _clk } macro
/openbmc/linux/arch/sh/boards/mach-highlander/
H A Dsetup.c337 CLKDEV_CON_ID("ivdr_clk", &ivdr_clk),