Lines Matching refs:CLKDEV_CON_ID
261 CLKDEV_CON_ID("rclk", &r_clk),
262 CLKDEV_CON_ID("extal", &extal_clk),
263 CLKDEV_CON_ID("fll_clk", &fll_clk),
264 CLKDEV_CON_ID("pll_clk", &pll_clk),
265 CLKDEV_CON_ID("div3_clk", &div3_clk),
268 CLKDEV_CON_ID("cpu_clk", &div4_clks[DIV4_I]),
269 CLKDEV_CON_ID("shyway_clk", &div4_clks[DIV4_SH]),
270 CLKDEV_CON_ID("bus_clk", &div4_clks[DIV4_B]),
271 CLKDEV_CON_ID("peripheral_clk", &div4_clks[DIV4_P]),
272 CLKDEV_CON_ID("vpu_clk", &div4_clks[DIV4_M1]),
275 CLKDEV_CON_ID("video_clk", &div6_clks[DIV6_V]),
276 CLKDEV_CON_ID("fsia_clk", &div6_clks[DIV6_FA]),
277 CLKDEV_CON_ID("fsib_clk", &div6_clks[DIV6_FB]),
278 CLKDEV_CON_ID("irda_clk", &div6_clks[DIV6_I]),
279 CLKDEV_CON_ID("spu_clk", &div6_clks[DIV6_S]),
282 CLKDEV_CON_ID("tlb0", &mstp_clks[HWBLK_TLB]),
283 CLKDEV_CON_ID("ic0", &mstp_clks[HWBLK_IC]),
284 CLKDEV_CON_ID("oc0", &mstp_clks[HWBLK_OC]),
285 CLKDEV_CON_ID("rs0", &mstp_clks[HWBLK_RSMEM]),
286 CLKDEV_CON_ID("ilmem0", &mstp_clks[HWBLK_ILMEM]),
287 CLKDEV_CON_ID("l2c0", &mstp_clks[HWBLK_L2C]),
288 CLKDEV_CON_ID("fpu0", &mstp_clks[HWBLK_FPU]),
289 CLKDEV_CON_ID("intc0", &mstp_clks[HWBLK_INTC]),
291 CLKDEV_CON_ID("sh0", &mstp_clks[HWBLK_SHYWAY]),
292 CLKDEV_CON_ID("hudi0", &mstp_clks[HWBLK_HUDI]),
293 CLKDEV_CON_ID("ubc0", &mstp_clks[HWBLK_UBC]),
312 CLKDEV_CON_ID("rtc0", &mstp_clks[HWBLK_RTC]),
317 CLKDEV_CON_ID("atapi0", &mstp_clks[HWBLK_ATAPI]),
318 CLKDEV_CON_ID("tpu0", &mstp_clks[HWBLK_TPU]),
319 CLKDEV_CON_ID("irda0", &mstp_clks[HWBLK_IRDA]),
320 CLKDEV_CON_ID("tsif0", &mstp_clks[HWBLK_TSIF]),
323 CLKDEV_CON_ID("usb1", &mstp_clks[HWBLK_USB1]),
324 CLKDEV_CON_ID("usb0", &mstp_clks[HWBLK_USB0]),
325 CLKDEV_CON_ID("2dg0", &mstp_clks[HWBLK_2DG]),
328 CLKDEV_CON_ID("veu1", &mstp_clks[HWBLK_VEU1]),
330 CLKDEV_CON_ID("beu1", &mstp_clks[HWBLK_BEU1]),
331 CLKDEV_CON_ID("2ddmac0", &mstp_clks[HWBLK_2DDMAC]),
333 CLKDEV_CON_ID("jpu0", &mstp_clks[HWBLK_JPU]),
335 CLKDEV_CON_ID("beu0", &mstp_clks[HWBLK_BEU0]),
337 CLKDEV_CON_ID("veu0", &mstp_clks[HWBLK_VEU0]),
338 CLKDEV_CON_ID("vpu0", &mstp_clks[HWBLK_VPU]),