arm64: dts: hikey960: Remove deprecated MMC properties

Remove deprecated MMC properties for hi3660

Signed-off-by: Ryan Grachek <ryan@edited.us>
Signed-off-by: Wei Xu <xuwei5@hisilicon.com>

scsi: arm64: dts: add ufs dts node

arm64: dts: add ufs node for Hisilicon.

Signed-off-by: Li Wei <liwei213@huawei.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Tested-by: John Stultz <john.stultz

scsi: arm64: dts: add ufs dts node

arm64: dts: add ufs node for Hisilicon.

Signed-off-by: Li Wei <liwei213@huawei.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Tested-by: John Stultz <john.stultz@linaro.org>
Acked-by: Wei Xu <xuwei5@hisilicon.com>
Signed-off-by: Martin K. Petersen <martin.petersen@oracle.com>

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arm64: dts: hi3660: Add pcie msi interrupt attribute

Add pcie msi interrupt attribute for hi3660 SOC.

Signed-off-by: Yao Chen <chenyao11@huawei.com>
Signed-off-by: Wei Xu <xuwei5@hisilicon.com>

arm64: dts: hi3660: Add thermal cooling management

Add nodes and properties for thermal cooling management support.

Signed-off-by: Tao Wang <jean.wangtao@linaro.org>
Signed-off-by: Leo Yan <leo.yan

arm64: dts: hi3660: Add thermal cooling management

Add nodes and properties for thermal cooling management support.

Signed-off-by: Tao Wang <jean.wangtao@linaro.org>
Signed-off-by: Leo Yan <leo.yan@linaro.org>
Signed-off-by: Wei Xu <xuwei5@hisilicon.com>

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arm64: dts: hi3660: Add CPU frequency scaling support

Add two CPU OPP tables, one table is corresponding to one cluster,
which allow CPU frequency scaling on hi3660 platforms.

Signed-off-by: Leo Ya

arm64: dts: hi3660: Add CPU frequency scaling support

Add two CPU OPP tables, one table is corresponding to one cluster,
which allow CPU frequency scaling on hi3660 platforms.

Signed-off-by: Leo Yan <leo.yan@linaro.org>
Signed-off-by: Wei Xu <xuwei5@hisilicon.com>

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arm64: dts: hi3660: Add stub clock node

Add stub clock node for hi3660 platform.

Reviewed-by: Leo Yan <leo.yan@linaro.org>
Signed-off-by: Kaihua Zhong <zhongkaihua@huawei.com>
Signed-off-by: Leo Ya

arm64: dts: hi3660: Add stub clock node

Add stub clock node for hi3660 platform.

Reviewed-by: Leo Yan <leo.yan@linaro.org>
Signed-off-by: Kaihua Zhong <zhongkaihua@huawei.com>
Signed-off-by: Leo Yan <leo.yan@linaro.org>
Signed-off-by: Wei Xu <xuwei5@hisilicon.com>

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arm64: dts: hi3660: Add mailbox node

Add the mailbox controller node for hi3660 platform.

Signed-off-by: Kaihua Zhong <zhongkaihua@huawei.com>
Signed-off-by: Leo Yan <leo.yan@linaro.org>
Signed-off

arm64: dts: hi3660: Add mailbox node

Add the mailbox controller node for hi3660 platform.

Signed-off-by: Kaihua Zhong <zhongkaihua@huawei.com>
Signed-off-by: Leo Yan <leo.yan@linaro.org>
Signed-off-by: Wei Xu <xuwei5@hisilicon.com>

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arm64: dts: hi3660: remove 'num-slots' property for dwmmc

Since 'num-slots' had already deprecated, remove the property in
device-tree file.

Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com>
Si

arm64: dts: hi3660: remove 'num-slots' property for dwmmc

Since 'num-slots' had already deprecated, remove the property in
device-tree file.

Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com>
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>

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arm64: dts: Hi3660: Remove 'CPU_NAP' idle state

Thanks a lot for Vincent Guittot careful work to find bug for 'CPU_NAP'
idle state. At early time, the CPU CA73 CPU_NAP idle state has been
supported

arm64: dts: Hi3660: Remove 'CPU_NAP' idle state

Thanks a lot for Vincent Guittot careful work to find bug for 'CPU_NAP'
idle state. At early time, the CPU CA73 CPU_NAP idle state has been
supported on Hikey960. Later we found the system has the hang issue
and for resolving this issue Hisilicon released new MCU firmware, but
unfortunately the new MCU firmware has side effect and results in the
CA73 CPU cannot really enter CPU_NAP state and roll back to WFI state.

After discussion we cannot see the possibility to enable CA73 CPU_NAP
state anymore on Hikey960, based on this conclusion we should remove
this state from DT binding.

Cc: Daniel Lezcano <daniel.lezcano@linaro.org>
Cc: Kevin Wang <jean.wangtao@linaro.org>
Cc: Vincent Guittot <vincent.guittot@linaro.org>
Signed-off-by: Leo Yan <leo.yan@linaro.org>
Tested-by: Vincent Guittot <vincent.guittot@linaro.org>
Signed-off-by: Wei Xu <xuwei5@hisilicon.com>

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arm64: dts: hisilicon: Add hi3660 cpu capacity-dmips-mhz information

The following dt entries are added:
cpus [0-3] (Cortex A53):
- capacity-dmips-mhz = <592>;

cpus [4-7] (Cortex A73):
- ca

arm64: dts: hisilicon: Add hi3660 cpu capacity-dmips-mhz information

The following dt entries are added:
cpus [0-3] (Cortex A53):
- capacity-dmips-mhz = <592>;

cpus [4-7] (Cortex A73):
- capacity-dmips-mhz = <1024>;

Those values were obtained by running dhrystone 2.1 on a
HiKey960 with the following procedure:
- Offline all CPUs but CPU0 (A53)
- Set CPU0 frequency to maximum
- Run Dhrystone 2.1 for 20 seconds

- Offline all CPUs but CPU4 (A73)
- set CPU4 frequency to maximum
- Run Dhrystone 2.1 for 20 seconds

The results are as follows:
A53: 129633887 loops
A73: 287034147 loops

By scaling those values so that the A73s use 1024, we end up with 462
for the A53s. However, they have different maximum frequencies:
1.844GHz for A53s and 2.362GHz for A73s. Thus, we can scale the A53
value to truly represent dmips per MHz, and we end up with 592.

The impact of this change can be verified on HiKey960:

$ cat /sys/devices/system/cpu/cpu*/cpufreq/scaling_cur_freq
1844000
1844000
1844000
1844000
2362000
2362000
2362000
2362000

$ cat /sys/devices/system/cpu/cpu*/cpu_capacity
462
462
462
462
1024
1024
1024
1024

Signed-off-by: Valentin Schneider <valentin.schneider@arm.com>
Reviewed-by: Leo Yan <leo.yan@linaro.org>
Signed-off-by: Wei Xu <xuwei5@hisilicon.com>

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arm64: dts: hi3660: improve pmu description

cortex-a73 pmu driver is supported now. hi3660 is 4*a73 + 4*a53, so it
should use "cortex-a73-pmu" and "cortex-a53-pmu" instead of "armpmu-v3",
then we ca

arm64: dts: hi3660: improve pmu description

cortex-a73 pmu driver is supported now. hi3660 is 4*a73 + 4*a53, so it
should use "cortex-a73-pmu" and "cortex-a53-pmu" instead of "armpmu-v3",
then we can use the a73 and a53 events in perf tool directly.

Signed-off-by: Xu YiPing <xuyiping@hisilicon.com>
Signed-off-by: Wei Xu <xuwei5@hisilicon.com>

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License cleanup: add SPDX GPL-2.0 license identifier to files with no license

Many source files in the tree are missing licensing information, which
makes it harder for compliance tools to determine

License cleanup: add SPDX GPL-2.0 license identifier to files with no license

Many source files in the tree are missing licensing information, which
makes it harder for compliance tools to determine the correct license.

By default all files without license information are under the default
license of the kernel, which is GPL version 2.

Update the files which contain no license information with the 'GPL-2.0'
SPDX license identifier. The SPDX identifier is a legally binding
shorthand, which can be used instead of the full boiler plate text.

This patch is based on work done by Thomas Gleixner and Kate Stewart and
Philippe Ombredanne.

How this work was done:

Patches were generated and checked against linux-4.14-rc6 for a subset of
the use cases:
- file had no licensing information it it.
- file was a */uapi/* one with no licensing information in it,
- file was a */uapi/* one with existing licensing information,

Further patches will be generated in subsequent months to fix up cases
where non-standard license headers were used, and references to license
had to be inferred by heuristics based on keywords.

The analysis to determine which SPDX License Identifier to be applied to
a file was done in a spreadsheet of side by side results from of the
output of two independent scanners (ScanCode & Windriver) producing SPDX
tag:value files created by Philippe Ombredanne. Philippe prepared the
base worksheet, and did an initial spot review of a few 1000 files.

The 4.13 kernel was the starting point of the analysis with 60,537 files
assessed. Kate Stewart did a file by file comparison of the scanner
results in the spreadsheet to determine which SPDX license identifier(s)
to be applied to the file. She confirmed any determination that was not
immediately clear with lawyers working with the Linux Foundation.

Criteria used to select files for SPDX license identifier tagging was:
- Files considered eligible had to be source code files.
- Make and config files were included as candidates if they contained >5
lines of source
- File already had some variant of a license header in it (even if <5
lines).

All documentation files were explicitly excluded.

The following heuristics were used to determine which SPDX license
identifiers to apply.

- when both scanners couldn't find any license traces, file was
considered to have no license information in it, and the top level
COPYING file license applied.

For non */uapi/* files that summary was:

SPDX license identifier # files
---------------------------------------------------|-------
GPL-2.0 11139

and resulted in the first patch in this series.

If that file was a */uapi/* path one, it was "GPL-2.0 WITH
Linux-syscall-note" otherwise it was "GPL-2.0". Results of that was:

SPDX license identifier # files
---------------------------------------------------|-------
GPL-2.0 WITH Linux-syscall-note 930

and resulted in the second patch in this series.

- if a file had some form of licensing information in it, and was one
of the */uapi/* ones, it was denoted with the Linux-syscall-note if
any GPL family license was found in the file or had no licensing in
it (per prior point). Results summary:

SPDX license identifier # files
---------------------------------------------------|------
GPL-2.0 WITH Linux-syscall-note 270
GPL-2.0+ WITH Linux-syscall-note 169
((GPL-2.0 WITH Linux-syscall-note) OR BSD-2-Clause) 21
((GPL-2.0 WITH Linux-syscall-note) OR BSD-3-Clause) 17
LGPL-2.1+ WITH Linux-syscall-note 15
GPL-1.0+ WITH Linux-syscall-note 14
((GPL-2.0+ WITH Linux-syscall-note) OR BSD-3-Clause) 5
LGPL-2.0+ WITH Linux-syscall-note 4
LGPL-2.1 WITH Linux-syscall-note 3
((GPL-2.0 WITH Linux-syscall-note) OR MIT) 3
((GPL-2.0 WITH Linux-syscall-note) AND MIT) 1

and that resulted in the third patch in this series.

- when the two scanners agreed on the detected license(s), that became
the concluded license(s).

- when there was disagreement between the two scanners (one detected a
license but the other didn't, or they both detected different
licenses) a manual inspection of the file occurred.

- In most cases a manual inspection of the information in the file
resulted in a clear resolution of the license that should apply (and
which scanner probably needed to revisit its heuristics).

- When it was not immediately clear, the license identifier was
confirmed with lawyers working with the Linux Foundation.

- If there was any question as to the appropriate license identifier,
the file was flagged for further research and to be revisited later
in time.

In total, over 70 hours of logged manual review was done on the
spreadsheet to determine the SPDX license identifiers to apply to the
source files by Kate, Philippe, Thomas and, in some cases, confirmation
by lawyers working with the Linux Foundation.

Kate also obtained a third independent scan of the 4.13 code base from
FOSSology, and compared selected files where the other two scanners
disagreed against that SPDX file, to see if there was new insights. The
Windriver scanner is based on an older version of FOSSology in part, so
they are related.

Thomas did random spot checks in about 500 files from the spreadsheets
for the uapi headers and agreed with SPDX license identifier in the
files he inspected. For the non-uapi files Thomas did random spot checks
in about 15000 files.

In initial set of patches against 4.14-rc6, 3 files were found to have
copy/paste license identifier errors, and have been fixed to reflect the
correct identifier.

Additionally Philippe spent 10 hours this week doing a detailed manual
inspection and review of the 12,461 patched files from the initial patch
version early this week with:
- a full scancode scan run, collecting the matched texts, detected
license ids and scores
- reviewing anything where there was a license detected (about 500+
files) to ensure that the applied SPDX license was correct
- reviewing anything where there was no detection but the patch license
was not GPL-2.0 WITH Linux-syscall-note to ensure that the applied
SPDX license was correct

This produced a worksheet with 20 files needing minor correction. This
worksheet was then exported into 3 different .csv files for the
different types of files to be modified.

These .csv files were then reviewed by Greg. Thomas wrote a script to
parse the csv files and add the proper SPDX tag to the file, in the
format that the file expected. This script was further refined by Greg
based on the output to detect more types of files automatically and to
distinguish between header and source .c files (which need different
comment types.) Finally Greg ran the script using the .csv files to
generate the patches.

Reviewed-by: Kate Stewart <kstewart@linuxfoundation.org>
Reviewed-by: Philippe Ombredanne <pombredanne@nexb.com>
Reviewed-by: Thomas Gleixner <tglx@linutronix.de>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>

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arm64: dts: Register Hi3660's thermal sensor

Add binding for tsensor on H3660, this tsensor is used for
SoC thermal control, it supports alarm interrupt.

Signed-off-by: Kevin Wangtao <kevin.wangtao

arm64: dts: Register Hi3660's thermal sensor

Add binding for tsensor on H3660, this tsensor is used for
SoC thermal control, it supports alarm interrupt.

Signed-off-by: Kevin Wangtao <kevin.wangtao@linaro.org>
Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
Signed-off-by: Wei Xu <xuwei5@hisilicon.com>

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arm64: dts: hi3660: enable watchdog

This patch is to add watchdog binding for Hi3660 on Hikey960 board.

Cc: Guodong Xu <guodong.xu@linaro.org>
Cc: Zhong Kaihua <zhongkaihua@huawei.com>
Signed-off-b

arm64: dts: hi3660: enable watchdog

This patch is to add watchdog binding for Hi3660 on Hikey960 board.

Cc: Guodong Xu <guodong.xu@linaro.org>
Cc: Zhong Kaihua <zhongkaihua@huawei.com>
Signed-off-by: Leo Yan <leo.yan@linaro.org>
Signed-off-by: Wei Xu <xuwei5@hisilicon.com>

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arm64: dts: hi3660: add bindings for DMA

Add bindings for DMA.

Signed-off-by: Wang Ruyi <wangruyi@huawei.com>
Signed-off-by: Guodong Xu <guodong.xu@linaro.org>
Signed-off-by: Wei Xu <xuwei5@hisilic

arm64: dts: hi3660: add bindings for DMA

Add bindings for DMA.

Signed-off-by: Wang Ruyi <wangruyi@huawei.com>
Signed-off-by: Guodong Xu <guodong.xu@linaro.org>
Signed-off-by: Wei Xu <xuwei5@hisilicon.com>

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arm64: dts: hi3660: Reset the mmc hosts

Add reset-names = "reset" into mmc nodes.

Signed-off-by: Guodong Xu <guodong.xu@linaro.org>
Signed-off-by: Wei Xu <xuwei5@hisilicon.com>

arm64: dts: hi3660: add pmu dt node for hi3660

Add pmu dt node for hi3660

Signed-off-by: YiPing Xu <xuyiping@hisilicon.com>
Signed-off-by: Zhong Kaihua <zhongkaihua@huawei.com>
Signed-off-by: Leo Y

arm64: dts: hi3660: add pmu dt node for hi3660

Add pmu dt node for hi3660

Signed-off-by: YiPing Xu <xuyiping@hisilicon.com>
Signed-off-by: Zhong Kaihua <zhongkaihua@huawei.com>
Signed-off-by: Leo Yan <leo.yan@linaro.org>
Tested-by: Jumana Mundichipparakkal <jumana.mp@arm.com>
Signed-off-by: Wei Xu <xuwei5@hisilicon.com>

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arm64: dts: hi3660: add L2 cache topology

This patch adds the L2 cache topology on 96boards Hikey960.

Signed-off-by: Leo Yan <leo.yan@linaro.org>
Signed-off-by: Wei Xu <xuwei5@hisilicon.com>

arm64: dts: hi3660: enable idle states

There are two clusters on the Hi3660, the first one is Cortex-A53 based
and the other one is Cortex-A73 based. These two clusters have different
idle states.

arm64: dts: hi3660: enable idle states

There are two clusters on the Hi3660, the first one is Cortex-A53 based
and the other one is Cortex-A73 based. These two clusters have different
idle states.

Thanks to Daniel Lezcano's recent changes, the generic ARM cpuidle
driver can now support several clusters with different idle states, thus
supporting the big.Little architecture.

In addition to the WFI idle state which is the default shallowest state
for all ARM cpus, the Hi3660 supports the following states:

- CA53 CPUs:
- CPU_SLEEP: CPU power off state
- CLUSTER_SLEEP_0: Cluster power off state

- CA73 CPUs:
- CPU_NAP: CPU retention state
- CPU_SLEEP: CPU power off state
- CLUSTER_SLEEP_1: Cluster power off state

This patch adds the idle states description for the Hi3660 to the device
tree.

Cc: Kevin Wang <jean.wangtao@linaro.org>
Signed-off-by: Leo Yan <leo.yan@linaro.org>
Acked-by: Daniel Lezcano <daniel.lezcano@linaro.org>
Signed-off-by: Wei Xu <xuwei5@hisilicon.com>

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arm64: dts: hi3660: add sd/sdio device nodes

Add sd/sdio device nodes for hi3660 soc

Signed-off-by: Li Wei <liwei213@huawei.com>
Signed-off-by: Chen Jun <chenjun14@huawei.com>
Signed-off-by: Wei Xu

arm64: dts: hi3660: add sd/sdio device nodes

Add sd/sdio device nodes for hi3660 soc

Signed-off-by: Li Wei <liwei213@huawei.com>
Signed-off-by: Chen Jun <chenjun14@huawei.com>
Signed-off-by: Wei Xu <xuwei5@hisilicon.com>

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arm64: dts: hisi: add kirin pcie node

Add PCIe node for hi3660

Cc: Guodong Xu <guodong.xu@linaro.org>
Signed-off-by: Xiaowei Song <songxiaowei@hisilicon.com>
Acked-by: Arnd Bergmann <arnd@arndb.de>

arm64: dts: hisi: add kirin pcie node

Add PCIe node for hi3660

Cc: Guodong Xu <guodong.xu@linaro.org>
Signed-off-by: Xiaowei Song <songxiaowei@hisilicon.com>
Acked-by: Arnd Bergmann <arnd@arndb.de>

Changes in v5:
* fix interrupt-map, to conform to gic's #address-cells = <0>
* remove redundant status = "ok"
Signed-off-by: Wei Xu <xuwei5@hisilicon.com>

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arm64: dts: hi3660: add sp804 timer node

The Hi3660 SoC comes with the sp804 timer in addition to the
architecture timers. These ones are shutdown when reaching a deep idle
states and a backup timer

arm64: dts: hi3660: add sp804 timer node

The Hi3660 SoC comes with the sp804 timer in addition to the
architecture timers. These ones are shutdown when reaching a deep idle
states and a backup timer is needed. The sp804 belongs to another power
domain and can fulfill the purpose of replacing temporarily an
architecture timer when the CPU is idle.

Describe it in the device tree, so it can be enabled at boot time.

Suggested-by: Daniel Lezcano <daniel.lezcano@linaro.org>
Acked-by: Daniel Lezcano <daniel.lezcano@linaro.org>
Signed-off-by: Leo Yan <leo.yan@linaro.org>
Signed-off-by: Wei Xu <xuwei5@hisilicon.com>

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arm64: dts: hi3660: add spi device nodes

Add spi2 and spi3 device nodes for hi3660, and enable them for hikey960.

On HiKey960:
- SPI2 is wired out through low speed expansion connector.
- SPI3 is

arm64: dts: hi3660: add spi device nodes

Add spi2 and spi3 device nodes for hi3660, and enable them for hikey960.

On HiKey960:
- SPI2 is wired out through low speed expansion connector.
- SPI3 is wired out through high speed expansion connector.

Signed-off-by: Wang Xiaoyin <hw.wangxiaoyin@hisilicon.com>
Signed-off-by: Guodong Xu <guodong.xu@linaro.org>
Signed-off-by: Wei Xu <xuwei5@hisilicon.com>

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arm64: dts: hi3660: Add pl031 rtc node

Add dts node to enable pl031 rtc.

Signed-off-by: Chen Feng <puck.chen@hisilicon.com>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Wei Xu <xuwei5@his

arm64: dts: hi3660: Add pl031 rtc node

Add dts node to enable pl031 rtc.

Signed-off-by: Chen Feng <puck.chen@hisilicon.com>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Wei Xu <xuwei5@hisilicon.com>

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arm64: dts: hi3660: Add uarts nodes

Add nodes uart0 to uart4 and uart6 for hi3660 SoC.
Enable uart3 and uart6, disable uart5, in hikey960 board dts.

On HiKey960:
- UART6 is used as default console

arm64: dts: hi3660: Add uarts nodes

Add nodes uart0 to uart4 and uart6 for hi3660 SoC.
Enable uart3 and uart6, disable uart5, in hikey960 board dts.

On HiKey960:
- UART6 is used as default console, and is wired out through low speed
expansion connector.
- UART3 has RTS/CTS hardware handshake, and is wired out through low
speed expansion connector.
- UART5 is not used in commercial launched boards. So disable it.
- UART4 is connected to Bluetooth, WL1837.

Signed-off-by: Chen Feng <puck.chen@hisilicon.com>
Signed-off-by: Wang Xiaoyin <hw.wangxiaoyin@hisilicon.com>
Signed-off-by: Guodong Xu <guodong.xu@linaro.org>
Reviewed-by: Zhangfei Gao <zhangfei.gao@hisilicon.com>
Signed-off-by: Wei Xu <xuwei5@hisilicon.com>

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