| /openbmc/linux/Documentation/devicetree/bindings/soc/qcom/ |
| H A D | qcom,dcc.yaml | 4 $id: http://devicetree.org/schemas/soc/qcom/qcom,dcc.yaml#
21 - qcom,sm8150-dcc
22 - qcom,sc7280-dcc
23 - qcom,sc7180-dcc
24 - qcom,sdm845-dcc
25 - const: qcom,dcc
41 compatible = "qcom,sm8150-dcc", "qcom,dcc";
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| /openbmc/linux/Documentation/ABI/testing/ |
| H A D | debugfs-driver-dcc | 1 What: /sys/kernel/debug/dcc/.../ready
5 This file is used to check the status of the dcc
7 A 'Y' here indicates dcc is ready.
9 What: /sys/kernel/debug/dcc/.../trigger
17 What: /sys/kernel/debug/dcc/.../config_reset
22 a dcc driver to the default configuration. When '1'
27 What: /sys/kernel/debug/dcc/.../[list-number]/config
34 can be one of following dcc instructions: read,
117 the dcc hardware. A file named "enable" is in the
122 On enabling the dcc, all the addresses specified
[all …]
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| /openbmc/u-boot/arch/arm/dts/ |
| H A D | zynqmp-mini.dts | 19 serial0 = &dcc;
31 dcc: dcc { label
32 compatible = "arm,dcc";
38 &dcc {
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| H A D | zynqmp-mini-emmc0.dts | 19 serial0 = &dcc;
32 dcc: dcc { label
33 compatible = "arm,dcc";
62 &dcc {
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| H A D | zynqmp-mini-emmc1.dts | 19 serial0 = &dcc;
32 dcc: dcc { label
33 compatible = "arm,dcc";
62 &dcc {
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| H A D | versal-mini.dts | 19 serial0 = &dcc;
31 dcc: dcc { label
32 compatible = "arm,dcc";
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| H A D | zynqmp-mini-qspi.dts | 20 serial0 = &dcc;
33 dcc: dcc { label
34 compatible = "arm,dcc";
77 &dcc {
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| H A D | zynq-cse-nand.dts | 16 serial0 = &dcc;
28 dcc: dcc { label
29 compatible = "arm,dcc";
77 &dcc {
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| H A D | zynq-cse-nor.dts | 17 serial0 = &dcc;
29 dcc: dcc { label
30 compatible = "arm,dcc";
84 &dcc {
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| H A D | versal-mini-emmc1.dts | 25 dcc: dcc { label
26 compatible = "arm,dcc";
52 serial0 = &dcc;
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| H A D | versal-mini-emmc0.dts | 25 dcc: dcc { label
26 compatible = "arm,dcc";
52 serial0 = &dcc;
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| H A D | zynqmp-mini-nand.dts | 20 serial0 = &dcc;
32 dcc: dcc { label
33 compatible = "arm,dcc";
106 &dcc {
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| H A D | zynq-cse-qspi.dtsi | 17 serial0 = &dcc;
29 dcc: dcc { label
30 compatible = "arm,dcc";
123 &dcc {
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| H A D | zynqmp-zc1254-revA.dts | 22 serial1 = &dcc;
37 &dcc {
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| H A D | zynqmp-zc1275-revA.dts | 22 serial1 = &dcc;
37 &dcc {
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| H A D | zynqmp-zc1275-revB.dts | 22 serial1 = &dcc;
38 &dcc {
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| /openbmc/linux/fs/f2fs/ |
| H A D | segment.c | 1253 &(dcc->fstrim_list) : &(dcc->wait_list); in __submit_discard_cmd()
1567 dc = __lookup_discard_cmd_ret(&dcc->root, dcc->next_pos, in __issue_discard_cmd_orderly()
1601 dcc->next_pos = 0; in __issue_discard_cmd_orderly()
1737 &(dcc->fstrim_list) : &(dcc->wait_list); in __wait_discard_cmd_range()
1839 if (dcc && dcc->f2fs_issue_discard) { in f2fs_stop_discard_thread()
1890 dcc->discard_wake, in issue_discard_thread()
2273 if (!dcc) in create_discard_cmd_control()
2301 dcc->next_pos = 0; in create_discard_cmd_control()
2310 kfree(dcc); in create_discard_cmd_control()
2321 if (!dcc) in destroy_discard_cmd_control()
[all …]
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| /openbmc/qemu/hw/misc/ |
| H A D | arm_sysctl.c | 257 static bool vexpress_cfgctrl_read(arm_sysctl_state *s, unsigned int dcc, in vexpress_cfgctrl_read() argument
265 if (dcc != 0 || position != 0 || in vexpress_cfgctrl_read()
304 function, dcc, site, position, device); in vexpress_cfgctrl_read()
318 static bool vexpress_cfgctrl_write(arm_sysctl_state *s, unsigned int dcc, in vexpress_cfgctrl_write() argument
326 if (dcc != 0 || position != 0 || in vexpress_cfgctrl_write()
383 function, dcc, site, position, device); in vexpress_cfgctrl_write()
525 unsigned int dcc = extract32(s->sys_cfgctrl, 26, 4); in arm_sysctl_write() local
532 if (!vexpress_cfgctrl_write(s, dcc, function, site, position, in arm_sysctl_write()
538 if (!vexpress_cfgctrl_read(s, dcc, function, site, position, in arm_sysctl_write()
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| /openbmc/linux/drivers/gpu/drm/amd/display/dc/dcn30/ |
| H A D | dcn30_hubp.c | 351 struct dc_plane_dcc_param *dcc) in hubp3_dcc_control_sienna_cichlid() argument
356 PRIMARY_SURFACE_DCC_EN, dcc->enable, in hubp3_dcc_control_sienna_cichlid()
357 PRIMARY_SURFACE_DCC_IND_BLK, dcc->dcc_ind_blk, in hubp3_dcc_control_sienna_cichlid()
358 PRIMARY_SURFACE_DCC_IND_BLK_C, dcc->dcc_ind_blk_c, in hubp3_dcc_control_sienna_cichlid()
359 SECONDARY_SURFACE_DCC_EN, dcc->enable, in hubp3_dcc_control_sienna_cichlid()
360 SECONDARY_SURFACE_DCC_IND_BLK, dcc->dcc_ind_blk, in hubp3_dcc_control_sienna_cichlid()
361 SECONDARY_SURFACE_DCC_IND_BLK_C, dcc->dcc_ind_blk_c); in hubp3_dcc_control_sienna_cichlid()
401 struct dc_plane_dcc_param *dcc, in hubp3_program_surface_config() argument
407 hubp3_dcc_control_sienna_cichlid(hubp, dcc); in hubp3_program_surface_config()
409 hubp2_program_size(hubp, format, plane_size, dcc); in hubp3_program_surface_config()
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| /openbmc/linux/drivers/gpu/drm/amd/display/dc/dcn201/ |
| H A D | dcn201_hubp.c | 48 struct dc_plane_dcc_param *dcc, in hubp201_program_surface_config() argument
52 hubp1_dcc_control(hubp, dcc->enable, dcc->independent_64b_blks); in hubp201_program_surface_config()
54 hubp1_program_size(hubp, format, plane_size, dcc); in hubp201_program_surface_config()
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| /openbmc/linux/drivers/bus/ |
| H A D | vexpress-config.c | 108 u32 *position, u32 *dcc) in vexpress_config_get_topo() argument
116 vexpress_config_find_prop(node, "arm,vexpress,dcc", dcc); in vexpress_config_get_topo()
257 u32 site, position, dcc; in vexpress_syscfg_regmap_init() local
261 &position, &dcc); in vexpress_syscfg_regmap_init()
301 func, site, position, dcc, in vexpress_syscfg_regmap_init()
304 func->template[i] = SYS_CFGCTRL_DCC(dcc); in vexpress_syscfg_regmap_init()
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| /openbmc/linux/drivers/gpu/drm/amd/display/amdgpu_dm/ |
| H A D | amdgpu_dm_plane.c | 265 const struct dc_plane_dcc_param *dcc, in validate_dcc() argument
276 if (!dcc->enable) in validate_dcc()
299 if (dcc->independent_64b_blks == 0 && in validate_dcc()
312 struct dc_plane_dcc_param *dcc, in fill_gfx9_plane_attributes_from_modifiers() argument
327 dcc->enable = 1; in fill_gfx9_plane_attributes_from_modifiers()
328 dcc->meta_pitch = afb->base.pitches[1]; in fill_gfx9_plane_attributes_from_modifiers()
336 dcc->dcc_ind_blk = hubp_ind_block_64b; in fill_gfx9_plane_attributes_from_modifiers()
341 dcc->dcc_ind_blk = hubp_ind_block_64b; in fill_gfx9_plane_attributes_from_modifiers()
760 struct dc_plane_dcc_param *dcc, in amdgpu_dm_plane_fill_plane_buffer_attributes() argument
770 memset(dcc, 0, sizeof(*dcc)); in amdgpu_dm_plane_fill_plane_buffer_attributes()
[all …]
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| /openbmc/linux/arch/arm64/boot/dts/xilinx/ |
| H A D | zynqmp-zcu1275-revA.dts | 22 serial1 = &dcc;
37 &dcc {
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| H A D | zynqmp-zc1254-revA.dts | 22 serial1 = &dcc;
37 &dcc {
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| /openbmc/qemu/target/xtensa/ |
| H A D | op_helper.c | 62 uint64_t dcc; in HELPER() local
67 dcc = (uint64_t)(env->sregs[CCOMPARE + i] - env->sregs[CCOUNT] - 1) + 1; in HELPER()
69 env->ccount_time + clock_ticks_to_ns(cpu->clock, dcc)); in HELPER()
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