1f7c8e491SMichal Simek// SPDX-License-Identifier: GPL-2.0+ 2f7c8e491SMichal Simek/* 3f7c8e491SMichal Simek * dts file for Xilinx ZynqMP ZCU104 4f7c8e491SMichal Simek * 5f7c8e491SMichal Simek * (C) Copyright 2017 - 2018, Xilinx, Inc. 6f7c8e491SMichal Simek * 7f7c8e491SMichal Simek * Michal Simek <michal.simek@xilinx.com> 8f7c8e491SMichal Simek */ 9f7c8e491SMichal Simek 10f7c8e491SMichal Simek/dts-v1/; 11f7c8e491SMichal Simek 12f7c8e491SMichal Simek#include "zynqmp.dtsi" 13f7c8e491SMichal Simek#include "zynqmp-clk-ccf.dtsi" 14f7c8e491SMichal Simek#include <dt-bindings/gpio/gpio.h> 15f7c8e491SMichal Simek#include <dt-bindings/phy/phy.h> 16f7c8e491SMichal Simek 17f7c8e491SMichal Simek/ { 18f7c8e491SMichal Simek model = "ZynqMP ZCU104 RevC"; 19f7c8e491SMichal Simek compatible = "xlnx,zynqmp-zcu104-revC", "xlnx,zynqmp-zcu104", "xlnx,zynqmp"; 20f7c8e491SMichal Simek 21f7c8e491SMichal Simek aliases { 22f7c8e491SMichal Simek ethernet0 = &gem3; 23f7c8e491SMichal Simek gpio0 = &gpio; 24f7c8e491SMichal Simek i2c0 = &i2c1; 25f7c8e491SMichal Simek mmc0 = &sdhci1; 26f7c8e491SMichal Simek rtc0 = &rtc; 27f7c8e491SMichal Simek serial0 = &uart0; 28f7c8e491SMichal Simek serial1 = &uart1; 29f7c8e491SMichal Simek serial2 = &dcc; 30f7c8e491SMichal Simek spi0 = &qspi; 31f7c8e491SMichal Simek usb0 = &usb0; 32f7c8e491SMichal Simek }; 33f7c8e491SMichal Simek 34f7c8e491SMichal Simek chosen { 35f7c8e491SMichal Simek bootargs = "earlycon"; 36f7c8e491SMichal Simek stdout-path = "serial0:115200n8"; 37*8bdad433SMichal Simek xlnx,eeprom = &eeprom; 38f7c8e491SMichal Simek }; 39f7c8e491SMichal Simek 40f7c8e491SMichal Simek memory@0 { 41f7c8e491SMichal Simek device_type = "memory"; 42f7c8e491SMichal Simek reg = <0x0 0x0 0x0 0x80000000>; 43f7c8e491SMichal Simek }; 44f7c8e491SMichal Simek}; 45f7c8e491SMichal Simek 46f7c8e491SMichal Simek&can1 { 47f7c8e491SMichal Simek status = "okay"; 48f7c8e491SMichal Simek}; 49f7c8e491SMichal Simek 50f7c8e491SMichal Simek&dcc { 51f7c8e491SMichal Simek status = "okay"; 52f7c8e491SMichal Simek}; 53f7c8e491SMichal Simek 54f7c8e491SMichal Simek&gem3 { 55f7c8e491SMichal Simek status = "okay"; 56f7c8e491SMichal Simek phy-handle = <&phy0>; 57f7c8e491SMichal Simek phy-mode = "rgmii-id"; 58f7c8e491SMichal Simek phy0: phy@c { 59f7c8e491SMichal Simek reg = <0xc>; 60f7c8e491SMichal Simek ti,rx-internal-delay = <0x8>; 61f7c8e491SMichal Simek ti,tx-internal-delay = <0xa>; 62f7c8e491SMichal Simek ti,fifo-depth = <0x1>; 63f7c8e491SMichal Simek }; 64f7c8e491SMichal Simek}; 65f7c8e491SMichal Simek 66f7c8e491SMichal Simek&gpio { 67f7c8e491SMichal Simek status = "okay"; 68f7c8e491SMichal Simek}; 69f7c8e491SMichal Simek 70f7c8e491SMichal Simek&gpu { 71f7c8e491SMichal Simek status = "okay"; 72f7c8e491SMichal Simek}; 73f7c8e491SMichal Simek 74f7c8e491SMichal Simek&i2c1 { 75f7c8e491SMichal Simek status = "okay"; 76f7c8e491SMichal Simek clock-frequency = <400000>; 77f7c8e491SMichal Simek 78ce236dceSMichal Simek tca6416_u97: gpio@20 { 79f7c8e491SMichal Simek compatible = "ti,tca6416"; 80ce236dceSMichal Simek reg = <0x20>; 81f7c8e491SMichal Simek gpio-controller; 82f7c8e491SMichal Simek #gpio-cells = <2>; 83f7c8e491SMichal Simek /* 84f7c8e491SMichal Simek * IRQ not connected 85f7c8e491SMichal Simek * Lines: 86f7c8e491SMichal Simek * 0 - IRPS5401_ALERT_B 87f7c8e491SMichal Simek * 1 - HDMI_8T49N241_INT_ALM 88f7c8e491SMichal Simek * 2 - MAX6643_OT_B 89f7c8e491SMichal Simek * 3 - MAX6643_FANFAIL_B 90f7c8e491SMichal Simek * 5 - IIC_MUX_RESET_B 91f7c8e491SMichal Simek * 6 - GEM3_EXP_RESET_B 92f7c8e491SMichal Simek * 7 - FMC_LPC_PRSNT_M2C_B 93f7c8e491SMichal Simek * 4, 10 - 17 - not connected 94f7c8e491SMichal Simek */ 95f7c8e491SMichal Simek }; 96f7c8e491SMichal Simek 97f7c8e491SMichal Simek /* Another connection to this bus via PL i2c via PCA9306 - u45 */ 98f7c8e491SMichal Simek i2c-mux@74 { /* u34 */ 99f7c8e491SMichal Simek compatible = "nxp,pca9548"; 100f7c8e491SMichal Simek #address-cells = <1>; 101f7c8e491SMichal Simek #size-cells = <0>; 102f7c8e491SMichal Simek reg = <0x74>; 103f7c8e491SMichal Simek i2c@0 { 104f7c8e491SMichal Simek #address-cells = <1>; 105f7c8e491SMichal Simek #size-cells = <0>; 106f7c8e491SMichal Simek reg = <0>; 107f7c8e491SMichal Simek /* 108f7c8e491SMichal Simek * IIC_EEPROM 1kB memory which uses 256B blocks 109f7c8e491SMichal Simek * where every block has different address. 110f7c8e491SMichal Simek * 0 - 256B address 0x54 111f7c8e491SMichal Simek * 256B - 512B address 0x55 112f7c8e491SMichal Simek * 512B - 768B address 0x56 113f7c8e491SMichal Simek * 768B - 1024B address 0x57 114f7c8e491SMichal Simek */ 115f7c8e491SMichal Simek eeprom: eeprom@54 { /* u23 */ 116f7c8e491SMichal Simek compatible = "atmel,24c08"; 117f7c8e491SMichal Simek reg = <0x54>; 118f7c8e491SMichal Simek #address-cells = <1>; 119f7c8e491SMichal Simek #size-cells = <1>; 120f7c8e491SMichal Simek }; 121f7c8e491SMichal Simek }; 122f7c8e491SMichal Simek 123f7c8e491SMichal Simek i2c@1 { 124f7c8e491SMichal Simek #address-cells = <1>; 125f7c8e491SMichal Simek #size-cells = <0>; 126f7c8e491SMichal Simek reg = <1>; 127f7c8e491SMichal Simek clock_8t49n287: clock-generator@6c { /* 8T49N287 - u182 */ 128f7c8e491SMichal Simek compatible = "idt,8t49n287"; 129f7c8e491SMichal Simek reg = <0x6c>; 130f7c8e491SMichal Simek }; 131f7c8e491SMichal Simek }; 132f7c8e491SMichal Simek 133f7c8e491SMichal Simek i2c@2 { 134f7c8e491SMichal Simek #address-cells = <1>; 135f7c8e491SMichal Simek #size-cells = <0>; 136f7c8e491SMichal Simek reg = <2>; 137f7c8e491SMichal Simek irps5401_43: irps54012@43 { /* IRPS5401 - u175 */ 138f7c8e491SMichal Simek #clock-cells = <0>; 139f7c8e491SMichal Simek compatible = "infineon,irps5401"; 140f7c8e491SMichal Simek reg = <0x43>; 141f7c8e491SMichal Simek }; 142f7c8e491SMichal Simek irps5401_4d: irps54012@4d { /* IRPS5401 - u180 */ 143f7c8e491SMichal Simek #clock-cells = <0>; 144f7c8e491SMichal Simek compatible = "infineon,irps5401"; 145f7c8e491SMichal Simek reg = <0x4d>; 146f7c8e491SMichal Simek }; 147f7c8e491SMichal Simek }; 148f7c8e491SMichal Simek 1493705dae1SMichal Simek i2c@3 { 150f7c8e491SMichal Simek #address-cells = <1>; 151f7c8e491SMichal Simek #size-cells = <0>; 1523705dae1SMichal Simek reg = <3>; 1533705dae1SMichal Simek ina226@40 { /* u183 */ 1543705dae1SMichal Simek compatible = "ti,ina226"; 1553705dae1SMichal Simek reg = <0x40>; 1563705dae1SMichal Simek shunt-resistor = <5000>; 1573705dae1SMichal Simek }; 158f7c8e491SMichal Simek }; 159f7c8e491SMichal Simek 160f7c8e491SMichal Simek i2c@5 { 161f7c8e491SMichal Simek #address-cells = <1>; 162f7c8e491SMichal Simek #size-cells = <0>; 163f7c8e491SMichal Simek reg = <5>; 164f7c8e491SMichal Simek }; 165f7c8e491SMichal Simek 166f7c8e491SMichal Simek i2c@7 { 167f7c8e491SMichal Simek #address-cells = <1>; 168f7c8e491SMichal Simek #size-cells = <0>; 169f7c8e491SMichal Simek reg = <7>; 170f7c8e491SMichal Simek }; 171f7c8e491SMichal Simek 1723705dae1SMichal Simek /* 4, 6 not connected */ 173f7c8e491SMichal Simek }; 174f7c8e491SMichal Simek}; 175f7c8e491SMichal Simek 176f7c8e491SMichal Simek&qspi { 177f7c8e491SMichal Simek status = "okay"; 178f7c8e491SMichal Simek flash@0 { 1790ed45f00SMichal Simek compatible = "m25p80", "spi-flash"; /* n25q512a 128MiB */ 180f7c8e491SMichal Simek #address-cells = <1>; 181f7c8e491SMichal Simek #size-cells = <1>; 182f7c8e491SMichal Simek reg = <0x0>; 183f7c8e491SMichal Simek spi-tx-bus-width = <1>; 184f7c8e491SMichal Simek spi-rx-bus-width = <4>; 185f7c8e491SMichal Simek spi-max-frequency = <108000000>; /* Based on DC1 spec */ 186f7c8e491SMichal Simek partition@qspi-fsbl-uboot { /* for testing purpose */ 187f7c8e491SMichal Simek label = "qspi-fsbl-uboot"; 188f7c8e491SMichal Simek reg = <0x0 0x100000>; 189f7c8e491SMichal Simek }; 190f7c8e491SMichal Simek partition@qspi-linux { /* for testing purpose */ 191f7c8e491SMichal Simek label = "qspi-linux"; 192f7c8e491SMichal Simek reg = <0x100000 0x500000>; 193f7c8e491SMichal Simek }; 194f7c8e491SMichal Simek partition@qspi-device-tree { /* for testing purpose */ 195f7c8e491SMichal Simek label = "qspi-device-tree"; 196f7c8e491SMichal Simek reg = <0x600000 0x20000>; 197f7c8e491SMichal Simek }; 198f7c8e491SMichal Simek partition@qspi-rootfs { /* for testing purpose */ 199f7c8e491SMichal Simek label = "qspi-rootfs"; 200f7c8e491SMichal Simek reg = <0x620000 0x5E0000>; 201f7c8e491SMichal Simek }; 202f7c8e491SMichal Simek }; 203f7c8e491SMichal Simek}; 204f7c8e491SMichal Simek 205f7c8e491SMichal Simek&rtc { 206f7c8e491SMichal Simek status = "okay"; 207f7c8e491SMichal Simek}; 208f7c8e491SMichal Simek 209f7c8e491SMichal Simek&sata { 210f7c8e491SMichal Simek status = "okay"; 211f7c8e491SMichal Simek /* SATA OOB timing settings */ 212f7c8e491SMichal Simek ceva,p0-cominit-params = /bits/ 8 <0x18 0x40 0x18 0x28>; 213f7c8e491SMichal Simek ceva,p0-comwake-params = /bits/ 8 <0x06 0x14 0x08 0x0E>; 214f7c8e491SMichal Simek ceva,p0-burst-params = /bits/ 8 <0x13 0x08 0x4A 0x06>; 215f7c8e491SMichal Simek ceva,p0-retry-params = /bits/ 16 <0x96A4 0x3FFC>; 216f7c8e491SMichal Simek ceva,p1-cominit-params = /bits/ 8 <0x18 0x40 0x18 0x28>; 217f7c8e491SMichal Simek ceva,p1-comwake-params = /bits/ 8 <0x06 0x14 0x08 0x0E>; 218f7c8e491SMichal Simek ceva,p1-burst-params = /bits/ 8 <0x13 0x08 0x4A 0x06>; 219f7c8e491SMichal Simek ceva,p1-retry-params = /bits/ 16 <0x96A4 0x3FFC>; 220f7c8e491SMichal Simek phy-names = "sata-phy"; 221f7c8e491SMichal Simek phys = <&lane3 PHY_TYPE_SATA 1 1 125000000>; 222f7c8e491SMichal Simek}; 223f7c8e491SMichal Simek 224f7c8e491SMichal Simek/* SD1 with level shifter */ 225f7c8e491SMichal Simek&sdhci1 { 226f7c8e491SMichal Simek status = "okay"; 227f7c8e491SMichal Simek no-1-8-v; 228f7c8e491SMichal Simek xlnx,mio_bank = <1>; 229f7c8e491SMichal Simek disable-wp; 230f7c8e491SMichal Simek}; 231f7c8e491SMichal Simek 232f7c8e491SMichal Simek&serdes { 233f7c8e491SMichal Simek status = "okay"; 234f7c8e491SMichal Simek}; 235f7c8e491SMichal Simek 236f7c8e491SMichal Simek&uart0 { 237f7c8e491SMichal Simek status = "okay"; 238f7c8e491SMichal Simek}; 239f7c8e491SMichal Simek 240f7c8e491SMichal Simek&uart1 { 241f7c8e491SMichal Simek status = "okay"; 242f7c8e491SMichal Simek}; 243f7c8e491SMichal Simek 244f7c8e491SMichal Simek/* ULPI SMSC USB3320 */ 245f7c8e491SMichal Simek&usb0 { 246f7c8e491SMichal Simek status = "okay"; 247f7c8e491SMichal Simek}; 248f7c8e491SMichal Simek 249f7c8e491SMichal Simek&dwc3_0 { 250f7c8e491SMichal Simek status = "okay"; 251f7c8e491SMichal Simek dr_mode = "host"; 252f7c8e491SMichal Simek snps,usb3_lpm_capable; 253f7c8e491SMichal Simek phy-names = "usb3-phy"; 254f7c8e491SMichal Simek phys = <&lane2 PHY_TYPE_USB3 0 2 26000000>; 255f7c8e491SMichal Simek maximum-speed = "super-speed"; 256f7c8e491SMichal Simek}; 257f7c8e491SMichal Simek 258f7c8e491SMichal Simek&watchdog0 { 259f7c8e491SMichal Simek status = "okay"; 260f7c8e491SMichal Simek}; 261f7c8e491SMichal Simek 262f7c8e491SMichal Simek&xilinx_ams { 263f7c8e491SMichal Simek status = "okay"; 264f7c8e491SMichal Simek}; 265f7c8e491SMichal Simek 266f7c8e491SMichal Simek&ams_ps { 267f7c8e491SMichal Simek status = "okay"; 268f7c8e491SMichal Simek}; 269f7c8e491SMichal Simek 270f7c8e491SMichal Simek&ams_pl { 271f7c8e491SMichal Simek status = "okay"; 272f7c8e491SMichal Simek}; 273