185231c08SMichal Simek// SPDX-License-Identifier: GPL-2.0+ 285231c08SMichal Simek/* 385231c08SMichal Simek * dts file for Xilinx ZynqMP ZC1275 485231c08SMichal Simek * 585231c08SMichal Simek * (C) Copyright 2017 - 2018, Xilinx, Inc. 685231c08SMichal Simek * 785231c08SMichal Simek * Michal Simek <michal.simek@xilinx.com> 885231c08SMichal Simek * Siva Durga Prasad Paladugu <sivadur@xilinx.com> 985231c08SMichal Simek */ 1085231c08SMichal Simek 1185231c08SMichal Simek/dts-v1/; 1285231c08SMichal Simek 1385231c08SMichal Simek#include "zynqmp.dtsi" 1485231c08SMichal Simek#include "zynqmp-clk-ccf.dtsi" 1585231c08SMichal Simek 1685231c08SMichal Simek/ { 1785231c08SMichal Simek model = "ZynqMP ZC1275 RevA"; 1885231c08SMichal Simek compatible = "xlnx,zynqmp-zc1275-revA", "xlnx,zynqmp-zc1275", "xlnx,zynqmp"; 1985231c08SMichal Simek 2085231c08SMichal Simek aliases { 2185231c08SMichal Simek serial0 = &uart0; 2285231c08SMichal Simek serial1 = &dcc; 2385231c08SMichal Simek spi0 = &qspi; 2485231c08SMichal Simek }; 2585231c08SMichal Simek 2685231c08SMichal Simek chosen { 2785231c08SMichal Simek bootargs = "earlycon"; 2885231c08SMichal Simek stdout-path = "serial0:115200n8"; 2985231c08SMichal Simek }; 3085231c08SMichal Simek 3185231c08SMichal Simek memory@0 { 3285231c08SMichal Simek device_type = "memory"; 3385231c08SMichal Simek reg = <0x0 0x0 0x0 0x80000000>; 3485231c08SMichal Simek }; 3585231c08SMichal Simek}; 3685231c08SMichal Simek 3785231c08SMichal Simek&dcc { 3885231c08SMichal Simek status = "okay"; 3985231c08SMichal Simek}; 4085231c08SMichal Simek 4185231c08SMichal Simek&qspi { 4285231c08SMichal Simek status = "okay"; 4385231c08SMichal Simek flash@0 { 44*0ed45f00SMichal Simek compatible = "m25p80", "spi-flash"; /* 32MB */ 4585231c08SMichal Simek #address-cells = <1>; 4685231c08SMichal Simek #size-cells = <1>; 4785231c08SMichal Simek reg = <0x0>; 4885231c08SMichal Simek spi-tx-bus-width = <1>; 4985231c08SMichal Simek spi-rx-bus-width = <4>; /* FIXME also DUAL configuration possible */ 5085231c08SMichal Simek spi-max-frequency = <108000000>; /* Based on DC1 spec */ 5185231c08SMichal Simek partition@qspi-fsbl-uboot { /* for testing purpose */ 5285231c08SMichal Simek label = "qspi-fsbl-uboot"; 5385231c08SMichal Simek reg = <0x0 0x100000>; 5485231c08SMichal Simek }; 5585231c08SMichal Simek partition@qspi-linux { /* for testing purpose */ 5685231c08SMichal Simek label = "qspi-linux"; 5785231c08SMichal Simek reg = <0x100000 0x500000>; 5885231c08SMichal Simek }; 5985231c08SMichal Simek partition@qspi-device-tree { /* for testing purpose */ 6085231c08SMichal Simek label = "qspi-device-tree"; 6185231c08SMichal Simek reg = <0x600000 0x20000>; 6285231c08SMichal Simek }; 6385231c08SMichal Simek partition@qspi-rootfs { /* for testing purpose */ 6485231c08SMichal Simek label = "qspi-rootfs"; 6585231c08SMichal Simek reg = <0x620000 0x5E0000>; 6685231c08SMichal Simek }; 6785231c08SMichal Simek }; 6885231c08SMichal Simek}; 6985231c08SMichal Simek 7085231c08SMichal Simek&uart0 { 7185231c08SMichal Simek status = "okay"; 7285231c08SMichal Simek}; 73