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/openbmc/linux/Documentation/devicetree/bindings/display/msm/
H A Dqcom,mdp5.yaml41 maxItems: 1
48 maxItems: 1
74 minItems: 1
81 minItems: 1
92 maxItems: 1
128 display-controller@1a01000 {
146 #address-cells = <1>;
H A Dqcom,mdss.yaml37 maxItems: 1
42 const: 1
45 maxItems: 1
57 - minItems: 1
70 - minItems: 1
76 const: 1
79 const: 1
102 "^display-controller@[1-9a-f][0-9a-f]*$":
110 "^dsi@[1-9a-f][0-9a-f]*$":
118 "^phy@[1-9a-f][0-9a-f]*$":
[all …]
/openbmc/linux/arch/arm/boot/dts/hisilicon/
H A Dhi3620.dtsi14 #address-cells = <1>;
15 #size-cells = <1>;
33 #address-cells = <1>;
44 cpu@1 {
47 reg = <1>;
68 #address-cells = <1>;
69 #size-cells = <1>;
93 #address-cells = <1>;
94 #size-cells = <1>;
105 #clock-cells = <1>;
[all …]
/openbmc/linux/arch/arm64/boot/dts/exynos/
H A Dexynos850.dtsi21 #size-cells = <1>;
56 #address-cells = <1>;
97 cpu1: cpu@1 {
158 #address-cells = <1>;
159 #size-cells = <1>;
187 gic: interrupt-controller@12a01000 {
231 samsung,cluster-index = <1>;
238 #clock-cells = <1>;
250 #clock-cells = <1>;
259 #clock-cells = <1>;
[all …]
/openbmc/linux/arch/arm/boot/dts/nxp/imx/
H A Dimx6sll.dtsi14 #address-cells = <1>;
15 #size-cells = <1>;
46 #address-cells = <1>;
109 #address-cells = <1>;
110 #size-cells = <1>;
119 #address-cells = <1>;
120 #size-cells = <1>;
123 intc: interrupt-controller@a01000 {
144 #address-cells = <1>;
145 #size-cells = <1>;
[all …]
H A Dimx6sl.dtsi10 #address-cells = <1>;
11 #size-cells = <1>;
50 #address-cells = <1>;
109 #address-cells = <1>;
110 #size-cells = <1>;
119 #address-cells = <1>;
120 #size-cells = <1>;
124 intc: interrupt-controller@a01000 {
145 #address-cells = <1>;
146 #size-cells = <1>;
[all …]
H A Dimx6ul.dtsi12 #address-cells = <1>;
13 #size-cells = <1>;
57 #address-cells = <1>;
98 interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(1) | IRQ_TYPE_LEVEL_LOW)>,
99 <GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(1) | IRQ_TYPE_LEVEL_LOW)>,
100 <GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(1) | IRQ_TYPE_LEVEL_LOW)>,
101 <GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(1) | IRQ_TYPE_LEVEL_LOW)>;
141 #address-cells = <1>;
142 #size-cells = <1>;
151 #address-cells = <1>;
[all …]
H A Dimx6qdl.dtsi11 #address-cells = <1>;
12 #size-cells = <1>;
77 #address-cells = <1>;
84 #address-cells = <1>;
97 port@1 {
98 reg = <1>;
106 lvds-channel@1 {
107 #address-cells = <1>;
109 reg = <1>;
120 port@1 {
[all …]
H A Dimx6sx.dtsi12 #address-cells = <1>;
13 #size-cells = <1>;
60 #address-cells = <1>;
158 #address-cells = <1>;
159 #size-cells = <1>;
168 #address-cells = <1>;
169 #size-cells = <1>;
177 #address-cells = <1>;
178 #size-cells = <1>;
182 intc: interrupt-controller@a01000 {
[all …]
/openbmc/u-boot/arch/arm/dts/
H A Dimx6sll.dtsi43 #address-cells = <1>;
81 intc: interrupt-controller@00a01000 {
91 #address-cells = <1>;
102 osc: clock@1 {
104 reg = <1>;
128 #address-cells = <1>;
129 #size-cells = <1>;
181 #address-cells = <1>;
182 #size-cells = <1>;
188 #address-cells = <1>;
[all …]
H A Dimx6ul.dtsi54 #address-cells = <1>;
94 intc: interrupt-controller@00a01000 {
133 #address-cells = <1>;
134 #size-cells = <1>;
158 #dma-cells = <1>;
165 #address-cells = <1>;
166 #size-cells = <1>;
185 #address-cells = <1>;
186 #size-cells = <1>;
192 #address-cells = <1>;
[all …]
H A Dimx6sl.dtsi15 #address-cells = <1>;
16 #size-cells = <1>;
47 #address-cells = <1>;
79 intc: interrupt-controller@00a01000 {
89 #address-cells = <1>;
106 #address-cells = <1>;
107 #size-cells = <1>;
135 #address-cells = <1>;
136 #size-cells = <1>;
142 #address-cells = <1>;
[all …]
H A Dsun9i-a80.dtsi60 #address-cells = <1>;
72 cpu1: cpu@1 {
147 #address-cells = <1>;
148 #size-cells = <1>;
181 clock-div = <1>;
182 clock-mult = <1>;
199 clock-div = <1>;
200 clock-mult = <1>;
216 #clock-cells = <1>;
218 clock-indices = <0>, <1>,
[all …]
H A Dimx6qdl.dtsi10 #address-cells = <1>;
11 #size-cells = <1>;
83 #address-cells = <1>;
90 #address-cells = <1>;
103 port@1 {
104 reg = <1>;
112 lvds-channel@1 {
113 #address-cells = <1>;
115 reg = <1>;
126 port@1 {
[all …]
H A Dimx6sx.dtsi55 #address-cells = <1>;
90 intc: interrupt-controller@00a01000 {
100 #address-cells = <1>;
111 osc: clock@1 {
113 reg = <1>;
137 #address-cells = <1>;
138 #size-cells = <1>;
182 #dma-cells = <1>;
189 #address-cells = <1>;
190 #size-cells = <1>;
[all …]
H A Dimx6ull.dtsi52 #address-cells = <1>;
86 intc: interrupt-controller@00a01000 {
95 #address-cells = <1>;
106 osc: clock@1 {
108 reg = <1>;
132 #address-cells = <1>;
133 #size-cells = <1>;
187 #dma-cells = <1>;
194 #address-cells = <1>;
195 #size-cells = <1>;
[all …]
/openbmc/linux/arch/arm/boot/dts/allwinner/
H A Dsun9i-a80.dtsi64 #address-cells = <1>;
76 cpu1: cpu@1 {
151 #address-cells = <1>;
152 #size-cells = <1>;
185 clock-div = <1>;
186 clock-mult = <1>;
234 clock-div = <1>;
235 clock-mult = <1>;
251 #clock-cells = <1>;
253 clock-indices = <0>, <1>,
[all …]
/openbmc/linux/arch/arm/boot/dts/qcom/
H A Dqcom-apq8064.dtsi13 #address-cells = <1>;
14 #size-cells = <1>;
20 #address-cells = <1>;
21 #size-cells = <1>;
36 #address-cells = <1>;
50 CPU1: cpu@1 {
54 reg = <1>;
193 interrupts = <1 10 0x304>;
219 #hwlock-cells = <1>;
232 #address-cells = <1>;
[all …]
/openbmc/linux/arch/arm64/boot/dts/qcom/
H A Dmsm8953.dtsi38 #address-cells = <1>;
51 CPU1: cpu@1 {
159 L2_1: l2-cache-1 {
173 #reset-cells = <1>;
209 #clock-cells = <1>;
214 #power-domain-cells = <1>;
330 qcom,client-id = <1>;
347 #qcom,smem-state-cells = <1>;
367 qcom,remote-pid = <1>;
372 #qcom,smem-state-cells = <1>;
[all …]
H A Dmsm8939.dtsi20 * A number of our drivers want address/size cells = 1
41 #address-cells = <1>;
119 CPU5: cpu@1 {
201 /* Boot CPU is cluster 1 core 0 */
228 #reset-cells = <1>;
259 #clock-cells = <1>;
266 #power-domain-cells = <1>;
273 opp-level = <1>;
340 qcom,client-id = <1>;
378 qcom,remote-pid = <1>;
[all …]
H A Dmsm8916.dtsi68 qcom,client-id = <1>;
112 #address-cells = <1>;
130 CPU1: cpu@1 {
240 #reset-cells = <1>;
299 #clock-cells = <1>;
306 #power-domain-cells = <1>;
313 opp-level = <1>;
345 qcom,remote-pid = <1>;
350 #qcom,smem-state-cells = <1>;
375 #qcom,smem-state-cells = <1>;
[all …]