arm/dts/sun9i-a80.dtsi

60 		#address-cells = <1>;
72 		cpu1: cpu@1 {
147 		#address-cells = <1>;
148 		#size-cells = <1>;
181 			clock-div = <1>;
182 			clock-mult = <1>;
199 			clock-div = <1>;
200 			clock-mult = <1>;
216 			#clock-cells = <1>;
218 			clock-indices = <0>, <1>,
259 		#address-cells = <1>;
260 		#size-cells = <1>;
272 			#address-cells = <1>;
273 			#size-cells = <1>;
320 		ehci1: usb@a01000 {
395 			#clock-cells = <1>;
396 			#reset-cells = <1>;
404 		mmc0: mmc@1c0f000 {
415 			#address-cells = <1>;
419 		mmc1: mmc@1c10000 {
422 			clocks = <&mmc_config_clk 1>, <&ccu CLK_MMC1>,
426 			resets = <&mmc_config_clk 1>;
430 			#address-cells = <1>;
434 		mmc2: mmc@1c11000 {
445 			#address-cells = <1>;
449 		mmc3: mmc@1c12000 {
460 			#address-cells = <1>;
464 		mmc_config_clk: clk@1c13000 {
471 			#clock-cells = <1>;
472 			#reset-cells = <1>;
477 		gic: interrupt-controller@1c41000 {
488 		cci: cci@1c90000 {
490 			#address-cells = <1>;
491 			#size-cells = <1>;
528 			#clock-cells = <1>;
529 			#reset-cells = <1>;
543 				#address-cells = <1>;
546 				fe0_out: port@1 {
547 					#address-cells = <1>;
549 					reg = <1>;
570 				#address-cells = <1>;
573 				fe1_out: port@1 {
574 					#address-cells = <1>;
576 					reg = <1>;
597 				#address-cells = <1>;
601 					#address-cells = <1>;
610 					be0_in_deu1: endpoint@1 {
611 						reg = <1>;
616 				be0_out: port@1 {
617 					#address-cells = <1>;
619 					reg = <1>;
640 				#address-cells = <1>;
644 					#address-cells = <1>;
653 					be1_in_deu1: endpoint@1 {
654 						reg = <1>;
659 				be1_out: port@1 {
660 					#address-cells = <1>;
662 					reg = <1>;
685 				#address-cells = <1>;
689 					#address-cells = <1>;
699 				deu0_out: port@1 {
700 					#address-cells = <1>;
702 					reg = <1>;
709 					deu0_out_be1: endpoint@1 {
710 						reg = <1>;
730 				#address-cells = <1>;
734 					#address-cells = <1>;
744 				deu1_out: port@1 {
745 					#address-cells = <1>;
747 					reg = <1>;
754 					deu1_out_be1: endpoint@1 {
755 						reg = <1>;
775 				#address-cells = <1>;
779 					#address-cells = <1>;
789 				drc0_out: port@1 {
790 					#address-cells = <1>;
792 					reg = <1>;
815 				#address-cells = <1>;
819 					#address-cells = <1>;
829 				drc1_out: port@1 {
830 					#address-cells = <1>;
832 					reg = <1>;
853 				#address-cells = <1>;
857 					#address-cells = <1>;
867 				tcon0_out: port@1 {
868 					#address-cells = <1>;
870 					reg = <1>;
885 				#address-cells = <1>;
889 					#address-cells = <1>;
899 				tcon1_out: port@1 {
900 					#address-cells = <1>;
902 					reg = <1>;
912 			#clock-cells = <1>;
913 			#reset-cells = <1>;
1018 			interrupts = <GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>;
1077 			#address-cells = <1>;
1088 			#address-cells = <1>;
1099 			#address-cells = <1>;
1110 			#address-cells = <1>;
1121 			#address-cells = <1>;
1139 			#reset-cells = <1>;
1155 			clocks = <&apbs_gates 1>, <&r_ir_clk>;
1157 			resets = <&apbs_rst 1>;
1209 			#address-cells = <1>;