Lines Matching +full:1 +full:a01000

11 	#address-cells = <1>;
12 #size-cells = <1>;
77 #address-cells = <1>;
84 #address-cells = <1>;
97 port@1 {
98 reg = <1>;
106 lvds-channel@1 {
107 #address-cells = <1>;
109 reg = <1>;
120 port@1 {
121 reg = <1>;
147 #address-cells = <1>;
148 #size-cells = <1>;
160 #dma-cells = <1>;
193 #address-cells = <1>;
204 port@1 {
205 reg = <1>;
240 interrupts = <1 13 0xf01>;
245 intc: interrupt-controller@a01000 {
265 pcie: pcie@1ffc000 {
276 num-lanes = <1>;
279 #interrupt-cells = <1>;
281 interrupt-map = <0 0 0 1 &gpc GIC_SPI 123 IRQ_TYPE_LEVEL_HIGH>,
294 #address-cells = <1>;
295 #size-cells = <1>;
301 #address-cells = <1>;
302 #size-cells = <1>;
327 #address-cells = <1>;
335 dmas = <&sdma 3 7 1>, <&sdma 4 7 2>;
341 #address-cells = <1>;
349 dmas = <&sdma 5 7 1>, <&sdma 6 7 2>;
355 #address-cells = <1>;
363 dmas = <&sdma 7 7 1>, <&sdma 8 7 2>;
369 #address-cells = <1>;
377 dmas = <&sdma 9 7 1>, <&sdma 10 7 2>;
419 dmas = <&sdma 37 1 0>,
420 <&sdma 38 1 0>;
435 dmas = <&sdma 41 1 0>,
436 <&sdma 42 1 0>;
451 dmas = <&sdma 45 1 0>,
452 <&sdma 46 1 0>;
474 dmas = <&sdma 17 23 1>, <&sdma 18 23 1>, <&sdma 19 23 1>,
475 <&sdma 20 23 1>, <&sdma 21 23 1>, <&sdma 22 23 1>;
498 resets = <&src 1>;
687 #clock-cells = <1>;
697 reg_vdd1p1: regulator-1p1 {
754 anatop-min-bit-val = <1>;
771 anatop-min-bit-val = <1>;
788 anatop-min-bit-val = <1>;
871 #reset-cells = <1>;
885 #address-cells = <1>;
892 pd_pu: power-domain@1 {
893 reg = <1>;
912 #mux-control-cells = <1>;
945 #address-cells = <1>;
946 #size-cells = <1>;
952 #address-cells = <1>;
953 #size-cells = <1>;
998 fsl,usbmisc = <&usbmisc 1>;
1037 #index-cells = <1>;
1116 #address-cells = <1>;
1126 #address-cells = <1>;
1136 #address-cells = <1>;
1163 #size-cells = <1>;
1176 #address-cells = <1>;
1177 #size-cells = <1>;
1215 #address-cells = <1>;
1230 #address-cells = <1>;
1241 port@1 {
1242 reg = <1>;
1308 #address-cells = <1>;
1328 ipu1_csi1: port@1 {
1329 reg = <1>;
1333 #address-cells = <1>;
1341 ipu1_di0_hdmi: endpoint@1 {
1342 reg = <1>;
1363 #address-cells = <1>;
1371 ipu1_di1_hdmi: endpoint@1 {
1372 reg = <1>;