dts/qcom/msm8916.dtsi

68 			qcom,client-id = <1>;
112 		#address-cells = <1>;
130 		CPU1: cpu@1 {
240 			#reset-cells = <1>;
299 					#clock-cells = <1>;
306 					#power-domain-cells = <1>;
313 							opp-level = <1>;
345 		qcom,remote-pid = <1>;
350 			#qcom,smem-state-cells = <1>;
375 			#qcom,smem-state-cells = <1>;
389 		#address-cells = <1>;
392 		qcom,ipc-1 = <&apcs 8 13>;
398 			#qcom,smem-state-cells = <1>;
401 		hexagon_smsm: hexagon@1 {
402 			reg = <1>;
419 		#address-cells = <1>;
420 		#size-cells = <1>;
439 			#address-cells = <1>;
440 			#size-cells = <1>;
459 				bits = <1 5>;
499 				bits = <1 7>;
521 			#interconnect-cells = <1>;
550 			#thermal-sensor-cells = <1>;
556 			#interconnect-cells = <1>;
565 			#interconnect-cells = <1>;
603 		/* CTI 1 - TPIU connections */
644 				#address-cells = <1>;
650 				 * 1 - not-connected
692 				#address-cells = <1>;
701 				port@1 {
702 					reg = <1>;
772 				#address-cells = <1>;
781 				port@1 {
782 					reg = <1>;
862 		/* CTI - CPU-1 */
1483 			#clock-cells = <1>;
1484 			#reset-cells = <1>;
1485 			#power-domain-cells = <1>;
1489 				 <&mdss_dsi0_phy 1>,
1506 			#hwlock-cells = <1>;
1514 		mdss: display-subsystem@1a00000 {
1533 			#interrupt-cells = <1>;
1535 			#address-cells = <1>;
1536 			#size-cells = <1>;
1539 			mdss_mdp: display-controller@1a01000 {
1559 					#address-cells = <1>;
1571 			mdss_dsi0: dsi@1a98000 {
1583 							 <&mdss_dsi0_phy 1>;
1599 				#address-cells = <1>;
1603 					#address-cells = <1>;
1613 					port@1 {
1614 						reg = <1>;
1621 			mdss_dsi0_phy: phy@1a98300 {
1630 				#clock-cells = <1>;
1639 		camss: camss@1b0ac00 {
1713 				#address-cells = <1>;
1720 				port@1 {
1721 					reg = <1>;
1726 		cci: cci@1b0c000 {
1728 			#address-cells = <1>;
1748 				#address-cells = <1>;
1753 		gpu@1c00000 {
1775 			iommus = <&gpu_iommu 1>, <&gpu_iommu 2>;
1789 		venus: video-codec@1d00000 {
1811 		apps_iommu: iommu@1ef0000 {
1812 			#address-cells = <1>;
1813 			#size-cells = <1>;
1814 			#iommu-cells = <1>;
1845 		gpu_iommu: iommu@1f08000 {
1846 			#address-cells = <1>;
1847 			#size-cells = <1>;
1848 			#iommu-cells = <1>;
1893 			#dma-cells = <1>;
1897 			qcom,num-ees = <1>;
1912 					      <&hexagon_smp2p_in 1 IRQ_TYPE_EDGE_RISING>,
1950 				interrupts = <1 IRQ_TYPE_EDGE_BOTH>, <11 IRQ_TYPE_EDGE_BOTH>;
1953 				qcom,smem-states = <&apps_smsm 1>, <&apps_smsm 11>;
1967 				qcom,remote-pid = <1>;
1977 					#address-cells = <1>;
1980 					cb@1 {
1982 						reg = <1>;
2019 			#sound-dai-cells = <1>;
2026 			#address-cells = <1>;
2036 			#sound-dai-cells = <1>;
2053 			pinctrl-1 = <&sdc1_sleep>;
2055 			mmc-ddr-1_8v;
2074 			pinctrl-1 = <&sdc2_sleep>;
2086 			#dma-cells = <1>;
2097 			dmas = <&blsp_dma 0>, <&blsp_dma 1>;
2101 			pinctrl-1 = <&blsp_uart1_sleep>;
2115 			pinctrl-1 = <&blsp_uart2_sleep>;
2130 			pinctrl-1 = <&blsp_i2c1_sleep>;
2131 			#address-cells = <1>;
2147 			pinctrl-1 = <&blsp_spi1_sleep>;
2148 			#address-cells = <1>;
2164 			pinctrl-1 = <&blsp_i2c2_sleep>;
2165 			#address-cells = <1>;
2181 			pinctrl-1 = <&blsp_spi2_sleep>;
2182 			#address-cells = <1>;
2198 			pinctrl-1 = <&blsp_i2c3_sleep>;
2199 			#address-cells = <1>;
2215 			pinctrl-1 = <&blsp_spi3_sleep>;
2216 			#address-cells = <1>;
2232 			pinctrl-1 = <&blsp_i2c4_sleep>;
2233 			#address-cells = <1>;
2249 			pinctrl-1 = <&blsp_spi4_sleep>;
2250 			#address-cells = <1>;
2266 			pinctrl-1 = <&blsp_i2c5_sleep>;
2267 			#address-cells = <1>;
2283 			pinctrl-1 = <&blsp_spi5_sleep>;
2284 			#address-cells = <1>;
2300 			pinctrl-1 = <&blsp_i2c6_sleep>;
2301 			#address-cells = <1>;
2317 			pinctrl-1 = <&blsp_spi6_sleep>;
2318 			#address-cells = <1>;
2345 			#reset-cells = <1>;
2373 					      <&wcnss_smp2p_in 1 IRQ_TYPE_EDGE_RISING>,
2441 			#mbox-cells = <1>;
2456 			#address-cells = <1>;
2457 			#size-cells = <1>;
2472 				frame-number = <1>;
2564 		cpu0-1-thermal {
2648 			thermal-sensors = <&tsens 1>;
2680 			     <GIC_PPI 1 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>;