1724ba675SRob Herring// SPDX-License-Identifier: GPL-2.0 2724ba675SRob Herring// 3724ba675SRob Herring// Copyright 2015 Freescale Semiconductor, Inc. 4724ba675SRob Herring 5724ba675SRob Herring#include <dt-bindings/clock/imx6ul-clock.h> 6724ba675SRob Herring#include <dt-bindings/gpio/gpio.h> 7724ba675SRob Herring#include <dt-bindings/input/input.h> 8724ba675SRob Herring#include <dt-bindings/interrupt-controller/arm-gic.h> 9724ba675SRob Herring#include "imx6ul-pinfunc.h" 10724ba675SRob Herring 11724ba675SRob Herring/ { 12724ba675SRob Herring #address-cells = <1>; 13724ba675SRob Herring #size-cells = <1>; 14724ba675SRob Herring /* 15724ba675SRob Herring * The decompressor and also some bootloaders rely on a 16724ba675SRob Herring * pre-existing /chosen node to be available to insert the 17724ba675SRob Herring * command line and merge other ATAGS info. 18724ba675SRob Herring */ 19724ba675SRob Herring chosen {}; 20724ba675SRob Herring 21724ba675SRob Herring aliases { 22724ba675SRob Herring ethernet0 = &fec1; 23724ba675SRob Herring ethernet1 = &fec2; 24724ba675SRob Herring gpio0 = &gpio1; 25724ba675SRob Herring gpio1 = &gpio2; 26724ba675SRob Herring gpio2 = &gpio3; 27724ba675SRob Herring gpio3 = &gpio4; 28724ba675SRob Herring gpio4 = &gpio5; 29724ba675SRob Herring i2c0 = &i2c1; 30724ba675SRob Herring i2c1 = &i2c2; 31724ba675SRob Herring i2c2 = &i2c3; 32724ba675SRob Herring i2c3 = &i2c4; 33724ba675SRob Herring mmc0 = &usdhc1; 34724ba675SRob Herring mmc1 = &usdhc2; 35724ba675SRob Herring serial0 = &uart1; 36724ba675SRob Herring serial1 = &uart2; 37724ba675SRob Herring serial2 = &uart3; 38724ba675SRob Herring serial3 = &uart4; 39724ba675SRob Herring serial4 = &uart5; 40724ba675SRob Herring serial5 = &uart6; 41724ba675SRob Herring serial6 = &uart7; 42724ba675SRob Herring serial7 = &uart8; 43724ba675SRob Herring sai1 = &sai1; 44724ba675SRob Herring sai2 = &sai2; 45724ba675SRob Herring sai3 = &sai3; 46724ba675SRob Herring spi0 = &ecspi1; 47724ba675SRob Herring spi1 = &ecspi2; 48724ba675SRob Herring spi2 = &ecspi3; 49724ba675SRob Herring spi3 = &ecspi4; 50724ba675SRob Herring usb0 = &usbotg1; 51724ba675SRob Herring usb1 = &usbotg2; 52724ba675SRob Herring usbphy0 = &usbphy1; 53724ba675SRob Herring usbphy1 = &usbphy2; 54724ba675SRob Herring }; 55724ba675SRob Herring 56724ba675SRob Herring cpus { 57724ba675SRob Herring #address-cells = <1>; 58724ba675SRob Herring #size-cells = <0>; 59724ba675SRob Herring 60724ba675SRob Herring cpu0: cpu@0 { 61724ba675SRob Herring compatible = "arm,cortex-a7"; 62724ba675SRob Herring device_type = "cpu"; 63724ba675SRob Herring reg = <0>; 64724ba675SRob Herring clock-frequency = <696000000>; 65724ba675SRob Herring clock-latency = <61036>; /* two CLK32 periods */ 66724ba675SRob Herring #cooling-cells = <2>; 67724ba675SRob Herring operating-points = 68724ba675SRob Herring /* kHz uV */ 69724ba675SRob Herring <696000 1275000>, 70724ba675SRob Herring <528000 1175000>, 71724ba675SRob Herring <396000 1025000>, 72724ba675SRob Herring <198000 950000>; 73724ba675SRob Herring fsl,soc-operating-points = 74724ba675SRob Herring /* KHz uV */ 75724ba675SRob Herring <696000 1275000>, 76724ba675SRob Herring <528000 1175000>, 77724ba675SRob Herring <396000 1175000>, 78724ba675SRob Herring <198000 1175000>; 79724ba675SRob Herring clocks = <&clks IMX6UL_CLK_ARM>, 80724ba675SRob Herring <&clks IMX6UL_CLK_PLL2_BUS>, 81724ba675SRob Herring <&clks IMX6UL_CLK_PLL2_PFD2>, 82724ba675SRob Herring <&clks IMX6UL_CA7_SECONDARY_SEL>, 83724ba675SRob Herring <&clks IMX6UL_CLK_STEP>, 84724ba675SRob Herring <&clks IMX6UL_CLK_PLL1_SW>, 85724ba675SRob Herring <&clks IMX6UL_CLK_PLL1_SYS>; 86724ba675SRob Herring clock-names = "arm", "pll2_bus", "pll2_pfd2_396m", 87724ba675SRob Herring "secondary_sel", "step", "pll1_sw", 88724ba675SRob Herring "pll1_sys"; 89724ba675SRob Herring arm-supply = <®_arm>; 90724ba675SRob Herring soc-supply = <®_soc>; 91724ba675SRob Herring nvmem-cells = <&cpu_speed_grade>; 92724ba675SRob Herring nvmem-cell-names = "speed_grade"; 93724ba675SRob Herring }; 94724ba675SRob Herring }; 95724ba675SRob Herring 96724ba675SRob Herring timer { 97724ba675SRob Herring compatible = "arm,armv7-timer"; 98724ba675SRob Herring interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(1) | IRQ_TYPE_LEVEL_LOW)>, 99724ba675SRob Herring <GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(1) | IRQ_TYPE_LEVEL_LOW)>, 100724ba675SRob Herring <GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(1) | IRQ_TYPE_LEVEL_LOW)>, 101724ba675SRob Herring <GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(1) | IRQ_TYPE_LEVEL_LOW)>; 102724ba675SRob Herring interrupt-parent = <&intc>; 103724ba675SRob Herring status = "disabled"; 104724ba675SRob Herring }; 105724ba675SRob Herring 106724ba675SRob Herring ckil: clock-cli { 107724ba675SRob Herring compatible = "fixed-clock"; 108724ba675SRob Herring #clock-cells = <0>; 109724ba675SRob Herring clock-frequency = <32768>; 110724ba675SRob Herring clock-output-names = "ckil"; 111724ba675SRob Herring }; 112724ba675SRob Herring 113724ba675SRob Herring osc: clock-osc { 114724ba675SRob Herring compatible = "fixed-clock"; 115724ba675SRob Herring #clock-cells = <0>; 116724ba675SRob Herring clock-frequency = <24000000>; 117724ba675SRob Herring clock-output-names = "osc"; 118724ba675SRob Herring }; 119724ba675SRob Herring 120724ba675SRob Herring ipp_di0: clock-di0 { 121724ba675SRob Herring compatible = "fixed-clock"; 122724ba675SRob Herring #clock-cells = <0>; 123724ba675SRob Herring clock-frequency = <0>; 124724ba675SRob Herring clock-output-names = "ipp_di0"; 125724ba675SRob Herring }; 126724ba675SRob Herring 127724ba675SRob Herring ipp_di1: clock-di1 { 128724ba675SRob Herring compatible = "fixed-clock"; 129724ba675SRob Herring #clock-cells = <0>; 130724ba675SRob Herring clock-frequency = <0>; 131724ba675SRob Herring clock-output-names = "ipp_di1"; 132724ba675SRob Herring }; 133724ba675SRob Herring 134724ba675SRob Herring pmu { 135724ba675SRob Herring compatible = "arm,cortex-a7-pmu"; 136724ba675SRob Herring interrupt-parent = <&gpc>; 137724ba675SRob Herring interrupts = <GIC_SPI 94 IRQ_TYPE_LEVEL_HIGH>; 138724ba675SRob Herring }; 139724ba675SRob Herring 140724ba675SRob Herring soc: soc { 141724ba675SRob Herring #address-cells = <1>; 142724ba675SRob Herring #size-cells = <1>; 143724ba675SRob Herring compatible = "simple-bus"; 144724ba675SRob Herring interrupt-parent = <&gpc>; 145724ba675SRob Herring ranges; 146724ba675SRob Herring 147724ba675SRob Herring ocram: sram@900000 { 148724ba675SRob Herring compatible = "mmio-sram"; 149724ba675SRob Herring reg = <0x00900000 0x20000>; 150724ba675SRob Herring ranges = <0 0x00900000 0x20000>; 151724ba675SRob Herring #address-cells = <1>; 152724ba675SRob Herring #size-cells = <1>; 153724ba675SRob Herring }; 154724ba675SRob Herring 155724ba675SRob Herring intc: interrupt-controller@a01000 { 156724ba675SRob Herring compatible = "arm,gic-400", "arm,cortex-a7-gic"; 157724ba675SRob Herring interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(1) | IRQ_TYPE_LEVEL_HIGH)>; 158724ba675SRob Herring #interrupt-cells = <3>; 159724ba675SRob Herring interrupt-controller; 160724ba675SRob Herring interrupt-parent = <&intc>; 161724ba675SRob Herring reg = <0x00a01000 0x1000>, 162724ba675SRob Herring <0x00a02000 0x2000>, 163724ba675SRob Herring <0x00a04000 0x2000>, 164724ba675SRob Herring <0x00a06000 0x2000>; 165724ba675SRob Herring }; 166724ba675SRob Herring 167724ba675SRob Herring dma_apbh: dma-controller@1804000 { 168724ba675SRob Herring compatible = "fsl,imx6q-dma-apbh", "fsl,imx28-dma-apbh"; 169724ba675SRob Herring reg = <0x01804000 0x2000>; 170724ba675SRob Herring interrupts = <0 13 IRQ_TYPE_LEVEL_HIGH>, 171724ba675SRob Herring <0 13 IRQ_TYPE_LEVEL_HIGH>, 172724ba675SRob Herring <0 13 IRQ_TYPE_LEVEL_HIGH>, 173724ba675SRob Herring <0 13 IRQ_TYPE_LEVEL_HIGH>; 174724ba675SRob Herring #dma-cells = <1>; 175724ba675SRob Herring dma-channels = <4>; 176724ba675SRob Herring clocks = <&clks IMX6UL_CLK_APBHDMA>; 177724ba675SRob Herring }; 178724ba675SRob Herring 179724ba675SRob Herring gpmi: nand-controller@1806000 { 180724ba675SRob Herring compatible = "fsl,imx6q-gpmi-nand"; 181724ba675SRob Herring #address-cells = <1>; 182*1d6500cdSAlexander Stein #size-cells = <0>; 183724ba675SRob Herring reg = <0x01806000 0x2000>, <0x01808000 0x2000>; 184724ba675SRob Herring reg-names = "gpmi-nand", "bch"; 185724ba675SRob Herring interrupts = <0 15 IRQ_TYPE_LEVEL_HIGH>; 186724ba675SRob Herring interrupt-names = "bch"; 187724ba675SRob Herring clocks = <&clks IMX6UL_CLK_GPMI_IO>, 188724ba675SRob Herring <&clks IMX6UL_CLK_GPMI_APB>, 189724ba675SRob Herring <&clks IMX6UL_CLK_GPMI_BCH>, 190724ba675SRob Herring <&clks IMX6UL_CLK_GPMI_BCH_APB>, 191724ba675SRob Herring <&clks IMX6UL_CLK_PER_BCH>; 192724ba675SRob Herring clock-names = "gpmi_io", "gpmi_apb", "gpmi_bch", 193724ba675SRob Herring "gpmi_bch_apb", "per1_bch"; 194724ba675SRob Herring dmas = <&dma_apbh 0>; 195724ba675SRob Herring dma-names = "rx-tx"; 196724ba675SRob Herring status = "disabled"; 197724ba675SRob Herring }; 198724ba675SRob Herring 199724ba675SRob Herring aips1: bus@2000000 { 200724ba675SRob Herring compatible = "fsl,aips-bus", "simple-bus"; 201724ba675SRob Herring #address-cells = <1>; 202724ba675SRob Herring #size-cells = <1>; 203724ba675SRob Herring reg = <0x02000000 0x100000>; 204724ba675SRob Herring ranges; 205724ba675SRob Herring 206724ba675SRob Herring spba-bus@2000000 { 207724ba675SRob Herring compatible = "fsl,spba-bus", "simple-bus"; 208724ba675SRob Herring #address-cells = <1>; 209724ba675SRob Herring #size-cells = <1>; 210724ba675SRob Herring reg = <0x02000000 0x40000>; 211724ba675SRob Herring ranges; 212724ba675SRob Herring 213724ba675SRob Herring ecspi1: spi@2008000 { 214724ba675SRob Herring #address-cells = <1>; 215724ba675SRob Herring #size-cells = <0>; 216724ba675SRob Herring compatible = "fsl,imx6ul-ecspi", "fsl,imx51-ecspi"; 217724ba675SRob Herring reg = <0x02008000 0x4000>; 218724ba675SRob Herring interrupts = <GIC_SPI 31 IRQ_TYPE_LEVEL_HIGH>; 219724ba675SRob Herring clocks = <&clks IMX6UL_CLK_ECSPI1>, 220724ba675SRob Herring <&clks IMX6UL_CLK_ECSPI1>; 221724ba675SRob Herring clock-names = "ipg", "per"; 222724ba675SRob Herring dmas = <&sdma 3 7 1>, <&sdma 4 7 2>; 223724ba675SRob Herring dma-names = "rx", "tx"; 224724ba675SRob Herring status = "disabled"; 225724ba675SRob Herring }; 226724ba675SRob Herring 227724ba675SRob Herring ecspi2: spi@200c000 { 228724ba675SRob Herring #address-cells = <1>; 229724ba675SRob Herring #size-cells = <0>; 230724ba675SRob Herring compatible = "fsl,imx6ul-ecspi", "fsl,imx51-ecspi"; 231724ba675SRob Herring reg = <0x0200c000 0x4000>; 232724ba675SRob Herring interrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>; 233724ba675SRob Herring clocks = <&clks IMX6UL_CLK_ECSPI2>, 234724ba675SRob Herring <&clks IMX6UL_CLK_ECSPI2>; 235724ba675SRob Herring clock-names = "ipg", "per"; 236724ba675SRob Herring dmas = <&sdma 5 7 1>, <&sdma 6 7 2>; 237724ba675SRob Herring dma-names = "rx", "tx"; 238724ba675SRob Herring status = "disabled"; 239724ba675SRob Herring }; 240724ba675SRob Herring 241724ba675SRob Herring ecspi3: spi@2010000 { 242724ba675SRob Herring #address-cells = <1>; 243724ba675SRob Herring #size-cells = <0>; 244724ba675SRob Herring compatible = "fsl,imx6ul-ecspi", "fsl,imx51-ecspi"; 245724ba675SRob Herring reg = <0x02010000 0x4000>; 246724ba675SRob Herring interrupts = <GIC_SPI 33 IRQ_TYPE_LEVEL_HIGH>; 247724ba675SRob Herring clocks = <&clks IMX6UL_CLK_ECSPI3>, 248724ba675SRob Herring <&clks IMX6UL_CLK_ECSPI3>; 249724ba675SRob Herring clock-names = "ipg", "per"; 250724ba675SRob Herring dmas = <&sdma 7 7 1>, <&sdma 8 7 2>; 251724ba675SRob Herring dma-names = "rx", "tx"; 252724ba675SRob Herring status = "disabled"; 253724ba675SRob Herring }; 254724ba675SRob Herring 255724ba675SRob Herring ecspi4: spi@2014000 { 256724ba675SRob Herring #address-cells = <1>; 257724ba675SRob Herring #size-cells = <0>; 258724ba675SRob Herring compatible = "fsl,imx6ul-ecspi", "fsl,imx51-ecspi"; 259724ba675SRob Herring reg = <0x02014000 0x4000>; 260724ba675SRob Herring interrupts = <GIC_SPI 34 IRQ_TYPE_LEVEL_HIGH>; 261724ba675SRob Herring clocks = <&clks IMX6UL_CLK_ECSPI4>, 262724ba675SRob Herring <&clks IMX6UL_CLK_ECSPI4>; 263724ba675SRob Herring clock-names = "ipg", "per"; 264724ba675SRob Herring dmas = <&sdma 9 7 1>, <&sdma 10 7 2>; 265724ba675SRob Herring dma-names = "rx", "tx"; 266724ba675SRob Herring status = "disabled"; 267724ba675SRob Herring }; 268724ba675SRob Herring 269724ba675SRob Herring uart7: serial@2018000 { 270724ba675SRob Herring compatible = "fsl,imx6ul-uart", 271724ba675SRob Herring "fsl,imx6q-uart"; 272724ba675SRob Herring reg = <0x02018000 0x4000>; 273724ba675SRob Herring interrupts = <GIC_SPI 39 IRQ_TYPE_LEVEL_HIGH>; 274724ba675SRob Herring clocks = <&clks IMX6UL_CLK_UART7_IPG>, 275724ba675SRob Herring <&clks IMX6UL_CLK_UART7_SERIAL>; 276724ba675SRob Herring clock-names = "ipg", "per"; 277724ba675SRob Herring status = "disabled"; 278724ba675SRob Herring }; 279724ba675SRob Herring 280724ba675SRob Herring uart1: serial@2020000 { 281724ba675SRob Herring compatible = "fsl,imx6ul-uart", 282724ba675SRob Herring "fsl,imx6q-uart"; 283724ba675SRob Herring reg = <0x02020000 0x4000>; 284724ba675SRob Herring interrupts = <GIC_SPI 26 IRQ_TYPE_LEVEL_HIGH>; 285724ba675SRob Herring clocks = <&clks IMX6UL_CLK_UART1_IPG>, 286724ba675SRob Herring <&clks IMX6UL_CLK_UART1_SERIAL>; 287724ba675SRob Herring clock-names = "ipg", "per"; 288724ba675SRob Herring status = "disabled"; 289724ba675SRob Herring }; 290724ba675SRob Herring 291724ba675SRob Herring uart8: serial@2024000 { 292724ba675SRob Herring compatible = "fsl,imx6ul-uart", 293724ba675SRob Herring "fsl,imx6q-uart"; 294724ba675SRob Herring reg = <0x02024000 0x4000>; 295724ba675SRob Herring interrupts = <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>; 296724ba675SRob Herring clocks = <&clks IMX6UL_CLK_UART8_IPG>, 297724ba675SRob Herring <&clks IMX6UL_CLK_UART8_SERIAL>; 298724ba675SRob Herring clock-names = "ipg", "per"; 299724ba675SRob Herring status = "disabled"; 300724ba675SRob Herring }; 301724ba675SRob Herring 302724ba675SRob Herring sai1: sai@2028000 { 303724ba675SRob Herring #sound-dai-cells = <0>; 304724ba675SRob Herring compatible = "fsl,imx6ul-sai", "fsl,imx6sx-sai"; 305724ba675SRob Herring reg = <0x02028000 0x4000>; 306724ba675SRob Herring interrupts = <GIC_SPI 97 IRQ_TYPE_LEVEL_HIGH>; 307724ba675SRob Herring clocks = <&clks IMX6UL_CLK_SAI1_IPG>, 308724ba675SRob Herring <&clks IMX6UL_CLK_SAI1>, 309724ba675SRob Herring <&clks IMX6UL_CLK_DUMMY>, <&clks IMX6UL_CLK_DUMMY>; 310724ba675SRob Herring clock-names = "bus", "mclk1", "mclk2", "mclk3"; 311724ba675SRob Herring dmas = <&sdma 35 24 0>, 312724ba675SRob Herring <&sdma 36 24 0>; 313724ba675SRob Herring dma-names = "rx", "tx"; 314724ba675SRob Herring status = "disabled"; 315724ba675SRob Herring }; 316724ba675SRob Herring 317724ba675SRob Herring sai2: sai@202c000 { 318724ba675SRob Herring #sound-dai-cells = <0>; 319724ba675SRob Herring compatible = "fsl,imx6ul-sai", "fsl,imx6sx-sai"; 320724ba675SRob Herring reg = <0x0202c000 0x4000>; 321724ba675SRob Herring interrupts = <GIC_SPI 98 IRQ_TYPE_LEVEL_HIGH>; 322724ba675SRob Herring clocks = <&clks IMX6UL_CLK_SAI2_IPG>, 323724ba675SRob Herring <&clks IMX6UL_CLK_SAI2>, 324724ba675SRob Herring <&clks IMX6UL_CLK_DUMMY>, <&clks IMX6UL_CLK_DUMMY>; 325724ba675SRob Herring clock-names = "bus", "mclk1", "mclk2", "mclk3"; 326724ba675SRob Herring dmas = <&sdma 37 24 0>, 327724ba675SRob Herring <&sdma 38 24 0>; 328724ba675SRob Herring dma-names = "rx", "tx"; 329724ba675SRob Herring status = "disabled"; 330724ba675SRob Herring }; 331724ba675SRob Herring 332724ba675SRob Herring sai3: sai@2030000 { 333724ba675SRob Herring #sound-dai-cells = <0>; 334724ba675SRob Herring compatible = "fsl,imx6ul-sai", "fsl,imx6sx-sai"; 335724ba675SRob Herring reg = <0x02030000 0x4000>; 336724ba675SRob Herring interrupts = <GIC_SPI 24 IRQ_TYPE_LEVEL_HIGH>; 337724ba675SRob Herring clocks = <&clks IMX6UL_CLK_SAI3_IPG>, 338724ba675SRob Herring <&clks IMX6UL_CLK_SAI3>, 339724ba675SRob Herring <&clks IMX6UL_CLK_DUMMY>, <&clks IMX6UL_CLK_DUMMY>; 340724ba675SRob Herring clock-names = "bus", "mclk1", "mclk2", "mclk3"; 341724ba675SRob Herring dmas = <&sdma 39 24 0>, 342724ba675SRob Herring <&sdma 40 24 0>; 343724ba675SRob Herring dma-names = "rx", "tx"; 344724ba675SRob Herring status = "disabled"; 345724ba675SRob Herring }; 346724ba675SRob Herring 347724ba675SRob Herring asrc: asrc@2034000 { 348724ba675SRob Herring compatible = "fsl,imx6ul-asrc", "fsl,imx53-asrc"; 349724ba675SRob Herring reg = <0x2034000 0x4000>; 350724ba675SRob Herring interrupts = <GIC_SPI 50 IRQ_TYPE_LEVEL_HIGH>; 351724ba675SRob Herring clocks = <&clks IMX6UL_CLK_ASRC_IPG>, 352724ba675SRob Herring <&clks IMX6UL_CLK_ASRC_MEM>, <&clks 0>, 353724ba675SRob Herring <&clks 0>, <&clks 0>, <&clks 0>, <&clks 0>, 354724ba675SRob Herring <&clks 0>, <&clks 0>, <&clks 0>, <&clks 0>, 355724ba675SRob Herring <&clks 0>, <&clks 0>, <&clks 0>, <&clks 0>, 356724ba675SRob Herring <&clks IMX6UL_CLK_SPDIF>, <&clks 0>, <&clks 0>, 357724ba675SRob Herring <&clks IMX6UL_CLK_SPBA>; 358724ba675SRob Herring clock-names = "mem", "ipg", "asrck_0", 359724ba675SRob Herring "asrck_1", "asrck_2", "asrck_3", "asrck_4", 360724ba675SRob Herring "asrck_5", "asrck_6", "asrck_7", "asrck_8", 361724ba675SRob Herring "asrck_9", "asrck_a", "asrck_b", "asrck_c", 362724ba675SRob Herring "asrck_d", "asrck_e", "asrck_f", "spba"; 363724ba675SRob Herring dmas = <&sdma 17 23 1>, <&sdma 18 23 1>, <&sdma 19 23 1>, 364724ba675SRob Herring <&sdma 20 23 1>, <&sdma 21 23 1>, <&sdma 22 23 1>; 365724ba675SRob Herring dma-names = "rxa", "rxb", "rxc", 366724ba675SRob Herring "txa", "txb", "txc"; 367724ba675SRob Herring fsl,asrc-rate = <48000>; 368724ba675SRob Herring fsl,asrc-width = <16>; 369724ba675SRob Herring status = "okay"; 370724ba675SRob Herring }; 371724ba675SRob Herring }; 372724ba675SRob Herring 373724ba675SRob Herring tsc: tsc@2040000 { 374724ba675SRob Herring compatible = "fsl,imx6ul-tsc"; 375724ba675SRob Herring reg = <0x02040000 0x4000>, <0x0219c000 0x4000>; 376724ba675SRob Herring interrupts = <GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>, 377724ba675SRob Herring <GIC_SPI 101 IRQ_TYPE_LEVEL_HIGH>; 378724ba675SRob Herring clocks = <&clks IMX6UL_CLK_IPG>, 379724ba675SRob Herring <&clks IMX6UL_CLK_ADC2>; 380724ba675SRob Herring clock-names = "tsc", "adc"; 381724ba675SRob Herring status = "disabled"; 382724ba675SRob Herring }; 383724ba675SRob Herring 384724ba675SRob Herring pwm1: pwm@2080000 { 385724ba675SRob Herring compatible = "fsl,imx6ul-pwm", "fsl,imx27-pwm"; 386724ba675SRob Herring reg = <0x02080000 0x4000>; 387724ba675SRob Herring interrupts = <GIC_SPI 83 IRQ_TYPE_LEVEL_HIGH>; 388724ba675SRob Herring clocks = <&clks IMX6UL_CLK_PWM1>, 389724ba675SRob Herring <&clks IMX6UL_CLK_PWM1>; 390724ba675SRob Herring clock-names = "ipg", "per"; 391724ba675SRob Herring #pwm-cells = <3>; 392724ba675SRob Herring status = "disabled"; 393724ba675SRob Herring }; 394724ba675SRob Herring 395724ba675SRob Herring pwm2: pwm@2084000 { 396724ba675SRob Herring compatible = "fsl,imx6ul-pwm", "fsl,imx27-pwm"; 397724ba675SRob Herring reg = <0x02084000 0x4000>; 398724ba675SRob Herring interrupts = <GIC_SPI 84 IRQ_TYPE_LEVEL_HIGH>; 399724ba675SRob Herring clocks = <&clks IMX6UL_CLK_PWM2>, 400724ba675SRob Herring <&clks IMX6UL_CLK_PWM2>; 401724ba675SRob Herring clock-names = "ipg", "per"; 402724ba675SRob Herring #pwm-cells = <3>; 403724ba675SRob Herring status = "disabled"; 404724ba675SRob Herring }; 405724ba675SRob Herring 406724ba675SRob Herring pwm3: pwm@2088000 { 407724ba675SRob Herring compatible = "fsl,imx6ul-pwm", "fsl,imx27-pwm"; 408724ba675SRob Herring reg = <0x02088000 0x4000>; 409724ba675SRob Herring interrupts = <GIC_SPI 85 IRQ_TYPE_LEVEL_HIGH>; 410724ba675SRob Herring clocks = <&clks IMX6UL_CLK_PWM3>, 411724ba675SRob Herring <&clks IMX6UL_CLK_PWM3>; 412724ba675SRob Herring clock-names = "ipg", "per"; 413724ba675SRob Herring #pwm-cells = <3>; 414724ba675SRob Herring status = "disabled"; 415724ba675SRob Herring }; 416724ba675SRob Herring 417724ba675SRob Herring pwm4: pwm@208c000 { 418724ba675SRob Herring compatible = "fsl,imx6ul-pwm", "fsl,imx27-pwm"; 419724ba675SRob Herring reg = <0x0208c000 0x4000>; 420724ba675SRob Herring interrupts = <GIC_SPI 86 IRQ_TYPE_LEVEL_HIGH>; 421724ba675SRob Herring clocks = <&clks IMX6UL_CLK_PWM4>, 422724ba675SRob Herring <&clks IMX6UL_CLK_PWM4>; 423724ba675SRob Herring clock-names = "ipg", "per"; 424724ba675SRob Herring #pwm-cells = <3>; 425724ba675SRob Herring status = "disabled"; 426724ba675SRob Herring }; 427724ba675SRob Herring 428724ba675SRob Herring can1: can@2090000 { 429724ba675SRob Herring compatible = "fsl,imx6ul-flexcan", "fsl,imx6q-flexcan"; 430724ba675SRob Herring reg = <0x02090000 0x4000>; 431724ba675SRob Herring interrupts = <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>; 432724ba675SRob Herring clocks = <&clks IMX6UL_CLK_CAN1_IPG>, 433724ba675SRob Herring <&clks IMX6UL_CLK_CAN1_SERIAL>; 434724ba675SRob Herring clock-names = "ipg", "per"; 435724ba675SRob Herring fsl,stop-mode = <&gpr 0x10 1>; 436724ba675SRob Herring status = "disabled"; 437724ba675SRob Herring }; 438724ba675SRob Herring 439724ba675SRob Herring can2: can@2094000 { 440724ba675SRob Herring compatible = "fsl,imx6ul-flexcan", "fsl,imx6q-flexcan"; 441724ba675SRob Herring reg = <0x02094000 0x4000>; 442724ba675SRob Herring interrupts = <GIC_SPI 111 IRQ_TYPE_LEVEL_HIGH>; 443724ba675SRob Herring clocks = <&clks IMX6UL_CLK_CAN2_IPG>, 444724ba675SRob Herring <&clks IMX6UL_CLK_CAN2_SERIAL>; 445724ba675SRob Herring clock-names = "ipg", "per"; 446724ba675SRob Herring fsl,stop-mode = <&gpr 0x10 2>; 447724ba675SRob Herring status = "disabled"; 448724ba675SRob Herring }; 449724ba675SRob Herring 450724ba675SRob Herring gpt1: timer@2098000 { 451724ba675SRob Herring compatible = "fsl,imx6ul-gpt", "fsl,imx6sx-gpt"; 452724ba675SRob Herring reg = <0x02098000 0x4000>; 453724ba675SRob Herring interrupts = <GIC_SPI 55 IRQ_TYPE_LEVEL_HIGH>; 454724ba675SRob Herring clocks = <&clks IMX6UL_CLK_GPT1_BUS>, 455724ba675SRob Herring <&clks IMX6UL_CLK_GPT1_SERIAL>; 456724ba675SRob Herring clock-names = "ipg", "per"; 457724ba675SRob Herring }; 458724ba675SRob Herring 459724ba675SRob Herring gpio1: gpio@209c000 { 460724ba675SRob Herring compatible = "fsl,imx6ul-gpio", "fsl,imx35-gpio"; 461724ba675SRob Herring reg = <0x0209c000 0x4000>; 462724ba675SRob Herring interrupts = <GIC_SPI 66 IRQ_TYPE_LEVEL_HIGH>, 463724ba675SRob Herring <GIC_SPI 67 IRQ_TYPE_LEVEL_HIGH>; 464724ba675SRob Herring clocks = <&clks IMX6UL_CLK_GPIO1>; 465724ba675SRob Herring gpio-controller; 466724ba675SRob Herring #gpio-cells = <2>; 467724ba675SRob Herring interrupt-controller; 468724ba675SRob Herring #interrupt-cells = <2>; 469724ba675SRob Herring gpio-ranges = <&iomuxc 0 23 10>, <&iomuxc 10 17 6>, 470724ba675SRob Herring <&iomuxc 16 33 16>; 471724ba675SRob Herring }; 472724ba675SRob Herring 473724ba675SRob Herring gpio2: gpio@20a0000 { 474724ba675SRob Herring compatible = "fsl,imx6ul-gpio", "fsl,imx35-gpio"; 475724ba675SRob Herring reg = <0x020a0000 0x4000>; 476724ba675SRob Herring interrupts = <GIC_SPI 68 IRQ_TYPE_LEVEL_HIGH>, 477724ba675SRob Herring <GIC_SPI 69 IRQ_TYPE_LEVEL_HIGH>; 478724ba675SRob Herring clocks = <&clks IMX6UL_CLK_GPIO2>; 479724ba675SRob Herring gpio-controller; 480724ba675SRob Herring #gpio-cells = <2>; 481724ba675SRob Herring interrupt-controller; 482724ba675SRob Herring #interrupt-cells = <2>; 483724ba675SRob Herring gpio-ranges = <&iomuxc 0 49 16>, <&iomuxc 16 111 6>; 484724ba675SRob Herring }; 485724ba675SRob Herring 486724ba675SRob Herring gpio3: gpio@20a4000 { 487724ba675SRob Herring compatible = "fsl,imx6ul-gpio", "fsl,imx35-gpio"; 488724ba675SRob Herring reg = <0x020a4000 0x4000>; 489724ba675SRob Herring interrupts = <GIC_SPI 70 IRQ_TYPE_LEVEL_HIGH>, 490724ba675SRob Herring <GIC_SPI 71 IRQ_TYPE_LEVEL_HIGH>; 491724ba675SRob Herring clocks = <&clks IMX6UL_CLK_GPIO3>; 492724ba675SRob Herring gpio-controller; 493724ba675SRob Herring #gpio-cells = <2>; 494724ba675SRob Herring interrupt-controller; 495724ba675SRob Herring #interrupt-cells = <2>; 496724ba675SRob Herring gpio-ranges = <&iomuxc 0 65 29>; 497724ba675SRob Herring }; 498724ba675SRob Herring 499724ba675SRob Herring gpio4: gpio@20a8000 { 500724ba675SRob Herring compatible = "fsl,imx6ul-gpio", "fsl,imx35-gpio"; 501724ba675SRob Herring reg = <0x020a8000 0x4000>; 502724ba675SRob Herring interrupts = <GIC_SPI 72 IRQ_TYPE_LEVEL_HIGH>, 503724ba675SRob Herring <GIC_SPI 73 IRQ_TYPE_LEVEL_HIGH>; 504724ba675SRob Herring clocks = <&clks IMX6UL_CLK_GPIO4>; 505724ba675SRob Herring gpio-controller; 506724ba675SRob Herring #gpio-cells = <2>; 507724ba675SRob Herring interrupt-controller; 508724ba675SRob Herring #interrupt-cells = <2>; 509724ba675SRob Herring gpio-ranges = <&iomuxc 0 94 17>, <&iomuxc 17 117 12>; 510724ba675SRob Herring }; 511724ba675SRob Herring 512724ba675SRob Herring gpio5: gpio@20ac000 { 513724ba675SRob Herring compatible = "fsl,imx6ul-gpio", "fsl,imx35-gpio"; 514724ba675SRob Herring reg = <0x020ac000 0x4000>; 515724ba675SRob Herring interrupts = <GIC_SPI 74 IRQ_TYPE_LEVEL_HIGH>, 516724ba675SRob Herring <GIC_SPI 75 IRQ_TYPE_LEVEL_HIGH>; 517724ba675SRob Herring clocks = <&clks IMX6UL_CLK_GPIO5>; 518724ba675SRob Herring gpio-controller; 519724ba675SRob Herring #gpio-cells = <2>; 520724ba675SRob Herring interrupt-controller; 521724ba675SRob Herring #interrupt-cells = <2>; 522724ba675SRob Herring gpio-ranges = <&iomuxc 0 7 10>, <&iomuxc 10 5 2>; 523724ba675SRob Herring }; 524724ba675SRob Herring 525724ba675SRob Herring fec2: ethernet@20b4000 { 526724ba675SRob Herring compatible = "fsl,imx6ul-fec", "fsl,imx6q-fec"; 527724ba675SRob Herring reg = <0x020b4000 0x4000>; 528724ba675SRob Herring interrupt-names = "int0", "pps"; 529724ba675SRob Herring interrupts = <GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>, 530724ba675SRob Herring <GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>; 531724ba675SRob Herring clocks = <&clks IMX6UL_CLK_ENET>, 532724ba675SRob Herring <&clks IMX6UL_CLK_ENET_AHB>, 533724ba675SRob Herring <&clks IMX6UL_CLK_ENET_PTP>, 534724ba675SRob Herring <&clks IMX6UL_CLK_ENET2_REF_SEL>; 535724ba675SRob Herring clock-names = "ipg", "ahb", "ptp", 536724ba675SRob Herring "enet_clk_ref"; 537724ba675SRob Herring fsl,num-tx-queues = <1>; 538724ba675SRob Herring fsl,num-rx-queues = <1>; 539724ba675SRob Herring fsl,stop-mode = <&gpr 0x10 4>; 540724ba675SRob Herring fsl,magic-packet; 541724ba675SRob Herring status = "disabled"; 542724ba675SRob Herring }; 543724ba675SRob Herring 544724ba675SRob Herring kpp: keypad@20b8000 { 545724ba675SRob Herring compatible = "fsl,imx6ul-kpp", "fsl,imx21-kpp"; 546724ba675SRob Herring reg = <0x020b8000 0x4000>; 547724ba675SRob Herring interrupts = <GIC_SPI 82 IRQ_TYPE_LEVEL_HIGH>; 548724ba675SRob Herring clocks = <&clks IMX6UL_CLK_KPP>; 549724ba675SRob Herring status = "disabled"; 550724ba675SRob Herring }; 551724ba675SRob Herring 552724ba675SRob Herring wdog1: watchdog@20bc000 { 553724ba675SRob Herring compatible = "fsl,imx6ul-wdt", "fsl,imx21-wdt"; 554724ba675SRob Herring reg = <0x020bc000 0x4000>; 555724ba675SRob Herring interrupts = <GIC_SPI 80 IRQ_TYPE_LEVEL_HIGH>; 556724ba675SRob Herring clocks = <&clks IMX6UL_CLK_WDOG1>; 557724ba675SRob Herring }; 558724ba675SRob Herring 559724ba675SRob Herring wdog2: watchdog@20c0000 { 560724ba675SRob Herring compatible = "fsl,imx6ul-wdt", "fsl,imx21-wdt"; 561724ba675SRob Herring reg = <0x020c0000 0x4000>; 562724ba675SRob Herring interrupts = <GIC_SPI 81 IRQ_TYPE_LEVEL_HIGH>; 563724ba675SRob Herring clocks = <&clks IMX6UL_CLK_WDOG2>; 564724ba675SRob Herring status = "disabled"; 565724ba675SRob Herring }; 566724ba675SRob Herring 567724ba675SRob Herring clks: clock-controller@20c4000 { 568724ba675SRob Herring compatible = "fsl,imx6ul-ccm"; 569724ba675SRob Herring reg = <0x020c4000 0x4000>; 570724ba675SRob Herring interrupts = <GIC_SPI 87 IRQ_TYPE_LEVEL_HIGH>, 571724ba675SRob Herring <GIC_SPI 88 IRQ_TYPE_LEVEL_HIGH>; 572724ba675SRob Herring #clock-cells = <1>; 573724ba675SRob Herring clocks = <&ckil>, <&osc>, <&ipp_di0>, <&ipp_di1>; 574724ba675SRob Herring clock-names = "ckil", "osc", "ipp_di0", "ipp_di1"; 575724ba675SRob Herring }; 576724ba675SRob Herring 577724ba675SRob Herring anatop: anatop@20c8000 { 578724ba675SRob Herring compatible = "fsl,imx6ul-anatop", "fsl,imx6q-anatop", 579724ba675SRob Herring "syscon", "simple-mfd"; 580724ba675SRob Herring reg = <0x020c8000 0x1000>; 581724ba675SRob Herring interrupts = <GIC_SPI 49 IRQ_TYPE_LEVEL_HIGH>, 582724ba675SRob Herring <GIC_SPI 54 IRQ_TYPE_LEVEL_HIGH>, 583724ba675SRob Herring <GIC_SPI 127 IRQ_TYPE_LEVEL_HIGH>; 584724ba675SRob Herring 585724ba675SRob Herring reg_3p0: regulator-3p0 { 586724ba675SRob Herring compatible = "fsl,anatop-regulator"; 587724ba675SRob Herring regulator-name = "vdd3p0"; 588724ba675SRob Herring regulator-min-microvolt = <2625000>; 589724ba675SRob Herring regulator-max-microvolt = <3400000>; 590724ba675SRob Herring anatop-reg-offset = <0x120>; 591724ba675SRob Herring anatop-vol-bit-shift = <8>; 592724ba675SRob Herring anatop-vol-bit-width = <5>; 593724ba675SRob Herring anatop-min-bit-val = <0>; 594724ba675SRob Herring anatop-min-voltage = <2625000>; 595724ba675SRob Herring anatop-max-voltage = <3400000>; 596724ba675SRob Herring anatop-enable-bit = <0>; 597724ba675SRob Herring }; 598724ba675SRob Herring 599724ba675SRob Herring reg_arm: regulator-vddcore { 600724ba675SRob Herring compatible = "fsl,anatop-regulator"; 601724ba675SRob Herring regulator-name = "cpu"; 602724ba675SRob Herring regulator-min-microvolt = <725000>; 603724ba675SRob Herring regulator-max-microvolt = <1450000>; 604724ba675SRob Herring regulator-always-on; 605724ba675SRob Herring anatop-reg-offset = <0x140>; 606724ba675SRob Herring anatop-vol-bit-shift = <0>; 607724ba675SRob Herring anatop-vol-bit-width = <5>; 608724ba675SRob Herring anatop-delay-reg-offset = <0x170>; 609724ba675SRob Herring anatop-delay-bit-shift = <24>; 610724ba675SRob Herring anatop-delay-bit-width = <2>; 611724ba675SRob Herring anatop-min-bit-val = <1>; 612724ba675SRob Herring anatop-min-voltage = <725000>; 613724ba675SRob Herring anatop-max-voltage = <1450000>; 614724ba675SRob Herring }; 615724ba675SRob Herring 616724ba675SRob Herring reg_soc: regulator-vddsoc { 617724ba675SRob Herring compatible = "fsl,anatop-regulator"; 618724ba675SRob Herring regulator-name = "vddsoc"; 619724ba675SRob Herring regulator-min-microvolt = <725000>; 620724ba675SRob Herring regulator-max-microvolt = <1450000>; 621724ba675SRob Herring regulator-always-on; 622724ba675SRob Herring anatop-reg-offset = <0x140>; 623724ba675SRob Herring anatop-vol-bit-shift = <18>; 624724ba675SRob Herring anatop-vol-bit-width = <5>; 625724ba675SRob Herring anatop-delay-reg-offset = <0x170>; 626724ba675SRob Herring anatop-delay-bit-shift = <28>; 627724ba675SRob Herring anatop-delay-bit-width = <2>; 628724ba675SRob Herring anatop-min-bit-val = <1>; 629724ba675SRob Herring anatop-min-voltage = <725000>; 630724ba675SRob Herring anatop-max-voltage = <1450000>; 631724ba675SRob Herring }; 632724ba675SRob Herring 633724ba675SRob Herring tempmon: tempmon { 634724ba675SRob Herring compatible = "fsl,imx6ul-tempmon", "fsl,imx6sx-tempmon"; 635724ba675SRob Herring interrupt-parent = <&gpc>; 636724ba675SRob Herring interrupts = <GIC_SPI 49 IRQ_TYPE_LEVEL_HIGH>; 637724ba675SRob Herring fsl,tempmon = <&anatop>; 638724ba675SRob Herring nvmem-cells = <&tempmon_calib>, <&tempmon_temp_grade>; 639724ba675SRob Herring nvmem-cell-names = "calib", "temp_grade"; 640724ba675SRob Herring clocks = <&clks IMX6UL_CLK_PLL3_USB_OTG>; 641724ba675SRob Herring }; 642724ba675SRob Herring }; 643724ba675SRob Herring 644724ba675SRob Herring usbphy1: usbphy@20c9000 { 645724ba675SRob Herring compatible = "fsl,imx6ul-usbphy", "fsl,imx23-usbphy"; 646724ba675SRob Herring reg = <0x020c9000 0x1000>; 647724ba675SRob Herring interrupts = <GIC_SPI 44 IRQ_TYPE_LEVEL_HIGH>; 648724ba675SRob Herring clocks = <&clks IMX6UL_CLK_USBPHY1>; 649724ba675SRob Herring phy-3p0-supply = <®_3p0>; 650724ba675SRob Herring fsl,anatop = <&anatop>; 651724ba675SRob Herring }; 652724ba675SRob Herring 653724ba675SRob Herring usbphy2: usbphy@20ca000 { 654724ba675SRob Herring compatible = "fsl,imx6ul-usbphy", "fsl,imx23-usbphy"; 655724ba675SRob Herring reg = <0x020ca000 0x1000>; 656724ba675SRob Herring interrupts = <GIC_SPI 45 IRQ_TYPE_LEVEL_HIGH>; 657724ba675SRob Herring clocks = <&clks IMX6UL_CLK_USBPHY2>; 658724ba675SRob Herring phy-3p0-supply = <®_3p0>; 659724ba675SRob Herring fsl,anatop = <&anatop>; 660724ba675SRob Herring }; 661724ba675SRob Herring 662724ba675SRob Herring snvs: snvs@20cc000 { 663724ba675SRob Herring compatible = "fsl,sec-v4.0-mon", "syscon", "simple-mfd"; 664724ba675SRob Herring reg = <0x020cc000 0x4000>; 665724ba675SRob Herring 666724ba675SRob Herring snvs_rtc: snvs-rtc-lp { 667724ba675SRob Herring compatible = "fsl,sec-v4.0-mon-rtc-lp"; 668724ba675SRob Herring regmap = <&snvs>; 669724ba675SRob Herring offset = <0x34>; 670724ba675SRob Herring interrupts = <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>, 671724ba675SRob Herring <GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>; 672724ba675SRob Herring }; 673724ba675SRob Herring 674724ba675SRob Herring snvs_poweroff: snvs-poweroff { 675724ba675SRob Herring compatible = "syscon-poweroff"; 676724ba675SRob Herring regmap = <&snvs>; 677724ba675SRob Herring offset = <0x38>; 678724ba675SRob Herring value = <0x60>; 679724ba675SRob Herring mask = <0x60>; 680724ba675SRob Herring status = "disabled"; 681724ba675SRob Herring }; 682724ba675SRob Herring 683724ba675SRob Herring snvs_pwrkey: snvs-powerkey { 684724ba675SRob Herring compatible = "fsl,sec-v4.0-pwrkey"; 685724ba675SRob Herring regmap = <&snvs>; 686724ba675SRob Herring interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>; 687724ba675SRob Herring linux,keycode = <KEY_POWER>; 688724ba675SRob Herring wakeup-source; 689724ba675SRob Herring status = "disabled"; 690724ba675SRob Herring }; 691724ba675SRob Herring 692724ba675SRob Herring snvs_lpgpr: snvs-lpgpr { 693724ba675SRob Herring compatible = "fsl,imx6ul-snvs-lpgpr"; 694724ba675SRob Herring }; 695724ba675SRob Herring }; 696724ba675SRob Herring 697724ba675SRob Herring epit1: epit@20d0000 { 698724ba675SRob Herring reg = <0x020d0000 0x4000>; 699724ba675SRob Herring interrupts = <GIC_SPI 56 IRQ_TYPE_LEVEL_HIGH>; 700724ba675SRob Herring }; 701724ba675SRob Herring 702724ba675SRob Herring epit2: epit@20d4000 { 703724ba675SRob Herring reg = <0x020d4000 0x4000>; 704724ba675SRob Herring interrupts = <GIC_SPI 57 IRQ_TYPE_LEVEL_HIGH>; 705724ba675SRob Herring }; 706724ba675SRob Herring 707724ba675SRob Herring src: reset-controller@20d8000 { 708724ba675SRob Herring compatible = "fsl,imx6ul-src", "fsl,imx51-src"; 709724ba675SRob Herring reg = <0x020d8000 0x4000>; 710724ba675SRob Herring interrupts = <GIC_SPI 91 IRQ_TYPE_LEVEL_HIGH>, 711724ba675SRob Herring <GIC_SPI 96 IRQ_TYPE_LEVEL_HIGH>; 712724ba675SRob Herring #reset-cells = <1>; 713724ba675SRob Herring }; 714724ba675SRob Herring 715724ba675SRob Herring gpc: gpc@20dc000 { 716724ba675SRob Herring compatible = "fsl,imx6ul-gpc", "fsl,imx6q-gpc"; 717724ba675SRob Herring reg = <0x020dc000 0x4000>; 718724ba675SRob Herring interrupt-controller; 719724ba675SRob Herring #interrupt-cells = <3>; 720724ba675SRob Herring interrupts = <GIC_SPI 89 IRQ_TYPE_LEVEL_HIGH>; 721724ba675SRob Herring interrupt-parent = <&intc>; 722724ba675SRob Herring clocks = <&clks IMX6UL_CLK_IPG>; 723724ba675SRob Herring clock-names = "ipg"; 724724ba675SRob Herring 725724ba675SRob Herring pgc { 726724ba675SRob Herring #address-cells = <1>; 727724ba675SRob Herring #size-cells = <0>; 728724ba675SRob Herring 729724ba675SRob Herring power-domain@0 { 730724ba675SRob Herring reg = <0>; 731724ba675SRob Herring #power-domain-cells = <0>; 732724ba675SRob Herring }; 733724ba675SRob Herring }; 734724ba675SRob Herring }; 735724ba675SRob Herring 736724ba675SRob Herring iomuxc: pinctrl@20e0000 { 737724ba675SRob Herring compatible = "fsl,imx6ul-iomuxc"; 738724ba675SRob Herring reg = <0x020e0000 0x4000>; 739724ba675SRob Herring }; 740724ba675SRob Herring 741724ba675SRob Herring gpr: iomuxc-gpr@20e4000 { 742724ba675SRob Herring compatible = "fsl,imx6ul-iomuxc-gpr", 743724ba675SRob Herring "fsl,imx6q-iomuxc-gpr", "syscon"; 744724ba675SRob Herring reg = <0x020e4000 0x4000>; 745724ba675SRob Herring }; 746724ba675SRob Herring 747724ba675SRob Herring gpt2: timer@20e8000 { 748724ba675SRob Herring compatible = "fsl,imx6ul-gpt", "fsl,imx6sx-gpt"; 749724ba675SRob Herring reg = <0x020e8000 0x4000>; 750724ba675SRob Herring interrupts = <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>; 751724ba675SRob Herring clocks = <&clks IMX6UL_CLK_GPT2_BUS>, 752724ba675SRob Herring <&clks IMX6UL_CLK_GPT2_SERIAL>; 753724ba675SRob Herring clock-names = "ipg", "per"; 754724ba675SRob Herring status = "disabled"; 755724ba675SRob Herring }; 756724ba675SRob Herring 757724ba675SRob Herring sdma: dma-controller@20ec000 { 758724ba675SRob Herring compatible = "fsl,imx6ul-sdma", "fsl,imx6q-sdma", 759724ba675SRob Herring "fsl,imx35-sdma"; 760724ba675SRob Herring reg = <0x020ec000 0x4000>; 761724ba675SRob Herring interrupts = <GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>; 762724ba675SRob Herring clocks = <&clks IMX6UL_CLK_IPG>, 763724ba675SRob Herring <&clks IMX6UL_CLK_SDMA>; 764724ba675SRob Herring clock-names = "ipg", "ahb"; 765724ba675SRob Herring #dma-cells = <3>; 766724ba675SRob Herring fsl,sdma-ram-script-name = "imx/sdma/sdma-imx6q.bin"; 767724ba675SRob Herring }; 768724ba675SRob Herring 769724ba675SRob Herring pwm5: pwm@20f0000 { 770724ba675SRob Herring compatible = "fsl,imx6ul-pwm", "fsl,imx27-pwm"; 771724ba675SRob Herring reg = <0x020f0000 0x4000>; 772724ba675SRob Herring interrupts = <GIC_SPI 114 IRQ_TYPE_LEVEL_HIGH>; 773724ba675SRob Herring clocks = <&clks IMX6UL_CLK_PWM5>, 774724ba675SRob Herring <&clks IMX6UL_CLK_PWM5>; 775724ba675SRob Herring clock-names = "ipg", "per"; 776724ba675SRob Herring #pwm-cells = <3>; 777724ba675SRob Herring status = "disabled"; 778724ba675SRob Herring }; 779724ba675SRob Herring 780724ba675SRob Herring pwm6: pwm@20f4000 { 781724ba675SRob Herring compatible = "fsl,imx6ul-pwm", "fsl,imx27-pwm"; 782724ba675SRob Herring reg = <0x020f4000 0x4000>; 783724ba675SRob Herring interrupts = <GIC_SPI 115 IRQ_TYPE_LEVEL_HIGH>; 784724ba675SRob Herring clocks = <&clks IMX6UL_CLK_PWM6>, 785724ba675SRob Herring <&clks IMX6UL_CLK_PWM6>; 786724ba675SRob Herring clock-names = "ipg", "per"; 787724ba675SRob Herring #pwm-cells = <3>; 788724ba675SRob Herring status = "disabled"; 789724ba675SRob Herring }; 790724ba675SRob Herring 791724ba675SRob Herring pwm7: pwm@20f8000 { 792724ba675SRob Herring compatible = "fsl,imx6ul-pwm", "fsl,imx27-pwm"; 793724ba675SRob Herring reg = <0x020f8000 0x4000>; 794724ba675SRob Herring interrupts = <GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>; 795724ba675SRob Herring clocks = <&clks IMX6UL_CLK_PWM7>, 796724ba675SRob Herring <&clks IMX6UL_CLK_PWM7>; 797724ba675SRob Herring clock-names = "ipg", "per"; 798724ba675SRob Herring #pwm-cells = <3>; 799724ba675SRob Herring status = "disabled"; 800724ba675SRob Herring }; 801724ba675SRob Herring 802724ba675SRob Herring pwm8: pwm@20fc000 { 803724ba675SRob Herring compatible = "fsl,imx6ul-pwm", "fsl,imx27-pwm"; 804724ba675SRob Herring reg = <0x020fc000 0x4000>; 805724ba675SRob Herring interrupts = <GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>; 806724ba675SRob Herring clocks = <&clks IMX6UL_CLK_PWM8>, 807724ba675SRob Herring <&clks IMX6UL_CLK_PWM8>; 808724ba675SRob Herring clock-names = "ipg", "per"; 809724ba675SRob Herring #pwm-cells = <3>; 810724ba675SRob Herring status = "disabled"; 811724ba675SRob Herring }; 812724ba675SRob Herring }; 813724ba675SRob Herring 814724ba675SRob Herring aips2: bus@2100000 { 815724ba675SRob Herring compatible = "fsl,aips-bus", "simple-bus"; 816724ba675SRob Herring #address-cells = <1>; 817724ba675SRob Herring #size-cells = <1>; 818724ba675SRob Herring reg = <0x02100000 0x100000>; 819724ba675SRob Herring ranges; 820724ba675SRob Herring 821724ba675SRob Herring crypto: crypto@2140000 { 822724ba675SRob Herring compatible = "fsl,imx6ul-caam", "fsl,sec-v4.0"; 823724ba675SRob Herring #address-cells = <1>; 824724ba675SRob Herring #size-cells = <1>; 825724ba675SRob Herring reg = <0x2140000 0x3c000>; 826724ba675SRob Herring ranges = <0 0x2140000 0x3c000>; 827724ba675SRob Herring interrupts = <GIC_SPI 48 IRQ_TYPE_LEVEL_HIGH>; 828724ba675SRob Herring clocks = <&clks IMX6UL_CLK_CAAM_IPG>, <&clks IMX6UL_CLK_CAAM_ACLK>, 829724ba675SRob Herring <&clks IMX6UL_CLK_CAAM_MEM>; 830724ba675SRob Herring clock-names = "ipg", "aclk", "mem"; 831724ba675SRob Herring 832724ba675SRob Herring sec_jr0: jr@1000 { 833724ba675SRob Herring compatible = "fsl,sec-v4.0-job-ring"; 834724ba675SRob Herring reg = <0x1000 0x1000>; 835724ba675SRob Herring interrupts = <GIC_SPI 105 IRQ_TYPE_LEVEL_HIGH>; 836724ba675SRob Herring }; 837724ba675SRob Herring 838724ba675SRob Herring sec_jr1: jr@2000 { 839724ba675SRob Herring compatible = "fsl,sec-v4.0-job-ring"; 840724ba675SRob Herring reg = <0x2000 0x1000>; 841724ba675SRob Herring interrupts = <GIC_SPI 106 IRQ_TYPE_LEVEL_HIGH>; 842724ba675SRob Herring }; 843724ba675SRob Herring 844724ba675SRob Herring sec_jr2: jr@3000 { 845724ba675SRob Herring compatible = "fsl,sec-v4.0-job-ring"; 846724ba675SRob Herring reg = <0x3000 0x1000>; 847724ba675SRob Herring interrupts = <GIC_SPI 46 IRQ_TYPE_LEVEL_HIGH>; 848724ba675SRob Herring }; 849724ba675SRob Herring }; 850724ba675SRob Herring 851724ba675SRob Herring usbotg1: usb@2184000 { 852724ba675SRob Herring compatible = "fsl,imx6ul-usb", "fsl,imx27-usb"; 853724ba675SRob Herring reg = <0x02184000 0x200>; 854724ba675SRob Herring interrupts = <GIC_SPI 43 IRQ_TYPE_LEVEL_HIGH>; 855724ba675SRob Herring clocks = <&clks IMX6UL_CLK_USBOH3>; 856724ba675SRob Herring fsl,usbphy = <&usbphy1>; 857724ba675SRob Herring fsl,usbmisc = <&usbmisc 0>; 858724ba675SRob Herring fsl,anatop = <&anatop>; 859724ba675SRob Herring ahb-burst-config = <0x0>; 860724ba675SRob Herring tx-burst-size-dword = <0x10>; 861724ba675SRob Herring rx-burst-size-dword = <0x10>; 862724ba675SRob Herring status = "disabled"; 863724ba675SRob Herring }; 864724ba675SRob Herring 865724ba675SRob Herring usbotg2: usb@2184200 { 866724ba675SRob Herring compatible = "fsl,imx6ul-usb", "fsl,imx27-usb"; 867724ba675SRob Herring reg = <0x02184200 0x200>; 868724ba675SRob Herring interrupts = <GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH>; 869724ba675SRob Herring clocks = <&clks IMX6UL_CLK_USBOH3>; 870724ba675SRob Herring fsl,usbphy = <&usbphy2>; 871724ba675SRob Herring fsl,usbmisc = <&usbmisc 1>; 872724ba675SRob Herring ahb-burst-config = <0x0>; 873724ba675SRob Herring tx-burst-size-dword = <0x10>; 874724ba675SRob Herring rx-burst-size-dword = <0x10>; 875724ba675SRob Herring status = "disabled"; 876724ba675SRob Herring }; 877724ba675SRob Herring 878724ba675SRob Herring usbmisc: usbmisc@2184800 { 879724ba675SRob Herring #index-cells = <1>; 880724ba675SRob Herring compatible = "fsl,imx6ul-usbmisc", "fsl,imx6q-usbmisc"; 881724ba675SRob Herring reg = <0x02184800 0x200>; 882724ba675SRob Herring }; 883724ba675SRob Herring 884724ba675SRob Herring fec1: ethernet@2188000 { 885724ba675SRob Herring compatible = "fsl,imx6ul-fec", "fsl,imx6q-fec"; 886724ba675SRob Herring reg = <0x02188000 0x4000>; 887724ba675SRob Herring interrupt-names = "int0", "pps"; 888724ba675SRob Herring interrupts = <GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH>, 889724ba675SRob Herring <GIC_SPI 119 IRQ_TYPE_LEVEL_HIGH>; 890724ba675SRob Herring clocks = <&clks IMX6UL_CLK_ENET>, 891724ba675SRob Herring <&clks IMX6UL_CLK_ENET_AHB>, 892724ba675SRob Herring <&clks IMX6UL_CLK_ENET_PTP>, 893724ba675SRob Herring <&clks IMX6UL_CLK_ENET1_REF_SEL>; 894724ba675SRob Herring clock-names = "ipg", "ahb", "ptp", 895724ba675SRob Herring "enet_clk_ref"; 896724ba675SRob Herring fsl,num-tx-queues = <1>; 897724ba675SRob Herring fsl,num-rx-queues = <1>; 898724ba675SRob Herring fsl,stop-mode = <&gpr 0x10 3>; 899724ba675SRob Herring fsl,magic-packet; 900724ba675SRob Herring status = "disabled"; 901724ba675SRob Herring }; 902724ba675SRob Herring 903724ba675SRob Herring usdhc1: mmc@2190000 { 904724ba675SRob Herring compatible = "fsl,imx6ul-usdhc", "fsl,imx6sx-usdhc"; 905724ba675SRob Herring reg = <0x02190000 0x4000>; 906724ba675SRob Herring interrupts = <GIC_SPI 22 IRQ_TYPE_LEVEL_HIGH>; 907724ba675SRob Herring clocks = <&clks IMX6UL_CLK_USDHC1>, 908724ba675SRob Herring <&clks IMX6UL_CLK_USDHC1>, 909724ba675SRob Herring <&clks IMX6UL_CLK_USDHC1>; 910724ba675SRob Herring clock-names = "ipg", "ahb", "per"; 911724ba675SRob Herring fsl,tuning-step = <2>; 912724ba675SRob Herring fsl,tuning-start-tap = <20>; 913724ba675SRob Herring bus-width = <4>; 914724ba675SRob Herring status = "disabled"; 915724ba675SRob Herring }; 916724ba675SRob Herring 917724ba675SRob Herring usdhc2: mmc@2194000 { 918724ba675SRob Herring compatible = "fsl,imx6ul-usdhc", "fsl,imx6sx-usdhc"; 919724ba675SRob Herring reg = <0x02194000 0x4000>; 920724ba675SRob Herring interrupts = <GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH>; 921724ba675SRob Herring clocks = <&clks IMX6UL_CLK_USDHC2>, 922724ba675SRob Herring <&clks IMX6UL_CLK_USDHC2>, 923724ba675SRob Herring <&clks IMX6UL_CLK_USDHC2>; 924724ba675SRob Herring clock-names = "ipg", "ahb", "per"; 925724ba675SRob Herring bus-width = <4>; 926724ba675SRob Herring fsl,tuning-step = <2>; 927724ba675SRob Herring fsl,tuning-start-tap = <20>; 928724ba675SRob Herring status = "disabled"; 929724ba675SRob Herring }; 930724ba675SRob Herring 931724ba675SRob Herring adc1: adc@2198000 { 932724ba675SRob Herring compatible = "fsl,imx6ul-adc", "fsl,vf610-adc"; 933724ba675SRob Herring reg = <0x02198000 0x4000>; 934724ba675SRob Herring interrupts = <GIC_SPI 100 IRQ_TYPE_LEVEL_HIGH>; 935724ba675SRob Herring clocks = <&clks IMX6UL_CLK_ADC1>; 936724ba675SRob Herring clock-names = "adc"; 937724ba675SRob Herring fsl,adck-max-frequency = <30000000>, <40000000>, 938724ba675SRob Herring <20000000>; 939724ba675SRob Herring status = "disabled"; 940724ba675SRob Herring }; 941724ba675SRob Herring 942724ba675SRob Herring i2c1: i2c@21a0000 { 943724ba675SRob Herring #address-cells = <1>; 944724ba675SRob Herring #size-cells = <0>; 945724ba675SRob Herring compatible = "fsl,imx6ul-i2c", "fsl,imx21-i2c"; 946724ba675SRob Herring reg = <0x021a0000 0x4000>; 947724ba675SRob Herring interrupts = <GIC_SPI 36 IRQ_TYPE_LEVEL_HIGH>; 948724ba675SRob Herring clocks = <&clks IMX6UL_CLK_I2C1>; 949724ba675SRob Herring status = "disabled"; 950724ba675SRob Herring }; 951724ba675SRob Herring 952724ba675SRob Herring i2c2: i2c@21a4000 { 953724ba675SRob Herring #address-cells = <1>; 954724ba675SRob Herring #size-cells = <0>; 955724ba675SRob Herring compatible = "fsl,imx6ul-i2c", "fsl,imx21-i2c"; 956724ba675SRob Herring reg = <0x021a4000 0x4000>; 957724ba675SRob Herring interrupts = <GIC_SPI 37 IRQ_TYPE_LEVEL_HIGH>; 958724ba675SRob Herring clocks = <&clks IMX6UL_CLK_I2C2>; 959724ba675SRob Herring status = "disabled"; 960724ba675SRob Herring }; 961724ba675SRob Herring 962724ba675SRob Herring i2c3: i2c@21a8000 { 963724ba675SRob Herring #address-cells = <1>; 964724ba675SRob Herring #size-cells = <0>; 965724ba675SRob Herring compatible = "fsl,imx6ul-i2c", "fsl,imx21-i2c"; 966724ba675SRob Herring reg = <0x021a8000 0x4000>; 967724ba675SRob Herring interrupts = <GIC_SPI 38 IRQ_TYPE_LEVEL_HIGH>; 968724ba675SRob Herring clocks = <&clks IMX6UL_CLK_I2C3>; 969724ba675SRob Herring status = "disabled"; 970724ba675SRob Herring }; 971724ba675SRob Herring 972724ba675SRob Herring memory-controller@21b0000 { 973724ba675SRob Herring compatible = "fsl,imx6ul-mmdc", "fsl,imx6q-mmdc"; 974724ba675SRob Herring reg = <0x021b0000 0x4000>; 975724ba675SRob Herring clocks = <&clks IMX6UL_CLK_MMDC_P0_IPG>; 976724ba675SRob Herring }; 977724ba675SRob Herring 978724ba675SRob Herring weim: weim@21b8000 { 979724ba675SRob Herring #address-cells = <2>; 980724ba675SRob Herring #size-cells = <1>; 981724ba675SRob Herring compatible = "fsl,imx6ul-weim", "fsl,imx6q-weim"; 982724ba675SRob Herring reg = <0x021b8000 0x4000>; 983724ba675SRob Herring interrupts = <GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>; 984724ba675SRob Herring clocks = <&clks IMX6UL_CLK_EIM>; 985724ba675SRob Herring fsl,weim-cs-gpr = <&gpr>; 986724ba675SRob Herring status = "disabled"; 987724ba675SRob Herring }; 988724ba675SRob Herring 989724ba675SRob Herring ocotp: efuse@21bc000 { 990724ba675SRob Herring #address-cells = <1>; 991724ba675SRob Herring #size-cells = <1>; 992724ba675SRob Herring compatible = "fsl,imx6ul-ocotp", "syscon"; 993724ba675SRob Herring reg = <0x021bc000 0x4000>; 994724ba675SRob Herring clocks = <&clks IMX6UL_CLK_OCOTP>; 995724ba675SRob Herring 996724ba675SRob Herring tempmon_calib: calib@38 { 997724ba675SRob Herring reg = <0x38 4>; 998724ba675SRob Herring }; 999724ba675SRob Herring 1000724ba675SRob Herring tempmon_temp_grade: temp-grade@20 { 1001724ba675SRob Herring reg = <0x20 4>; 1002724ba675SRob Herring }; 1003724ba675SRob Herring 1004724ba675SRob Herring cpu_speed_grade: speed-grade@10 { 1005724ba675SRob Herring reg = <0x10 4>; 1006724ba675SRob Herring }; 1007724ba675SRob Herring }; 1008724ba675SRob Herring 1009724ba675SRob Herring csi: csi@21c4000 { 1010724ba675SRob Herring compatible = "fsl,imx6ul-csi"; 1011724ba675SRob Herring reg = <0x021c4000 0x4000>; 1012724ba675SRob Herring interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>; 1013724ba675SRob Herring clocks = <&clks IMX6UL_CLK_CSI>; 1014724ba675SRob Herring clock-names = "mclk"; 1015724ba675SRob Herring status = "disabled"; 1016724ba675SRob Herring }; 1017724ba675SRob Herring 1018724ba675SRob Herring lcdif: lcdif@21c8000 { 1019724ba675SRob Herring compatible = "fsl,imx6ul-lcdif", "fsl,imx6sx-lcdif"; 1020724ba675SRob Herring reg = <0x021c8000 0x4000>; 1021724ba675SRob Herring interrupts = <GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>; 1022724ba675SRob Herring clocks = <&clks IMX6UL_CLK_LCDIF_PIX>, 1023724ba675SRob Herring <&clks IMX6UL_CLK_LCDIF_APB>, 1024724ba675SRob Herring <&clks IMX6UL_CLK_DUMMY>; 1025724ba675SRob Herring clock-names = "pix", "axi", "disp_axi"; 1026724ba675SRob Herring status = "disabled"; 1027724ba675SRob Herring }; 1028724ba675SRob Herring 1029724ba675SRob Herring pxp: pxp@21cc000 { 1030724ba675SRob Herring compatible = "fsl,imx6ul-pxp"; 1031724ba675SRob Herring reg = <0x021cc000 0x4000>; 1032724ba675SRob Herring interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>; 1033724ba675SRob Herring clocks = <&clks IMX6UL_CLK_PXP>; 1034724ba675SRob Herring clock-names = "axi"; 1035724ba675SRob Herring }; 1036724ba675SRob Herring 1037724ba675SRob Herring qspi: spi@21e0000 { 1038724ba675SRob Herring #address-cells = <1>; 1039724ba675SRob Herring #size-cells = <0>; 1040724ba675SRob Herring compatible = "fsl,imx6ul-qspi"; 1041724ba675SRob Herring reg = <0x021e0000 0x4000>, <0x60000000 0x10000000>; 1042724ba675SRob Herring reg-names = "QuadSPI", "QuadSPI-memory"; 1043724ba675SRob Herring interrupts = <GIC_SPI 107 IRQ_TYPE_LEVEL_HIGH>; 1044724ba675SRob Herring clocks = <&clks IMX6UL_CLK_QSPI>, 1045724ba675SRob Herring <&clks IMX6UL_CLK_QSPI>; 1046724ba675SRob Herring clock-names = "qspi_en", "qspi"; 1047724ba675SRob Herring status = "disabled"; 1048724ba675SRob Herring }; 1049724ba675SRob Herring 1050724ba675SRob Herring wdog3: watchdog@21e4000 { 1051724ba675SRob Herring compatible = "fsl,imx6ul-wdt", "fsl,imx21-wdt"; 1052724ba675SRob Herring reg = <0x021e4000 0x4000>; 1053724ba675SRob Herring interrupts = <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>; 1054724ba675SRob Herring clocks = <&clks IMX6UL_CLK_WDOG3>; 1055724ba675SRob Herring status = "disabled"; 1056724ba675SRob Herring }; 1057724ba675SRob Herring 1058724ba675SRob Herring uart2: serial@21e8000 { 1059724ba675SRob Herring compatible = "fsl,imx6ul-uart", 1060724ba675SRob Herring "fsl,imx6q-uart"; 1061724ba675SRob Herring reg = <0x021e8000 0x4000>; 1062724ba675SRob Herring interrupts = <GIC_SPI 27 IRQ_TYPE_LEVEL_HIGH>; 1063724ba675SRob Herring clocks = <&clks IMX6UL_CLK_UART2_IPG>, 1064724ba675SRob Herring <&clks IMX6UL_CLK_UART2_SERIAL>; 1065724ba675SRob Herring clock-names = "ipg", "per"; 1066724ba675SRob Herring status = "disabled"; 1067724ba675SRob Herring }; 1068724ba675SRob Herring 1069724ba675SRob Herring uart3: serial@21ec000 { 1070724ba675SRob Herring compatible = "fsl,imx6ul-uart", 1071724ba675SRob Herring "fsl,imx6q-uart"; 1072724ba675SRob Herring reg = <0x021ec000 0x4000>; 1073724ba675SRob Herring interrupts = <GIC_SPI 28 IRQ_TYPE_LEVEL_HIGH>; 1074724ba675SRob Herring clocks = <&clks IMX6UL_CLK_UART3_IPG>, 1075724ba675SRob Herring <&clks IMX6UL_CLK_UART3_SERIAL>; 1076724ba675SRob Herring clock-names = "ipg", "per"; 1077724ba675SRob Herring status = "disabled"; 1078724ba675SRob Herring }; 1079724ba675SRob Herring 1080724ba675SRob Herring uart4: serial@21f0000 { 1081724ba675SRob Herring compatible = "fsl,imx6ul-uart", 1082724ba675SRob Herring "fsl,imx6q-uart"; 1083724ba675SRob Herring reg = <0x021f0000 0x4000>; 1084724ba675SRob Herring interrupts = <GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>; 1085724ba675SRob Herring clocks = <&clks IMX6UL_CLK_UART4_IPG>, 1086724ba675SRob Herring <&clks IMX6UL_CLK_UART4_SERIAL>; 1087724ba675SRob Herring clock-names = "ipg", "per"; 1088724ba675SRob Herring status = "disabled"; 1089724ba675SRob Herring }; 1090724ba675SRob Herring 1091724ba675SRob Herring uart5: serial@21f4000 { 1092724ba675SRob Herring compatible = "fsl,imx6ul-uart", 1093724ba675SRob Herring "fsl,imx6q-uart"; 1094724ba675SRob Herring reg = <0x021f4000 0x4000>; 1095724ba675SRob Herring interrupts = <GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>; 1096724ba675SRob Herring clocks = <&clks IMX6UL_CLK_UART5_IPG>, 1097724ba675SRob Herring <&clks IMX6UL_CLK_UART5_SERIAL>; 1098724ba675SRob Herring clock-names = "ipg", "per"; 1099724ba675SRob Herring status = "disabled"; 1100724ba675SRob Herring }; 1101724ba675SRob Herring 1102724ba675SRob Herring i2c4: i2c@21f8000 { 1103724ba675SRob Herring #address-cells = <1>; 1104724ba675SRob Herring #size-cells = <0>; 1105724ba675SRob Herring compatible = "fsl,imx6ul-i2c", "fsl,imx21-i2c"; 1106724ba675SRob Herring reg = <0x021f8000 0x4000>; 1107724ba675SRob Herring interrupts = <GIC_SPI 35 IRQ_TYPE_LEVEL_HIGH>; 1108724ba675SRob Herring clocks = <&clks IMX6UL_CLK_I2C4>; 1109724ba675SRob Herring status = "disabled"; 1110724ba675SRob Herring }; 1111724ba675SRob Herring 1112724ba675SRob Herring uart6: serial@21fc000 { 1113724ba675SRob Herring compatible = "fsl,imx6ul-uart", 1114724ba675SRob Herring "fsl,imx6q-uart"; 1115724ba675SRob Herring reg = <0x021fc000 0x4000>; 1116724ba675SRob Herring interrupts = <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>; 1117724ba675SRob Herring clocks = <&clks IMX6UL_CLK_UART6_IPG>, 1118724ba675SRob Herring <&clks IMX6UL_CLK_UART6_SERIAL>; 1119724ba675SRob Herring clock-names = "ipg", "per"; 1120724ba675SRob Herring status = "disabled"; 1121724ba675SRob Herring }; 1122724ba675SRob Herring }; 1123724ba675SRob Herring }; 1124724ba675SRob Herring}; 1125