dts/qcom/msm8939.dtsi

20 	 * A number of our drivers want address/size cells = 1
41 		#address-cells = <1>;
119 		CPU5: cpu@1 {
201 		/* Boot CPU is cluster 1 core 0 */
228 			#reset-cells = <1>;
259 					#clock-cells = <1>;
266 					#power-domain-cells = <1>;
273 							opp-level = <1>;
340 			qcom,client-id = <1>;
378 		qcom,remote-pid = <1>;
383 			#qcom,smem-state-cells = <1>;
415 			#qcom,smem-state-cells = <1>;
422 		#address-cells = <1>;
425 		qcom,ipc-1 = <&apcs1_mbox 8 13>;
431 			#qcom,smem-state-cells = <1>;
434 		hexagon_smsm: hexagon@1 {
435 			reg = <1>;
453 		#address-cells = <1>;
454 		#size-cells = <1>;
467 			#address-cells = <1>;
468 			#size-cells = <1>;
532 				bits = <1 6>;
552 				bits = <1 6>;
572 				bits = <1 6>;
587 			#interconnect-cells = <1>;
619 			#thermal-sensor-cells = <1>;
633 			#interconnect-cells = <1>;
642 			#interconnect-cells = <1>;
649 				#interconnect-cells = <1>;
1167 				 <&mdss_dsi0_phy 1>,
1179 			#clock-cells = <1>;
1180 			#reset-cells = <1>;
1181 			#power-domain-cells = <1>;
1187 			#hwlock-cells = <1>;
1195 		mdss: display-subsystem@1a00000 {
1213 			#address-cells = <1>;
1214 			#size-cells = <1>;
1215 			#interrupt-cells = <1>;
1220 			mdss_mdp: display-controller@1a01000 {
1244 					#address-cells = <1>;
1254 					port@1 {
1255 						reg = <1>;
1263 			mdss_dsi0: dsi@1a98000 {
1287 							 <&mdss_dsi0_phy 1>;
1292 				#address-cells = <1>;
1296 					#address-cells = <1>;
1306 					port@1 {
1307 						reg = <1>;
1314 			mdss_dsi0_phy: phy@1a98300 {
1327 				#clock-cells = <1>;
1332 			mdss_dsi1: dsi@1aa0000 {
1356 							 <&mdss_dsi0_phy 1>;
1361 					#address-cells = <1>;
1371 					port@1 {
1372 						reg = <1>;
1379 			mdss_dsi1_phy: phy@1aa0300 {
1392 				#clock-cells = <1>;
1398 		gpu@1c00000 {
1420 			iommus = <&gpu_iommu 1>, <&gpu_iommu 2>;
1447 		apps_iommu: iommu@1ef0000 {
1454 			#address-cells = <1>;
1455 			#size-cells = <1>;
1456 			#iommu-cells = <1>;
1474 		gpu_iommu: iommu@1f08000 {
1481 			#address-cells = <1>;
1482 			#size-cells = <1>;
1483 			#iommu-cells = <1>;
1525 					      <&hexagon_smp2p_in 1 IRQ_TYPE_EDGE_RISING>,
1564 				qcom,remote-pid = <1>;
1598 			#sound-dai-cells = <1>;
1599 			#address-cells = <1>;
1610 			#sound-dai-cells = <1>;
1628 			pinctrl-1 = <&sdc1_sleep>;
1630 			mmc-ddr-1_8v;
1650 			pinctrl-1 = <&sdc2_sleep>;
1662 			#dma-cells = <1>;
1673 			dmas = <&blsp_dma 0>, <&blsp_dma 1>;
1676 			pinctrl-1 = <&blsp_uart1_sleep>;
1690 			pinctrl-1 = <&blsp_uart2_sleep>;
1705 			pinctrl-1 = <&blsp_i2c1_sleep>;
1707 			#address-cells = <1>;
1722 			pinctrl-1 = <&blsp_spi1_sleep>;
1724 			#address-cells = <1>;
1739 			pinctrl-1 = <&blsp_i2c2_sleep>;
1741 			#address-cells = <1>;
1756 			pinctrl-1 = <&blsp_spi2_sleep>;
1758 			#address-cells = <1>;
1773 			pinctrl-1 = <&blsp_i2c3_sleep>;
1775 			#address-cells = <1>;
1790 			pinctrl-1 = <&blsp_spi3_sleep>;
1792 			#address-cells = <1>;
1807 			pinctrl-1 = <&blsp_i2c4_sleep>;
1809 			#address-cells = <1>;
1824 			pinctrl-1 = <&blsp_spi4_sleep>;
1826 			#address-cells = <1>;
1841 			pinctrl-1 = <&blsp_i2c5_sleep>;
1843 			#address-cells = <1>;
1858 			pinctrl-1 = <&blsp_spi5_sleep>;
1860 			#address-cells = <1>;
1875 			pinctrl-1 = <&blsp_i2c6_sleep>;
1877 			#address-cells = <1>;
1892 			pinctrl-1 = <&blsp_spi6_sleep>;
1894 			#address-cells = <1>;
1912 			#reset-cells = <1>;
1945 					      <&wcnss_smp2p_in 1 IRQ_TYPE_EDGE_RISING>,
2029 			#mbox-cells = <1>;
2084 			#mbox-cells = <1>;
2096 			#address-cells = <1>;
2097 			#size-cells = <1>;
2111 				frame-number = <1>;
2203 			#mbox-cells = <1>;
2418 			thermal-sensors = <&tsens 1>;
2435 			     <GIC_PPI 1 (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_LOW)>;