Lines Matching +full:1 +full:a01000
52 #address-cells = <1>;
86 intc: interrupt-controller@00a01000 {
95 #address-cells = <1>;
106 osc: clock@1 {
108 reg = <1>;
132 #address-cells = <1>;
133 #size-cells = <1>;
187 #dma-cells = <1>;
194 #address-cells = <1>;
195 #size-cells = <1>;
214 #address-cells = <1>;
215 #size-cells = <1>;
221 #address-cells = <1>;
222 #size-cells = <1>;
249 #address-cells = <1>;
257 dmas = <&sdma 3 7 1>, <&sdma 4 7 2>;
263 #address-cells = <1>;
271 dmas = <&sdma 5 7 1>, <&sdma 6 7 2>;
277 #address-cells = <1>;
285 dmas = <&sdma 7 7 1>, <&sdma 8 7 2>;
291 #address-cells = <1>;
299 dmas = <&sdma 9 7 1>, <&sdma 10 7 2>;
406 dmas = <&sdma 17 23 1>, <&sdma 18 23 1>, <&sdma 19 23 1>,
407 <&sdma 20 23 1>, <&sdma 21 23 1>, <&sdma 22 23 1>;
474 stop-mode = <&gpr 0x10 1 0x10 17>;
572 fsl,num-tx-queues=<1>;
573 fsl,num-rx-queues=<1>;
607 #clock-cells = <1>;
646 anatop-min-bit-val = <1>;
663 anatop-min-bit-val = <1>;
737 #reset-cells = <1>;
830 #address-cells = <1>;
831 #size-cells = <1>;
855 fsl,usbmisc = <&usbmisc 1>;
863 #index-cells = <1>;
881 fsl,num-tx-queues=<1>;
882 fsl,num-rx-queues=<1>;
925 #address-cells = <1>;
935 #address-cells = <1>;
945 #address-cells = <1>;
1017 #address-cells = <1>;
1090 #address-cells = <1>;
1115 #address-cells = <1>;
1116 #size-cells = <1>;