32c435a1 | 22-Jan-2023 |
Alistair Francis <alistair.francis@wdc.com> |
hw/riscv: boot: Don't use CSRs if they are disabled
If the CSRs and CSR instructions are disabled because the Zicsr extension isn't enabled then we want to make sure we don't run any CSR instruction
hw/riscv: boot: Don't use CSRs if they are disabled
If the CSRs and CSR instructions are disabled because the Zicsr extension isn't enabled then we want to make sure we don't run any CSR instructions in the boot ROM.
This patches removes the CSR instructions from the reset-vec if the extension isn't enabled. We replace the instruction with a NOP instead.
Note that we don't do this for the SiFive U machine, as we are modelling the hardware in that case.
Resolves: https://gitlab.com/qemu-project/qemu/-/issues/1447 Signed-off-by: Alistair Francis <alistair.francis@wdc.com> Reviewed-by: Daniel Henrique Barboza <dbarboza@ventanamicro.com> Message-Id: <20230123035754.75553-1-alistair.francis@opensource.wdc.com> Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
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7ae71462 | 23-Jan-2023 |
Wilfred Mallawa <wilfred.mallawa@wdc.com> |
include/hw/riscv/opentitan: update opentitan IRQs
Updates the opentitan IRQs to match the latest supported commit of Opentitan from TockOS.
OPENTITAN_SUPPORTED_SHA := 565e4af39760a123c59a184aa2f581
include/hw/riscv/opentitan: update opentitan IRQs
Updates the opentitan IRQs to match the latest supported commit of Opentitan from TockOS.
OPENTITAN_SUPPORTED_SHA := 565e4af39760a123c59a184aa2f5812a961fde47
Memory layout as per [1]
[1] https://github.com/lowRISC/opentitan/blob/565e4af39760a123c59a184aa2f5812a961fde47/hw/top_earlgrey/sw/autogen/top_earlgrey_memory.h
Signed-off-by: Wilfred Mallawa <wilfred.mallawa@wdc.com> Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Message-Id: <20230123063619.222459-1-wilfred.mallawa@opensource.wdc.com> Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
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b748352c | 17-Jan-2023 |
Daniel Henrique Barboza <dbarboza@ventanamicro.com> |
hw/riscv/virt.c: move create_fw_cfg() back to virt_machine_init()
Commit 1c20d3ff6004 ("hw/riscv: virt: Add a machine done notifier") moved the initialization of fw_cfg to the virt_machine_done() ca
hw/riscv/virt.c: move create_fw_cfg() back to virt_machine_init()
Commit 1c20d3ff6004 ("hw/riscv: virt: Add a machine done notifier") moved the initialization of fw_cfg to the virt_machine_done() callback.
Problem is that the validation of fw_cfg by devices such as ramfb is done before the machine done notifier is called. Moving create_fw_cfg() to machine_done() results in QEMU failing to boot when using a ramfb device:
./qemu-system-riscv64 -machine virt -device ramfb -serial stdio qemu-system-riscv64: -device ramfb: ramfb device requires fw_cfg with DMA
The fix is simple: move create_fw_cfg() config back to virt_machine_init(). This happens to be the same way the ARM 'virt' machine deals with fw_cfg (see machvirt_init() and virt_machine_done() in hw/arm/virt.c), so we're keeping consistency with how other machines handle this device.
Resolves: https://gitlab.com/qemu-project/qemu/-/issues/1343 Signed-off-by: Daniel Henrique Barboza <dbarboza@ventanamicro.com> Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Message-Id: <20230117132751.229738-2-dbarboza@ventanamicro.com> Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
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9c3ee7e8 | 11-Jan-2023 |
Daniel Henrique Barboza <dbarboza@ventanamicro.com> |
hw/riscv: use ms->fdt in riscv_socket_fdt_write_distance_matrix()
There's no need to use a MachineState pointer and a fdt pointer now that all RISC-V machines are using the FDT from the MachineState
hw/riscv: use ms->fdt in riscv_socket_fdt_write_distance_matrix()
There's no need to use a MachineState pointer and a fdt pointer now that all RISC-V machines are using the FDT from the MachineState.
Signed-off-by: Daniel Henrique Barboza <dbarboza@ventanamicro.com> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Message-Id: <20230111170948.316276-7-dbarboza@ventanamicro.com> Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
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fb60b488 | 11-Jan-2023 |
Daniel Henrique Barboza <dbarboza@ventanamicro.com> |
hw/riscv: use MachineState::fdt in riscv_socket_fdt_write_id()
There's no need to use a MachineState pointer and a fdt pointer now that all RISC-V machines are using the FDT from the MachineState.
hw/riscv: use MachineState::fdt in riscv_socket_fdt_write_id()
There's no need to use a MachineState pointer and a fdt pointer now that all RISC-V machines are using the FDT from the MachineState.
Signed-off-by: Daniel Henrique Barboza <dbarboza@ventanamicro.com> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Message-Id: <20230111170948.316276-6-dbarboza@ventanamicro.com> Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
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914c97f9 | 11-Jan-2023 |
Daniel Henrique Barboza <dbarboza@ventanamicro.com> |
hw/riscv/virt.c: remove 'is_32_bit' param from create_fdt_socket_cpus()
create_fdt_socket_cpus() writes a different 'mmu-type' value if we're running in 32 or 64 bits. However, the flag is being cal
hw/riscv/virt.c: remove 'is_32_bit' param from create_fdt_socket_cpus()
create_fdt_socket_cpus() writes a different 'mmu-type' value if we're running in 32 or 64 bits. However, the flag is being calculated during virt_machine_init(), and is passed around in create_fdt(), then create_fdt_socket(), and then finally create_fdt_socket_cpus(). None of the intermediate functions are using the flag, which is a bit misleading.
Remove 'is_32_bit' flag from create_fdt_socket_cpus() and calculate it using the already available RISCVVirtState pointer. This will also change the signature of create_fdt_socket() and create_fdt(), making it clear that these functions don't do anything special when we're running in 32 bit mode.
Signed-off-by: Daniel Henrique Barboza <dbarboza@ventanamicro.com> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Message-Id: <20230111170948.316276-5-dbarboza@ventanamicro.com> Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
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f5be2ccb | 11-Jan-2023 |
Daniel Henrique Barboza <dbarboza@ventanamicro.com> |
hw/riscv/sifive_u.c: simplify create_fdt()
'cmdline' isn't being used. Remove it.
A MachineState pointer is being retrieved via a MACHINE() macro calling qdev_get_machine(). Use MACHINE(s) instead
hw/riscv/sifive_u.c: simplify create_fdt()
'cmdline' isn't being used. Remove it.
A MachineState pointer is being retrieved via a MACHINE() macro calling qdev_get_machine(). Use MACHINE(s) instead to avoid calling qdev().
'mem_size' is being set as machine->ram_size by the caller. Retrieve it via ms->ram_size.
Cc: Palmer Dabbelt <palmer@dabbelt.com> Signed-off-by: Daniel Henrique Barboza <dbarboza@ventanamicro.com> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Message-Id: <20230111170948.316276-4-dbarboza@ventanamicro.com> Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
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cdb78568 | 11-Jan-2023 |
Daniel Henrique Barboza <dbarboza@ventanamicro.com> |
hw/riscv/virt.c: simplify create_fdt()
'mem_size' and 'cmdline' aren't being used. Remove them.
Signed-off-by: Daniel Henrique Barboza <dbarboza@ventanamicro.com> Reviewed-by: Philippe Mathieu-Daud
hw/riscv/virt.c: simplify create_fdt()
'mem_size' and 'cmdline' aren't being used. Remove them.
Signed-off-by: Daniel Henrique Barboza <dbarboza@ventanamicro.com> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Message-Id: <20230111170948.316276-3-dbarboza@ventanamicro.com> Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
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5dfe2377 | 11-Jan-2023 |
Daniel Henrique Barboza <dbarboza@ventanamicro.com> |
hw/riscv/spike.c: simplify create_fdt()
'mem_size' and 'cmdline' are unused.
Signed-off-by: Daniel Henrique Barboza <dbarboza@ventanamicro.com> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.or
hw/riscv/spike.c: simplify create_fdt()
'mem_size' and 'cmdline' are unused.
Signed-off-by: Daniel Henrique Barboza <dbarboza@ventanamicro.com> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Message-Id: <20230111170948.316276-2-dbarboza@ventanamicro.com> Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
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60c1f05e | 02-Jan-2023 |
Daniel Henrique Barboza <dbarboza@ventanamicro.com> |
hw/riscv/boot.c: use MachineState in riscv_load_kernel()
All callers are using kernel_filename as machine->kernel_filename.
This will also simplify the changes in riscv_load_kernel() that we're goi
hw/riscv/boot.c: use MachineState in riscv_load_kernel()
All callers are using kernel_filename as machine->kernel_filename.
This will also simplify the changes in riscv_load_kernel() that we're going to do next.
Cc: Palmer Dabbelt <palmer@dabbelt.com> Signed-off-by: Daniel Henrique Barboza <dbarboza@ventanamicro.com> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Bin Meng <bmeng@tinylab.org> Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Message-Id: <20230102115241.25733-10-dbarboza@ventanamicro.com> Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
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1f991461 | 02-Jan-2023 |
Daniel Henrique Barboza <dbarboza@ventanamicro.com> |
hw/riscv/boot.c: use MachineState in riscv_load_initrd()
'filename', 'mem_size' and 'fdt' from riscv_load_initrd() can all be retrieved by the MachineState object for all callers.
Cc: Palmer Dabbel
hw/riscv/boot.c: use MachineState in riscv_load_initrd()
'filename', 'mem_size' and 'fdt' from riscv_load_initrd() can all be retrieved by the MachineState object for all callers.
Cc: Palmer Dabbelt <palmer@dabbelt.com> Signed-off-by: Daniel Henrique Barboza <dbarboza@ventanamicro.com> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Bin Meng <bmeng@tinylab.org> Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Message-Id: <20230102115241.25733-9-dbarboza@ventanamicro.com> Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
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b1f19f23 | 02-Jan-2023 |
Daniel Henrique Barboza <dbarboza@ventanamicro.com> |
hw/riscv: write bootargs 'chosen' FDT after riscv_load_kernel()
The sifive_u, spike and virt machines are writing the 'bootargs' FDT node during their respective create_fdt().
Given that bootargs i
hw/riscv: write bootargs 'chosen' FDT after riscv_load_kernel()
The sifive_u, spike and virt machines are writing the 'bootargs' FDT node during their respective create_fdt().
Given that bootargs is written only when '-append' is used, and this option is only allowed with the '-kernel' option, which in turn is already being check before executing riscv_load_kernel(), write 'bootargs' in the same code path as riscv_load_kernel().
Cc: Palmer Dabbelt <palmer@dabbelt.com> Signed-off-by: Daniel Henrique Barboza <dbarboza@ventanamicro.com> Reviewed-by: Bin Meng <bmeng@tinylab.org> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Message-Id: <20230102115241.25733-8-dbarboza@ventanamicro.com> Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
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b9a65476 | 02-Jan-2023 |
Daniel Henrique Barboza <dbarboza@ventanamicro.com> |
hw/riscv: write initrd 'chosen' FDT inside riscv_load_initrd()
riscv_load_initrd() returns the initrd end addr while also writing a 'start' var to mark the addr start. These informations are being u
hw/riscv: write initrd 'chosen' FDT inside riscv_load_initrd()
riscv_load_initrd() returns the initrd end addr while also writing a 'start' var to mark the addr start. These informations are being used just to write the initrd FDT node. Every existing caller of riscv_load_initrd() is writing the FDT in the same manner.
We can simplify things by writing the FDT inside riscv_load_initrd(), sparing callers from having to manage start/end addrs to write the FDT themselves.
An 'if (fdt)' check is already inserted at the end of the function because we'll end up using it later on with other boards that doesn´t have a FDT.
Cc: Palmer Dabbelt <palmer@dabbelt.com> Signed-off-by: Daniel Henrique Barboza <dbarboza@ventanamicro.com> Reviewed-by: Bin Meng <bmeng@tinylab.org> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Message-Id: <20230102115241.25733-7-dbarboza@ventanamicro.com> Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
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c44df400 | 02-Jan-2023 |
Daniel Henrique Barboza <dbarboza@ventanamicro.com> |
hw/riscv/spike.c: load initrd right after riscv_load_kernel()
This will make the code more in line with what the other boards are doing. We'll also avoid an extra check to machine->kernel_filename s
hw/riscv/spike.c: load initrd right after riscv_load_kernel()
This will make the code more in line with what the other boards are doing. We'll also avoid an extra check to machine->kernel_filename since we already checked that before executing riscv_load_kernel().
Signed-off-by: Daniel Henrique Barboza <dbarboza@ventanamicro.com> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Reviewed-by: Bin Meng <bmeng@tinylab.org> Message-Id: <20230102115241.25733-6-dbarboza@ventanamicro.com> Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
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1db0c57a | 02-Jan-2023 |
Daniel Henrique Barboza <dbarboza@ventanamicro.com> |
hw/riscv/boot.c: exit early if filename is NULL in load functions
riscv_load_firmware(), riscv_load_initrd() and riscv_load_kernel() works under the assumption that a 'filename' parameter is always
hw/riscv/boot.c: exit early if filename is NULL in load functions
riscv_load_firmware(), riscv_load_initrd() and riscv_load_kernel() works under the assumption that a 'filename' parameter is always not NULL.
This is currently the case since all callers of these functions are checking for NULL before calling them. Add an g_assert() to make sure that a NULL value in these cases are to be considered a bug.
Suggested-by: Alex Bennée <alex.bennee@linaro.org> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Signed-off-by: Daniel Henrique Barboza <dbarboza@ventanamicro.com> Reviewed-by: Bin Meng <bmeng@tinylab.org> Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Message-Id: <20230102115241.25733-5-dbarboza@ventanamicro.com> Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
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60c7dfa2 | 02-Jan-2023 |
Daniel Henrique Barboza <dbarboza@ventanamicro.com> |
hw/riscv/sifive_u: use 'fdt' from MachineState
The MachineState object provides a 'fdt' pointer that is already being used by other RISC-V machines, and it's also used by the 'dumpdtb' QMP command.
hw/riscv/sifive_u: use 'fdt' from MachineState
The MachineState object provides a 'fdt' pointer that is already being used by other RISC-V machines, and it's also used by the 'dumpdtb' QMP command.
Remove the 'fdt' pointer from SiFiveUState and use MachineState::fdt instead.
Cc: Palmer Dabbelt <palmer@dabbelt.com> Signed-off-by: Daniel Henrique Barboza <dbarboza@ventanamicro.com> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Reviewed-by: Bin Meng <bmeng@tinylab.org> Message-Id: <20230102115241.25733-4-dbarboza@ventanamicro.com> Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
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3139929d | 02-Jan-2023 |
Daniel Henrique Barboza <dbarboza@ventanamicro.com> |
hw/riscv/spike: use 'fdt' from MachineState
The MachineState object provides a 'fdt' pointer that is already being used by other RISC-V machines, and it's also used by the 'dumpdtb' QMP command.
Re
hw/riscv/spike: use 'fdt' from MachineState
The MachineState object provides a 'fdt' pointer that is already being used by other RISC-V machines, and it's also used by the 'dumpdtb' QMP command.
Remove the 'fdt' pointer from SpikeState and use MachineState::fdt instead.
Signed-off-by: Daniel Henrique Barboza <dbarboza@ventanamicro.com> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Reviewed-by: Bin Meng <bmeng@tinylab.org> Message-Id: <20230102115241.25733-3-dbarboza@ventanamicro.com> Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
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71d68c48 | 29-Dec-2022 |
Bin Meng <bmeng@tinylab.org> |
hw/riscv: spike: Decouple create_fdt() dependency to ELF loading
At present create_fdt() calls htif_uses_elf_symbols() to determine whether to insert a <reg> property for the HTIF. This unfortunatel
hw/riscv: spike: Decouple create_fdt() dependency to ELF loading
At present create_fdt() calls htif_uses_elf_symbols() to determine whether to insert a <reg> property for the HTIF. This unfortunately creates a hidden dependency to riscv_load_{firmware,kernel} that create_fdt() must be called after the ELF {firmware,kernel} image has been loaded.
Decouple such dependency be adding a new parameter to create_fdt(), whether custom HTIF base address is used. The flag will be set if non ELF {firmware,kernel} image is given by user.
Signed-off-by: Bin Meng <bmeng@tinylab.org> Reviewed-by: Daniel Henrique Barboza <dbarboza@ventanamicro.com> Message-Id: <20221229091828.1945072-13-bmeng@tinylab.org> Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
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8f619626 | 29-Dec-2022 |
Bin Meng <bmeng@tinylab.org> |
hw/riscv/boot.c: Introduce riscv_find_firmware()
Rename previous riscv_find_firmware() to riscv_find_bios(), and introduce a new riscv_find_firmware() to implement the first half part of the work do
hw/riscv/boot.c: Introduce riscv_find_firmware()
Rename previous riscv_find_firmware() to riscv_find_bios(), and introduce a new riscv_find_firmware() to implement the first half part of the work done in riscv_find_and_load_firmware().
This new API is helpful for machine that wants to know the final chosen firmware file name but does not want to load it.
Signed-off-by: Bin Meng <bmeng@tinylab.org> Reviewed-by: Daniel Henrique Barboza <dbarboza@ventanamicro.com> Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Message-Id: <20221229091828.1945072-12-bmeng@tinylab.org> Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
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9d3f7108 | 29-Dec-2022 |
Daniel Henrique Barboza <dbarboza@ventanamicro.com> |
hw/riscv/boot.c: introduce riscv_default_firmware_name()
Some boards are duplicating the 'riscv_find_and_load_firmware' call because the 32 and 64 bits images have different names. Create a function
hw/riscv/boot.c: introduce riscv_default_firmware_name()
Some boards are duplicating the 'riscv_find_and_load_firmware' call because the 32 and 64 bits images have different names. Create a function to handle this detail instead of hardcoding it in the boards.
Ideally we would bake this logic inside riscv_find_and_load_firmware(), or even create a riscv_load_default_firmware(), but at this moment we cannot infer whether the machine is running 32 or 64 bits without accessing RISCVHartArrayState, which in turn can't be accessed via the common code from boot.c. In the end we would exchange 'firmware_name' for a flag with riscv_is_32bit(), which isn't much better than what we already have today.
Cc: Palmer Dabbelt <palmer@dabbelt.com> Signed-off-by: Daniel Henrique Barboza <dbarboza@ventanamicro.com> Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Reviewed-by: Bin Meng <bmeng@tinylab.org> Signed-off-by: Bin Meng <bmeng@tinylab.org> Message-Id: <20221221182300.307900-6-dbarboza@ventanamicro.com> Message-Id: <20221229091828.1945072-11-bmeng@tinylab.org> Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
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808faef7 | 29-Dec-2022 |
Daniel Henrique Barboza <dbarboza@ventanamicro.com> |
hw/riscv/boot.c: make riscv_find_firmware() static
The only caller is riscv_find_and_load_firmware(), which is in the same file.
Signed-off-by: Daniel Henrique Barboza <dbarboza@ventanamicro.com> R
hw/riscv/boot.c: make riscv_find_firmware() static
The only caller is riscv_find_and_load_firmware(), which is in the same file.
Signed-off-by: Daniel Henrique Barboza <dbarboza@ventanamicro.com> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Reviewed-by: Bin Meng <bmeng@tinylab.org> Signed-off-by: Bin Meng <bmeng@tinylab.org> Message-Id: <20221221182300.307900-5-dbarboza@ventanamicro.com> Message-Id: <20221229091828.1945072-10-bmeng@tinylab.org> Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
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a8a7f680 | 29-Dec-2022 |
Bin Meng <bmeng@tinylab.org> |
hw/riscv: spike: Remove the out-of-date comments
Spike machine now supports OpenSBI plain binary bios image, so the comments are no longer valid.
Signed-off-by: Bin Meng <bmeng@tinylab.org> Reviewe
hw/riscv: spike: Remove the out-of-date comments
Spike machine now supports OpenSBI plain binary bios image, so the comments are no longer valid.
Signed-off-by: Bin Meng <bmeng@tinylab.org> Reviewed-by: Daniel Henrique Barboza <dbarboza@ventanamicro.com> Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Message-Id: <20221229091828.1945072-9-bmeng@tinylab.org> Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
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1237c2d6 | 29-Dec-2022 |
Bin Meng <bmeng@tinylab.org> |
hw/char: riscv_htif: Move registers from CPUArchState to HTIFState
At present for some unknown reason the HTIF registers (fromhost & tohost) are defined in the RISC-V CPUArchState. It should really
hw/char: riscv_htif: Move registers from CPUArchState to HTIFState
At present for some unknown reason the HTIF registers (fromhost & tohost) are defined in the RISC-V CPUArchState. It should really be put in the HTIFState struct as it is only meaningful to HTIF.
Signed-off-by: Bin Meng <bmeng@tinylab.org> Reviewed-by: Daniel Henrique Barboza <dbarboza@ventanamicro.com> Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Message-Id: <20221229091828.1945072-6-bmeng@tinylab.org> Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
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dc688246 | 29-Dec-2022 |
Bin Meng <bmeng@tinylab.org> |
hw/char: riscv_htif: Drop useless assignment of memory region
struct HTIFState has 3 members for address space and memory region, and are initialized during htif_mm_init(). But they are actually use
hw/char: riscv_htif: Drop useless assignment of memory region
struct HTIFState has 3 members for address space and memory region, and are initialized during htif_mm_init(). But they are actually useless. Drop them.
Signed-off-by: Bin Meng <bmeng@tinylab.org> Reviewed-by: Daniel Henrique Barboza <dbarboza@ventanamicro.com> Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Message-Id: <20221229091828.1945072-4-bmeng@tinylab.org> Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
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a984e2b3 | 10-Dec-2022 |
Bin Meng <bmeng@tinylab.org> |
hw/riscv: opentitan: Drop "hartid-base" and "priority-base" initialization
"hartid-base" and "priority-base" are zero by default. There is no need to initialize them to zero again.
Signed-off-by: B
hw/riscv: opentitan: Drop "hartid-base" and "priority-base" initialization
"hartid-base" and "priority-base" are zero by default. There is no need to initialize them to zero again.
Signed-off-by: Bin Meng <bmeng@tinylab.org> Reviewed-by: Wilfred Mallawa <wilfred.mallawa@wdc.com> Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Message-Id: <20221211030829.802437-15-bmeng@tinylab.org> Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
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