1 /* 2 * Marvell MV88W8618 / Freecom MusicPal emulation. 3 * 4 * Copyright (c) 2008 Jan Kiszka 5 * 6 * This code is licensed under the GNU GPL v2. 7 * 8 * Contributions after 2012-01-13 are licensed under the terms of the 9 * GNU GPL, version 2 or (at your option) any later version. 10 */ 11 12 #include "qemu/osdep.h" 13 #include "qemu/units.h" 14 #include "qapi/error.h" 15 #include "cpu.h" 16 #include "hw/sysbus.h" 17 #include "migration/vmstate.h" 18 #include "hw/arm/boot.h" 19 #include "net/net.h" 20 #include "sysemu/sysemu.h" 21 #include "hw/boards.h" 22 #include "hw/char/serial.h" 23 #include "qemu/timer.h" 24 #include "hw/ptimer.h" 25 #include "hw/qdev-properties.h" 26 #include "hw/block/flash.h" 27 #include "ui/console.h" 28 #include "hw/i2c/i2c.h" 29 #include "hw/irq.h" 30 #include "hw/or-irq.h" 31 #include "hw/audio/wm8750.h" 32 #include "sysemu/block-backend.h" 33 #include "sysemu/runstate.h" 34 #include "sysemu/dma.h" 35 #include "ui/pixel_ops.h" 36 #include "qemu/cutils.h" 37 #include "qom/object.h" 38 #include "hw/net/mv88w8618_eth.h" 39 40 #define MP_MISC_BASE 0x80002000 41 #define MP_MISC_SIZE 0x00001000 42 43 #define MP_ETH_BASE 0x80008000 44 45 #define MP_WLAN_BASE 0x8000C000 46 #define MP_WLAN_SIZE 0x00000800 47 48 #define MP_UART1_BASE 0x8000C840 49 #define MP_UART2_BASE 0x8000C940 50 51 #define MP_GPIO_BASE 0x8000D000 52 #define MP_GPIO_SIZE 0x00001000 53 54 #define MP_FLASHCFG_BASE 0x90006000 55 #define MP_FLASHCFG_SIZE 0x00001000 56 57 #define MP_AUDIO_BASE 0x90007000 58 59 #define MP_PIC_BASE 0x90008000 60 #define MP_PIC_SIZE 0x00001000 61 62 #define MP_PIT_BASE 0x90009000 63 #define MP_PIT_SIZE 0x00001000 64 65 #define MP_LCD_BASE 0x9000c000 66 #define MP_LCD_SIZE 0x00001000 67 68 #define MP_SRAM_BASE 0xC0000000 69 #define MP_SRAM_SIZE 0x00020000 70 71 #define MP_RAM_DEFAULT_SIZE 32*1024*1024 72 #define MP_FLASH_SIZE_MAX 32*1024*1024 73 74 #define MP_TIMER1_IRQ 4 75 #define MP_TIMER2_IRQ 5 76 #define MP_TIMER3_IRQ 6 77 #define MP_TIMER4_IRQ 7 78 #define MP_EHCI_IRQ 8 79 #define MP_ETH_IRQ 9 80 #define MP_UART_SHARED_IRQ 11 81 #define MP_GPIO_IRQ 12 82 #define MP_RTC_IRQ 28 83 #define MP_AUDIO_IRQ 30 84 85 /* Wolfson 8750 I2C address */ 86 #define MP_WM_ADDR 0x1A 87 88 /* LCD register offsets */ 89 #define MP_LCD_IRQCTRL 0x180 90 #define MP_LCD_IRQSTAT 0x184 91 #define MP_LCD_SPICTRL 0x1ac 92 #define MP_LCD_INST 0x1bc 93 #define MP_LCD_DATA 0x1c0 94 95 /* Mode magics */ 96 #define MP_LCD_SPI_DATA 0x00100011 97 #define MP_LCD_SPI_CMD 0x00104011 98 #define MP_LCD_SPI_INVALID 0x00000000 99 100 /* Commmands */ 101 #define MP_LCD_INST_SETPAGE0 0xB0 102 /* ... */ 103 #define MP_LCD_INST_SETPAGE7 0xB7 104 105 #define MP_LCD_TEXTCOLOR 0xe0e0ff /* RRGGBB */ 106 107 #define TYPE_MUSICPAL_LCD "musicpal_lcd" 108 OBJECT_DECLARE_SIMPLE_TYPE(musicpal_lcd_state, MUSICPAL_LCD) 109 110 struct musicpal_lcd_state { 111 /*< private >*/ 112 SysBusDevice parent_obj; 113 /*< public >*/ 114 115 MemoryRegion iomem; 116 uint32_t brightness; 117 uint32_t mode; 118 uint32_t irqctrl; 119 uint32_t page; 120 uint32_t page_off; 121 QemuConsole *con; 122 uint8_t video_ram[128*64/8]; 123 }; 124 125 static uint8_t scale_lcd_color(musicpal_lcd_state *s, uint8_t col) 126 { 127 switch (s->brightness) { 128 case 7: 129 return col; 130 case 0: 131 return 0; 132 default: 133 return (col * s->brightness) / 7; 134 } 135 } 136 137 static inline void set_lcd_pixel32(musicpal_lcd_state *s, 138 int x, int y, uint32_t col) 139 { 140 int dx, dy; 141 DisplaySurface *surface = qemu_console_surface(s->con); 142 uint32_t *pixel = 143 &((uint32_t *) surface_data(surface))[(y * 128 * 3 + x) * 3]; 144 145 for (dy = 0; dy < 3; dy++, pixel += 127 * 3) { 146 for (dx = 0; dx < 3; dx++, pixel++) { 147 *pixel = col; 148 } 149 } 150 } 151 152 static void lcd_refresh(void *opaque) 153 { 154 musicpal_lcd_state *s = opaque; 155 int x, y, col; 156 157 col = rgb_to_pixel32(scale_lcd_color(s, (MP_LCD_TEXTCOLOR >> 16) & 0xff), 158 scale_lcd_color(s, (MP_LCD_TEXTCOLOR >> 8) & 0xff), 159 scale_lcd_color(s, MP_LCD_TEXTCOLOR & 0xff)); 160 for (x = 0; x < 128; x++) { 161 for (y = 0; y < 64; y++) { 162 if (s->video_ram[x + (y / 8) * 128] & (1 << (y % 8))) { 163 set_lcd_pixel32(s, x, y, col); 164 } else { 165 set_lcd_pixel32(s, x, y, 0); 166 } 167 } 168 } 169 170 dpy_gfx_update(s->con, 0, 0, 128*3, 64*3); 171 } 172 173 static void lcd_invalidate(void *opaque) 174 { 175 } 176 177 static void musicpal_lcd_gpio_brightness_in(void *opaque, int irq, int level) 178 { 179 musicpal_lcd_state *s = opaque; 180 s->brightness &= ~(1 << irq); 181 s->brightness |= level << irq; 182 } 183 184 static uint64_t musicpal_lcd_read(void *opaque, hwaddr offset, 185 unsigned size) 186 { 187 musicpal_lcd_state *s = opaque; 188 189 switch (offset) { 190 case MP_LCD_IRQCTRL: 191 return s->irqctrl; 192 193 default: 194 return 0; 195 } 196 } 197 198 static void musicpal_lcd_write(void *opaque, hwaddr offset, 199 uint64_t value, unsigned size) 200 { 201 musicpal_lcd_state *s = opaque; 202 203 switch (offset) { 204 case MP_LCD_IRQCTRL: 205 s->irqctrl = value; 206 break; 207 208 case MP_LCD_SPICTRL: 209 if (value == MP_LCD_SPI_DATA || value == MP_LCD_SPI_CMD) { 210 s->mode = value; 211 } else { 212 s->mode = MP_LCD_SPI_INVALID; 213 } 214 break; 215 216 case MP_LCD_INST: 217 if (value >= MP_LCD_INST_SETPAGE0 && value <= MP_LCD_INST_SETPAGE7) { 218 s->page = value - MP_LCD_INST_SETPAGE0; 219 s->page_off = 0; 220 } 221 break; 222 223 case MP_LCD_DATA: 224 if (s->mode == MP_LCD_SPI_CMD) { 225 if (value >= MP_LCD_INST_SETPAGE0 && 226 value <= MP_LCD_INST_SETPAGE7) { 227 s->page = value - MP_LCD_INST_SETPAGE0; 228 s->page_off = 0; 229 } 230 } else if (s->mode == MP_LCD_SPI_DATA) { 231 s->video_ram[s->page*128 + s->page_off] = value; 232 s->page_off = (s->page_off + 1) & 127; 233 } 234 break; 235 } 236 } 237 238 static const MemoryRegionOps musicpal_lcd_ops = { 239 .read = musicpal_lcd_read, 240 .write = musicpal_lcd_write, 241 .endianness = DEVICE_NATIVE_ENDIAN, 242 }; 243 244 static const GraphicHwOps musicpal_gfx_ops = { 245 .invalidate = lcd_invalidate, 246 .gfx_update = lcd_refresh, 247 }; 248 249 static void musicpal_lcd_realize(DeviceState *dev, Error **errp) 250 { 251 musicpal_lcd_state *s = MUSICPAL_LCD(dev); 252 s->con = graphic_console_init(dev, 0, &musicpal_gfx_ops, s); 253 qemu_console_resize(s->con, 128 * 3, 64 * 3); 254 } 255 256 static void musicpal_lcd_init(Object *obj) 257 { 258 SysBusDevice *sbd = SYS_BUS_DEVICE(obj); 259 DeviceState *dev = DEVICE(sbd); 260 musicpal_lcd_state *s = MUSICPAL_LCD(dev); 261 262 s->brightness = 7; 263 264 memory_region_init_io(&s->iomem, obj, &musicpal_lcd_ops, s, 265 "musicpal-lcd", MP_LCD_SIZE); 266 sysbus_init_mmio(sbd, &s->iomem); 267 268 qdev_init_gpio_in(dev, musicpal_lcd_gpio_brightness_in, 3); 269 } 270 271 static const VMStateDescription musicpal_lcd_vmsd = { 272 .name = "musicpal_lcd", 273 .version_id = 1, 274 .minimum_version_id = 1, 275 .fields = (VMStateField[]) { 276 VMSTATE_UINT32(brightness, musicpal_lcd_state), 277 VMSTATE_UINT32(mode, musicpal_lcd_state), 278 VMSTATE_UINT32(irqctrl, musicpal_lcd_state), 279 VMSTATE_UINT32(page, musicpal_lcd_state), 280 VMSTATE_UINT32(page_off, musicpal_lcd_state), 281 VMSTATE_BUFFER(video_ram, musicpal_lcd_state), 282 VMSTATE_END_OF_LIST() 283 } 284 }; 285 286 static void musicpal_lcd_class_init(ObjectClass *klass, void *data) 287 { 288 DeviceClass *dc = DEVICE_CLASS(klass); 289 290 dc->vmsd = &musicpal_lcd_vmsd; 291 dc->realize = musicpal_lcd_realize; 292 } 293 294 static const TypeInfo musicpal_lcd_info = { 295 .name = TYPE_MUSICPAL_LCD, 296 .parent = TYPE_SYS_BUS_DEVICE, 297 .instance_size = sizeof(musicpal_lcd_state), 298 .instance_init = musicpal_lcd_init, 299 .class_init = musicpal_lcd_class_init, 300 }; 301 302 /* PIC register offsets */ 303 #define MP_PIC_STATUS 0x00 304 #define MP_PIC_ENABLE_SET 0x08 305 #define MP_PIC_ENABLE_CLR 0x0C 306 307 #define TYPE_MV88W8618_PIC "mv88w8618_pic" 308 OBJECT_DECLARE_SIMPLE_TYPE(mv88w8618_pic_state, MV88W8618_PIC) 309 310 struct mv88w8618_pic_state { 311 /*< private >*/ 312 SysBusDevice parent_obj; 313 /*< public >*/ 314 315 MemoryRegion iomem; 316 uint32_t level; 317 uint32_t enabled; 318 qemu_irq parent_irq; 319 }; 320 321 static void mv88w8618_pic_update(mv88w8618_pic_state *s) 322 { 323 qemu_set_irq(s->parent_irq, (s->level & s->enabled)); 324 } 325 326 static void mv88w8618_pic_set_irq(void *opaque, int irq, int level) 327 { 328 mv88w8618_pic_state *s = opaque; 329 330 if (level) { 331 s->level |= 1 << irq; 332 } else { 333 s->level &= ~(1 << irq); 334 } 335 mv88w8618_pic_update(s); 336 } 337 338 static uint64_t mv88w8618_pic_read(void *opaque, hwaddr offset, 339 unsigned size) 340 { 341 mv88w8618_pic_state *s = opaque; 342 343 switch (offset) { 344 case MP_PIC_STATUS: 345 return s->level & s->enabled; 346 347 default: 348 return 0; 349 } 350 } 351 352 static void mv88w8618_pic_write(void *opaque, hwaddr offset, 353 uint64_t value, unsigned size) 354 { 355 mv88w8618_pic_state *s = opaque; 356 357 switch (offset) { 358 case MP_PIC_ENABLE_SET: 359 s->enabled |= value; 360 break; 361 362 case MP_PIC_ENABLE_CLR: 363 s->enabled &= ~value; 364 s->level &= ~value; 365 break; 366 } 367 mv88w8618_pic_update(s); 368 } 369 370 static void mv88w8618_pic_reset(DeviceState *d) 371 { 372 mv88w8618_pic_state *s = MV88W8618_PIC(d); 373 374 s->level = 0; 375 s->enabled = 0; 376 } 377 378 static const MemoryRegionOps mv88w8618_pic_ops = { 379 .read = mv88w8618_pic_read, 380 .write = mv88w8618_pic_write, 381 .endianness = DEVICE_NATIVE_ENDIAN, 382 }; 383 384 static void mv88w8618_pic_init(Object *obj) 385 { 386 SysBusDevice *dev = SYS_BUS_DEVICE(obj); 387 mv88w8618_pic_state *s = MV88W8618_PIC(dev); 388 389 qdev_init_gpio_in(DEVICE(dev), mv88w8618_pic_set_irq, 32); 390 sysbus_init_irq(dev, &s->parent_irq); 391 memory_region_init_io(&s->iomem, obj, &mv88w8618_pic_ops, s, 392 "musicpal-pic", MP_PIC_SIZE); 393 sysbus_init_mmio(dev, &s->iomem); 394 } 395 396 static const VMStateDescription mv88w8618_pic_vmsd = { 397 .name = "mv88w8618_pic", 398 .version_id = 1, 399 .minimum_version_id = 1, 400 .fields = (VMStateField[]) { 401 VMSTATE_UINT32(level, mv88w8618_pic_state), 402 VMSTATE_UINT32(enabled, mv88w8618_pic_state), 403 VMSTATE_END_OF_LIST() 404 } 405 }; 406 407 static void mv88w8618_pic_class_init(ObjectClass *klass, void *data) 408 { 409 DeviceClass *dc = DEVICE_CLASS(klass); 410 411 dc->reset = mv88w8618_pic_reset; 412 dc->vmsd = &mv88w8618_pic_vmsd; 413 } 414 415 static const TypeInfo mv88w8618_pic_info = { 416 .name = TYPE_MV88W8618_PIC, 417 .parent = TYPE_SYS_BUS_DEVICE, 418 .instance_size = sizeof(mv88w8618_pic_state), 419 .instance_init = mv88w8618_pic_init, 420 .class_init = mv88w8618_pic_class_init, 421 }; 422 423 /* PIT register offsets */ 424 #define MP_PIT_TIMER1_LENGTH 0x00 425 /* ... */ 426 #define MP_PIT_TIMER4_LENGTH 0x0C 427 #define MP_PIT_CONTROL 0x10 428 #define MP_PIT_TIMER1_VALUE 0x14 429 /* ... */ 430 #define MP_PIT_TIMER4_VALUE 0x20 431 #define MP_BOARD_RESET 0x34 432 433 /* Magic board reset value (probably some watchdog behind it) */ 434 #define MP_BOARD_RESET_MAGIC 0x10000 435 436 typedef struct mv88w8618_timer_state { 437 ptimer_state *ptimer; 438 uint32_t limit; 439 int freq; 440 qemu_irq irq; 441 } mv88w8618_timer_state; 442 443 #define TYPE_MV88W8618_PIT "mv88w8618_pit" 444 OBJECT_DECLARE_SIMPLE_TYPE(mv88w8618_pit_state, MV88W8618_PIT) 445 446 struct mv88w8618_pit_state { 447 /*< private >*/ 448 SysBusDevice parent_obj; 449 /*< public >*/ 450 451 MemoryRegion iomem; 452 mv88w8618_timer_state timer[4]; 453 }; 454 455 static void mv88w8618_timer_tick(void *opaque) 456 { 457 mv88w8618_timer_state *s = opaque; 458 459 qemu_irq_raise(s->irq); 460 } 461 462 static void mv88w8618_timer_init(SysBusDevice *dev, mv88w8618_timer_state *s, 463 uint32_t freq) 464 { 465 sysbus_init_irq(dev, &s->irq); 466 s->freq = freq; 467 468 s->ptimer = ptimer_init(mv88w8618_timer_tick, s, PTIMER_POLICY_LEGACY); 469 } 470 471 static uint64_t mv88w8618_pit_read(void *opaque, hwaddr offset, 472 unsigned size) 473 { 474 mv88w8618_pit_state *s = opaque; 475 mv88w8618_timer_state *t; 476 477 switch (offset) { 478 case MP_PIT_TIMER1_VALUE ... MP_PIT_TIMER4_VALUE: 479 t = &s->timer[(offset-MP_PIT_TIMER1_VALUE) >> 2]; 480 return ptimer_get_count(t->ptimer); 481 482 default: 483 return 0; 484 } 485 } 486 487 static void mv88w8618_pit_write(void *opaque, hwaddr offset, 488 uint64_t value, unsigned size) 489 { 490 mv88w8618_pit_state *s = opaque; 491 mv88w8618_timer_state *t; 492 int i; 493 494 switch (offset) { 495 case MP_PIT_TIMER1_LENGTH ... MP_PIT_TIMER4_LENGTH: 496 t = &s->timer[offset >> 2]; 497 t->limit = value; 498 ptimer_transaction_begin(t->ptimer); 499 if (t->limit > 0) { 500 ptimer_set_limit(t->ptimer, t->limit, 1); 501 } else { 502 ptimer_stop(t->ptimer); 503 } 504 ptimer_transaction_commit(t->ptimer); 505 break; 506 507 case MP_PIT_CONTROL: 508 for (i = 0; i < 4; i++) { 509 t = &s->timer[i]; 510 ptimer_transaction_begin(t->ptimer); 511 if (value & 0xf && t->limit > 0) { 512 ptimer_set_limit(t->ptimer, t->limit, 0); 513 ptimer_set_freq(t->ptimer, t->freq); 514 ptimer_run(t->ptimer, 0); 515 } else { 516 ptimer_stop(t->ptimer); 517 } 518 ptimer_transaction_commit(t->ptimer); 519 value >>= 4; 520 } 521 break; 522 523 case MP_BOARD_RESET: 524 if (value == MP_BOARD_RESET_MAGIC) { 525 qemu_system_reset_request(SHUTDOWN_CAUSE_GUEST_RESET); 526 } 527 break; 528 } 529 } 530 531 static void mv88w8618_pit_reset(DeviceState *d) 532 { 533 mv88w8618_pit_state *s = MV88W8618_PIT(d); 534 int i; 535 536 for (i = 0; i < 4; i++) { 537 mv88w8618_timer_state *t = &s->timer[i]; 538 ptimer_transaction_begin(t->ptimer); 539 ptimer_stop(t->ptimer); 540 ptimer_transaction_commit(t->ptimer); 541 t->limit = 0; 542 } 543 } 544 545 static const MemoryRegionOps mv88w8618_pit_ops = { 546 .read = mv88w8618_pit_read, 547 .write = mv88w8618_pit_write, 548 .endianness = DEVICE_NATIVE_ENDIAN, 549 }; 550 551 static void mv88w8618_pit_init(Object *obj) 552 { 553 SysBusDevice *dev = SYS_BUS_DEVICE(obj); 554 mv88w8618_pit_state *s = MV88W8618_PIT(dev); 555 int i; 556 557 /* Letting them all run at 1 MHz is likely just a pragmatic 558 * simplification. */ 559 for (i = 0; i < 4; i++) { 560 mv88w8618_timer_init(dev, &s->timer[i], 1000000); 561 } 562 563 memory_region_init_io(&s->iomem, obj, &mv88w8618_pit_ops, s, 564 "musicpal-pit", MP_PIT_SIZE); 565 sysbus_init_mmio(dev, &s->iomem); 566 } 567 568 static void mv88w8618_pit_finalize(Object *obj) 569 { 570 SysBusDevice *dev = SYS_BUS_DEVICE(obj); 571 mv88w8618_pit_state *s = MV88W8618_PIT(dev); 572 int i; 573 574 for (i = 0; i < 4; i++) { 575 ptimer_free(s->timer[i].ptimer); 576 } 577 } 578 579 static const VMStateDescription mv88w8618_timer_vmsd = { 580 .name = "timer", 581 .version_id = 1, 582 .minimum_version_id = 1, 583 .fields = (VMStateField[]) { 584 VMSTATE_PTIMER(ptimer, mv88w8618_timer_state), 585 VMSTATE_UINT32(limit, mv88w8618_timer_state), 586 VMSTATE_END_OF_LIST() 587 } 588 }; 589 590 static const VMStateDescription mv88w8618_pit_vmsd = { 591 .name = "mv88w8618_pit", 592 .version_id = 1, 593 .minimum_version_id = 1, 594 .fields = (VMStateField[]) { 595 VMSTATE_STRUCT_ARRAY(timer, mv88w8618_pit_state, 4, 1, 596 mv88w8618_timer_vmsd, mv88w8618_timer_state), 597 VMSTATE_END_OF_LIST() 598 } 599 }; 600 601 static void mv88w8618_pit_class_init(ObjectClass *klass, void *data) 602 { 603 DeviceClass *dc = DEVICE_CLASS(klass); 604 605 dc->reset = mv88w8618_pit_reset; 606 dc->vmsd = &mv88w8618_pit_vmsd; 607 } 608 609 static const TypeInfo mv88w8618_pit_info = { 610 .name = TYPE_MV88W8618_PIT, 611 .parent = TYPE_SYS_BUS_DEVICE, 612 .instance_size = sizeof(mv88w8618_pit_state), 613 .instance_init = mv88w8618_pit_init, 614 .instance_finalize = mv88w8618_pit_finalize, 615 .class_init = mv88w8618_pit_class_init, 616 }; 617 618 /* Flash config register offsets */ 619 #define MP_FLASHCFG_CFGR0 0x04 620 621 #define TYPE_MV88W8618_FLASHCFG "mv88w8618_flashcfg" 622 OBJECT_DECLARE_SIMPLE_TYPE(mv88w8618_flashcfg_state, MV88W8618_FLASHCFG) 623 624 struct mv88w8618_flashcfg_state { 625 /*< private >*/ 626 SysBusDevice parent_obj; 627 /*< public >*/ 628 629 MemoryRegion iomem; 630 uint32_t cfgr0; 631 }; 632 633 static uint64_t mv88w8618_flashcfg_read(void *opaque, 634 hwaddr offset, 635 unsigned size) 636 { 637 mv88w8618_flashcfg_state *s = opaque; 638 639 switch (offset) { 640 case MP_FLASHCFG_CFGR0: 641 return s->cfgr0; 642 643 default: 644 return 0; 645 } 646 } 647 648 static void mv88w8618_flashcfg_write(void *opaque, hwaddr offset, 649 uint64_t value, unsigned size) 650 { 651 mv88w8618_flashcfg_state *s = opaque; 652 653 switch (offset) { 654 case MP_FLASHCFG_CFGR0: 655 s->cfgr0 = value; 656 break; 657 } 658 } 659 660 static const MemoryRegionOps mv88w8618_flashcfg_ops = { 661 .read = mv88w8618_flashcfg_read, 662 .write = mv88w8618_flashcfg_write, 663 .endianness = DEVICE_NATIVE_ENDIAN, 664 }; 665 666 static void mv88w8618_flashcfg_init(Object *obj) 667 { 668 SysBusDevice *dev = SYS_BUS_DEVICE(obj); 669 mv88w8618_flashcfg_state *s = MV88W8618_FLASHCFG(dev); 670 671 s->cfgr0 = 0xfffe4285; /* Default as set by U-Boot for 8 MB flash */ 672 memory_region_init_io(&s->iomem, obj, &mv88w8618_flashcfg_ops, s, 673 "musicpal-flashcfg", MP_FLASHCFG_SIZE); 674 sysbus_init_mmio(dev, &s->iomem); 675 } 676 677 static const VMStateDescription mv88w8618_flashcfg_vmsd = { 678 .name = "mv88w8618_flashcfg", 679 .version_id = 1, 680 .minimum_version_id = 1, 681 .fields = (VMStateField[]) { 682 VMSTATE_UINT32(cfgr0, mv88w8618_flashcfg_state), 683 VMSTATE_END_OF_LIST() 684 } 685 }; 686 687 static void mv88w8618_flashcfg_class_init(ObjectClass *klass, void *data) 688 { 689 DeviceClass *dc = DEVICE_CLASS(klass); 690 691 dc->vmsd = &mv88w8618_flashcfg_vmsd; 692 } 693 694 static const TypeInfo mv88w8618_flashcfg_info = { 695 .name = TYPE_MV88W8618_FLASHCFG, 696 .parent = TYPE_SYS_BUS_DEVICE, 697 .instance_size = sizeof(mv88w8618_flashcfg_state), 698 .instance_init = mv88w8618_flashcfg_init, 699 .class_init = mv88w8618_flashcfg_class_init, 700 }; 701 702 /* Misc register offsets */ 703 #define MP_MISC_BOARD_REVISION 0x18 704 705 #define MP_BOARD_REVISION 0x31 706 707 struct MusicPalMiscState { 708 SysBusDevice parent_obj; 709 MemoryRegion iomem; 710 }; 711 712 #define TYPE_MUSICPAL_MISC "musicpal-misc" 713 OBJECT_DECLARE_SIMPLE_TYPE(MusicPalMiscState, MUSICPAL_MISC) 714 715 static uint64_t musicpal_misc_read(void *opaque, hwaddr offset, 716 unsigned size) 717 { 718 switch (offset) { 719 case MP_MISC_BOARD_REVISION: 720 return MP_BOARD_REVISION; 721 722 default: 723 return 0; 724 } 725 } 726 727 static void musicpal_misc_write(void *opaque, hwaddr offset, 728 uint64_t value, unsigned size) 729 { 730 } 731 732 static const MemoryRegionOps musicpal_misc_ops = { 733 .read = musicpal_misc_read, 734 .write = musicpal_misc_write, 735 .endianness = DEVICE_NATIVE_ENDIAN, 736 }; 737 738 static void musicpal_misc_init(Object *obj) 739 { 740 SysBusDevice *sd = SYS_BUS_DEVICE(obj); 741 MusicPalMiscState *s = MUSICPAL_MISC(obj); 742 743 memory_region_init_io(&s->iomem, OBJECT(s), &musicpal_misc_ops, NULL, 744 "musicpal-misc", MP_MISC_SIZE); 745 sysbus_init_mmio(sd, &s->iomem); 746 } 747 748 static const TypeInfo musicpal_misc_info = { 749 .name = TYPE_MUSICPAL_MISC, 750 .parent = TYPE_SYS_BUS_DEVICE, 751 .instance_init = musicpal_misc_init, 752 .instance_size = sizeof(MusicPalMiscState), 753 }; 754 755 /* WLAN register offsets */ 756 #define MP_WLAN_MAGIC1 0x11c 757 #define MP_WLAN_MAGIC2 0x124 758 759 static uint64_t mv88w8618_wlan_read(void *opaque, hwaddr offset, 760 unsigned size) 761 { 762 switch (offset) { 763 /* Workaround to allow loading the binary-only wlandrv.ko crap 764 * from the original Freecom firmware. */ 765 case MP_WLAN_MAGIC1: 766 return ~3; 767 case MP_WLAN_MAGIC2: 768 return -1; 769 770 default: 771 return 0; 772 } 773 } 774 775 static void mv88w8618_wlan_write(void *opaque, hwaddr offset, 776 uint64_t value, unsigned size) 777 { 778 } 779 780 static const MemoryRegionOps mv88w8618_wlan_ops = { 781 .read = mv88w8618_wlan_read, 782 .write =mv88w8618_wlan_write, 783 .endianness = DEVICE_NATIVE_ENDIAN, 784 }; 785 786 static void mv88w8618_wlan_realize(DeviceState *dev, Error **errp) 787 { 788 MemoryRegion *iomem = g_new(MemoryRegion, 1); 789 790 memory_region_init_io(iomem, OBJECT(dev), &mv88w8618_wlan_ops, NULL, 791 "musicpal-wlan", MP_WLAN_SIZE); 792 sysbus_init_mmio(SYS_BUS_DEVICE(dev), iomem); 793 } 794 795 /* GPIO register offsets */ 796 #define MP_GPIO_OE_LO 0x008 797 #define MP_GPIO_OUT_LO 0x00c 798 #define MP_GPIO_IN_LO 0x010 799 #define MP_GPIO_IER_LO 0x014 800 #define MP_GPIO_IMR_LO 0x018 801 #define MP_GPIO_ISR_LO 0x020 802 #define MP_GPIO_OE_HI 0x508 803 #define MP_GPIO_OUT_HI 0x50c 804 #define MP_GPIO_IN_HI 0x510 805 #define MP_GPIO_IER_HI 0x514 806 #define MP_GPIO_IMR_HI 0x518 807 #define MP_GPIO_ISR_HI 0x520 808 809 /* GPIO bits & masks */ 810 #define MP_GPIO_LCD_BRIGHTNESS 0x00070000 811 #define MP_GPIO_I2C_DATA_BIT 29 812 #define MP_GPIO_I2C_CLOCK_BIT 30 813 814 /* LCD brightness bits in GPIO_OE_HI */ 815 #define MP_OE_LCD_BRIGHTNESS 0x0007 816 817 #define TYPE_MUSICPAL_GPIO "musicpal_gpio" 818 OBJECT_DECLARE_SIMPLE_TYPE(musicpal_gpio_state, MUSICPAL_GPIO) 819 820 struct musicpal_gpio_state { 821 /*< private >*/ 822 SysBusDevice parent_obj; 823 /*< public >*/ 824 825 MemoryRegion iomem; 826 uint32_t lcd_brightness; 827 uint32_t out_state; 828 uint32_t in_state; 829 uint32_t ier; 830 uint32_t imr; 831 uint32_t isr; 832 qemu_irq irq; 833 qemu_irq out[5]; /* 3 brightness out + 2 lcd (data and clock ) */ 834 }; 835 836 static void musicpal_gpio_brightness_update(musicpal_gpio_state *s) { 837 int i; 838 uint32_t brightness; 839 840 /* compute brightness ratio */ 841 switch (s->lcd_brightness) { 842 case 0x00000007: 843 brightness = 0; 844 break; 845 846 case 0x00020000: 847 brightness = 1; 848 break; 849 850 case 0x00020001: 851 brightness = 2; 852 break; 853 854 case 0x00040000: 855 brightness = 3; 856 break; 857 858 case 0x00010006: 859 brightness = 4; 860 break; 861 862 case 0x00020005: 863 brightness = 5; 864 break; 865 866 case 0x00040003: 867 brightness = 6; 868 break; 869 870 case 0x00030004: 871 default: 872 brightness = 7; 873 } 874 875 /* set lcd brightness GPIOs */ 876 for (i = 0; i <= 2; i++) { 877 qemu_set_irq(s->out[i], (brightness >> i) & 1); 878 } 879 } 880 881 static void musicpal_gpio_pin_event(void *opaque, int pin, int level) 882 { 883 musicpal_gpio_state *s = opaque; 884 uint32_t mask = 1 << pin; 885 uint32_t delta = level << pin; 886 uint32_t old = s->in_state & mask; 887 888 s->in_state &= ~mask; 889 s->in_state |= delta; 890 891 if ((old ^ delta) && 892 ((level && (s->imr & mask)) || (!level && (s->ier & mask)))) { 893 s->isr = mask; 894 qemu_irq_raise(s->irq); 895 } 896 } 897 898 static uint64_t musicpal_gpio_read(void *opaque, hwaddr offset, 899 unsigned size) 900 { 901 musicpal_gpio_state *s = opaque; 902 903 switch (offset) { 904 case MP_GPIO_OE_HI: /* used for LCD brightness control */ 905 return s->lcd_brightness & MP_OE_LCD_BRIGHTNESS; 906 907 case MP_GPIO_OUT_LO: 908 return s->out_state & 0xFFFF; 909 case MP_GPIO_OUT_HI: 910 return s->out_state >> 16; 911 912 case MP_GPIO_IN_LO: 913 return s->in_state & 0xFFFF; 914 case MP_GPIO_IN_HI: 915 return s->in_state >> 16; 916 917 case MP_GPIO_IER_LO: 918 return s->ier & 0xFFFF; 919 case MP_GPIO_IER_HI: 920 return s->ier >> 16; 921 922 case MP_GPIO_IMR_LO: 923 return s->imr & 0xFFFF; 924 case MP_GPIO_IMR_HI: 925 return s->imr >> 16; 926 927 case MP_GPIO_ISR_LO: 928 return s->isr & 0xFFFF; 929 case MP_GPIO_ISR_HI: 930 return s->isr >> 16; 931 932 default: 933 return 0; 934 } 935 } 936 937 static void musicpal_gpio_write(void *opaque, hwaddr offset, 938 uint64_t value, unsigned size) 939 { 940 musicpal_gpio_state *s = opaque; 941 switch (offset) { 942 case MP_GPIO_OE_HI: /* used for LCD brightness control */ 943 s->lcd_brightness = (s->lcd_brightness & MP_GPIO_LCD_BRIGHTNESS) | 944 (value & MP_OE_LCD_BRIGHTNESS); 945 musicpal_gpio_brightness_update(s); 946 break; 947 948 case MP_GPIO_OUT_LO: 949 s->out_state = (s->out_state & 0xFFFF0000) | (value & 0xFFFF); 950 break; 951 case MP_GPIO_OUT_HI: 952 s->out_state = (s->out_state & 0xFFFF) | (value << 16); 953 s->lcd_brightness = (s->lcd_brightness & 0xFFFF) | 954 (s->out_state & MP_GPIO_LCD_BRIGHTNESS); 955 musicpal_gpio_brightness_update(s); 956 qemu_set_irq(s->out[3], (s->out_state >> MP_GPIO_I2C_DATA_BIT) & 1); 957 qemu_set_irq(s->out[4], (s->out_state >> MP_GPIO_I2C_CLOCK_BIT) & 1); 958 break; 959 960 case MP_GPIO_IER_LO: 961 s->ier = (s->ier & 0xFFFF0000) | (value & 0xFFFF); 962 break; 963 case MP_GPIO_IER_HI: 964 s->ier = (s->ier & 0xFFFF) | (value << 16); 965 break; 966 967 case MP_GPIO_IMR_LO: 968 s->imr = (s->imr & 0xFFFF0000) | (value & 0xFFFF); 969 break; 970 case MP_GPIO_IMR_HI: 971 s->imr = (s->imr & 0xFFFF) | (value << 16); 972 break; 973 } 974 } 975 976 static const MemoryRegionOps musicpal_gpio_ops = { 977 .read = musicpal_gpio_read, 978 .write = musicpal_gpio_write, 979 .endianness = DEVICE_NATIVE_ENDIAN, 980 }; 981 982 static void musicpal_gpio_reset(DeviceState *d) 983 { 984 musicpal_gpio_state *s = MUSICPAL_GPIO(d); 985 986 s->lcd_brightness = 0; 987 s->out_state = 0; 988 s->in_state = 0xffffffff; 989 s->ier = 0; 990 s->imr = 0; 991 s->isr = 0; 992 } 993 994 static void musicpal_gpio_init(Object *obj) 995 { 996 SysBusDevice *sbd = SYS_BUS_DEVICE(obj); 997 DeviceState *dev = DEVICE(sbd); 998 musicpal_gpio_state *s = MUSICPAL_GPIO(dev); 999 1000 sysbus_init_irq(sbd, &s->irq); 1001 1002 memory_region_init_io(&s->iomem, obj, &musicpal_gpio_ops, s, 1003 "musicpal-gpio", MP_GPIO_SIZE); 1004 sysbus_init_mmio(sbd, &s->iomem); 1005 1006 qdev_init_gpio_out(dev, s->out, ARRAY_SIZE(s->out)); 1007 1008 qdev_init_gpio_in(dev, musicpal_gpio_pin_event, 32); 1009 } 1010 1011 static const VMStateDescription musicpal_gpio_vmsd = { 1012 .name = "musicpal_gpio", 1013 .version_id = 1, 1014 .minimum_version_id = 1, 1015 .fields = (VMStateField[]) { 1016 VMSTATE_UINT32(lcd_brightness, musicpal_gpio_state), 1017 VMSTATE_UINT32(out_state, musicpal_gpio_state), 1018 VMSTATE_UINT32(in_state, musicpal_gpio_state), 1019 VMSTATE_UINT32(ier, musicpal_gpio_state), 1020 VMSTATE_UINT32(imr, musicpal_gpio_state), 1021 VMSTATE_UINT32(isr, musicpal_gpio_state), 1022 VMSTATE_END_OF_LIST() 1023 } 1024 }; 1025 1026 static void musicpal_gpio_class_init(ObjectClass *klass, void *data) 1027 { 1028 DeviceClass *dc = DEVICE_CLASS(klass); 1029 1030 dc->reset = musicpal_gpio_reset; 1031 dc->vmsd = &musicpal_gpio_vmsd; 1032 } 1033 1034 static const TypeInfo musicpal_gpio_info = { 1035 .name = TYPE_MUSICPAL_GPIO, 1036 .parent = TYPE_SYS_BUS_DEVICE, 1037 .instance_size = sizeof(musicpal_gpio_state), 1038 .instance_init = musicpal_gpio_init, 1039 .class_init = musicpal_gpio_class_init, 1040 }; 1041 1042 /* Keyboard codes & masks */ 1043 #define KEY_RELEASED 0x80 1044 #define KEY_CODE 0x7f 1045 1046 #define KEYCODE_TAB 0x0f 1047 #define KEYCODE_ENTER 0x1c 1048 #define KEYCODE_F 0x21 1049 #define KEYCODE_M 0x32 1050 1051 #define KEYCODE_EXTENDED 0xe0 1052 #define KEYCODE_UP 0x48 1053 #define KEYCODE_DOWN 0x50 1054 #define KEYCODE_LEFT 0x4b 1055 #define KEYCODE_RIGHT 0x4d 1056 1057 #define MP_KEY_WHEEL_VOL (1 << 0) 1058 #define MP_KEY_WHEEL_VOL_INV (1 << 1) 1059 #define MP_KEY_WHEEL_NAV (1 << 2) 1060 #define MP_KEY_WHEEL_NAV_INV (1 << 3) 1061 #define MP_KEY_BTN_FAVORITS (1 << 4) 1062 #define MP_KEY_BTN_MENU (1 << 5) 1063 #define MP_KEY_BTN_VOLUME (1 << 6) 1064 #define MP_KEY_BTN_NAVIGATION (1 << 7) 1065 1066 #define TYPE_MUSICPAL_KEY "musicpal_key" 1067 OBJECT_DECLARE_SIMPLE_TYPE(musicpal_key_state, MUSICPAL_KEY) 1068 1069 struct musicpal_key_state { 1070 /*< private >*/ 1071 SysBusDevice parent_obj; 1072 /*< public >*/ 1073 1074 MemoryRegion iomem; 1075 uint32_t kbd_extended; 1076 uint32_t pressed_keys; 1077 qemu_irq out[8]; 1078 }; 1079 1080 static void musicpal_key_event(void *opaque, int keycode) 1081 { 1082 musicpal_key_state *s = opaque; 1083 uint32_t event = 0; 1084 int i; 1085 1086 if (keycode == KEYCODE_EXTENDED) { 1087 s->kbd_extended = 1; 1088 return; 1089 } 1090 1091 if (s->kbd_extended) { 1092 switch (keycode & KEY_CODE) { 1093 case KEYCODE_UP: 1094 event = MP_KEY_WHEEL_NAV | MP_KEY_WHEEL_NAV_INV; 1095 break; 1096 1097 case KEYCODE_DOWN: 1098 event = MP_KEY_WHEEL_NAV; 1099 break; 1100 1101 case KEYCODE_LEFT: 1102 event = MP_KEY_WHEEL_VOL | MP_KEY_WHEEL_VOL_INV; 1103 break; 1104 1105 case KEYCODE_RIGHT: 1106 event = MP_KEY_WHEEL_VOL; 1107 break; 1108 } 1109 } else { 1110 switch (keycode & KEY_CODE) { 1111 case KEYCODE_F: 1112 event = MP_KEY_BTN_FAVORITS; 1113 break; 1114 1115 case KEYCODE_TAB: 1116 event = MP_KEY_BTN_VOLUME; 1117 break; 1118 1119 case KEYCODE_ENTER: 1120 event = MP_KEY_BTN_NAVIGATION; 1121 break; 1122 1123 case KEYCODE_M: 1124 event = MP_KEY_BTN_MENU; 1125 break; 1126 } 1127 /* Do not repeat already pressed buttons */ 1128 if (!(keycode & KEY_RELEASED) && (s->pressed_keys & event)) { 1129 event = 0; 1130 } 1131 } 1132 1133 if (event) { 1134 /* Raise GPIO pin first if repeating a key */ 1135 if (!(keycode & KEY_RELEASED) && (s->pressed_keys & event)) { 1136 for (i = 0; i <= 7; i++) { 1137 if (event & (1 << i)) { 1138 qemu_set_irq(s->out[i], 1); 1139 } 1140 } 1141 } 1142 for (i = 0; i <= 7; i++) { 1143 if (event & (1 << i)) { 1144 qemu_set_irq(s->out[i], !!(keycode & KEY_RELEASED)); 1145 } 1146 } 1147 if (keycode & KEY_RELEASED) { 1148 s->pressed_keys &= ~event; 1149 } else { 1150 s->pressed_keys |= event; 1151 } 1152 } 1153 1154 s->kbd_extended = 0; 1155 } 1156 1157 static void musicpal_key_init(Object *obj) 1158 { 1159 SysBusDevice *sbd = SYS_BUS_DEVICE(obj); 1160 DeviceState *dev = DEVICE(sbd); 1161 musicpal_key_state *s = MUSICPAL_KEY(dev); 1162 1163 memory_region_init(&s->iomem, obj, "dummy", 0); 1164 sysbus_init_mmio(sbd, &s->iomem); 1165 1166 s->kbd_extended = 0; 1167 s->pressed_keys = 0; 1168 1169 qdev_init_gpio_out(dev, s->out, ARRAY_SIZE(s->out)); 1170 1171 qemu_add_kbd_event_handler(musicpal_key_event, s); 1172 } 1173 1174 static const VMStateDescription musicpal_key_vmsd = { 1175 .name = "musicpal_key", 1176 .version_id = 1, 1177 .minimum_version_id = 1, 1178 .fields = (VMStateField[]) { 1179 VMSTATE_UINT32(kbd_extended, musicpal_key_state), 1180 VMSTATE_UINT32(pressed_keys, musicpal_key_state), 1181 VMSTATE_END_OF_LIST() 1182 } 1183 }; 1184 1185 static void musicpal_key_class_init(ObjectClass *klass, void *data) 1186 { 1187 DeviceClass *dc = DEVICE_CLASS(klass); 1188 1189 dc->vmsd = &musicpal_key_vmsd; 1190 } 1191 1192 static const TypeInfo musicpal_key_info = { 1193 .name = TYPE_MUSICPAL_KEY, 1194 .parent = TYPE_SYS_BUS_DEVICE, 1195 .instance_size = sizeof(musicpal_key_state), 1196 .instance_init = musicpal_key_init, 1197 .class_init = musicpal_key_class_init, 1198 }; 1199 1200 #define FLASH_SECTOR_SIZE (64 * KiB) 1201 1202 static struct arm_boot_info musicpal_binfo = { 1203 .loader_start = 0x0, 1204 .board_id = 0x20e, 1205 }; 1206 1207 static void musicpal_init(MachineState *machine) 1208 { 1209 ARMCPU *cpu; 1210 DeviceState *dev; 1211 DeviceState *pic; 1212 DeviceState *uart_orgate; 1213 DeviceState *i2c_dev; 1214 DeviceState *lcd_dev; 1215 DeviceState *key_dev; 1216 I2CSlave *wm8750_dev; 1217 SysBusDevice *s; 1218 I2CBus *i2c; 1219 int i; 1220 unsigned long flash_size; 1221 DriveInfo *dinfo; 1222 MachineClass *mc = MACHINE_GET_CLASS(machine); 1223 MemoryRegion *address_space_mem = get_system_memory(); 1224 MemoryRegion *sram = g_new(MemoryRegion, 1); 1225 1226 /* For now we use a fixed - the original - RAM size */ 1227 if (machine->ram_size != mc->default_ram_size) { 1228 char *sz = size_to_str(mc->default_ram_size); 1229 error_report("Invalid RAM size, should be %s", sz); 1230 g_free(sz); 1231 exit(EXIT_FAILURE); 1232 } 1233 1234 cpu = ARM_CPU(cpu_create(machine->cpu_type)); 1235 1236 memory_region_add_subregion(address_space_mem, 0, machine->ram); 1237 1238 memory_region_init_ram(sram, NULL, "musicpal.sram", MP_SRAM_SIZE, 1239 &error_fatal); 1240 memory_region_add_subregion(address_space_mem, MP_SRAM_BASE, sram); 1241 1242 pic = sysbus_create_simple(TYPE_MV88W8618_PIC, MP_PIC_BASE, 1243 qdev_get_gpio_in(DEVICE(cpu), ARM_CPU_IRQ)); 1244 sysbus_create_varargs(TYPE_MV88W8618_PIT, MP_PIT_BASE, 1245 qdev_get_gpio_in(pic, MP_TIMER1_IRQ), 1246 qdev_get_gpio_in(pic, MP_TIMER2_IRQ), 1247 qdev_get_gpio_in(pic, MP_TIMER3_IRQ), 1248 qdev_get_gpio_in(pic, MP_TIMER4_IRQ), NULL); 1249 1250 /* Logically OR both UART IRQs together */ 1251 uart_orgate = DEVICE(object_new(TYPE_OR_IRQ)); 1252 object_property_set_int(OBJECT(uart_orgate), "num-lines", 2, &error_fatal); 1253 qdev_realize_and_unref(uart_orgate, NULL, &error_fatal); 1254 qdev_connect_gpio_out(DEVICE(uart_orgate), 0, 1255 qdev_get_gpio_in(pic, MP_UART_SHARED_IRQ)); 1256 1257 serial_mm_init(address_space_mem, MP_UART1_BASE, 2, 1258 qdev_get_gpio_in(uart_orgate, 0), 1259 1825000, serial_hd(0), DEVICE_NATIVE_ENDIAN); 1260 serial_mm_init(address_space_mem, MP_UART2_BASE, 2, 1261 qdev_get_gpio_in(uart_orgate, 1), 1262 1825000, serial_hd(1), DEVICE_NATIVE_ENDIAN); 1263 1264 /* Register flash */ 1265 dinfo = drive_get(IF_PFLASH, 0, 0); 1266 if (dinfo) { 1267 BlockBackend *blk = blk_by_legacy_dinfo(dinfo); 1268 1269 flash_size = blk_getlength(blk); 1270 if (flash_size != 8 * MiB && flash_size != 16 * MiB && 1271 flash_size != 32 * MiB) { 1272 error_report("Invalid flash image size"); 1273 exit(1); 1274 } 1275 1276 /* 1277 * The original U-Boot accesses the flash at 0xFE000000 instead of 1278 * 0xFF800000 (if there is 8 MB flash). So remap flash access if the 1279 * image is smaller than 32 MB. 1280 */ 1281 pflash_cfi02_register(0x100000000ULL - MP_FLASH_SIZE_MAX, 1282 "musicpal.flash", flash_size, 1283 blk, FLASH_SECTOR_SIZE, 1284 MP_FLASH_SIZE_MAX / flash_size, 1285 2, 0x00BF, 0x236D, 0x0000, 0x0000, 1286 0x5555, 0x2AAA, 0); 1287 } 1288 sysbus_create_simple(TYPE_MV88W8618_FLASHCFG, MP_FLASHCFG_BASE, NULL); 1289 1290 qemu_check_nic_model(&nd_table[0], "mv88w8618"); 1291 dev = qdev_new(TYPE_MV88W8618_ETH); 1292 qdev_set_nic_properties(dev, &nd_table[0]); 1293 object_property_set_link(OBJECT(dev), "dma-memory", 1294 OBJECT(get_system_memory()), &error_fatal); 1295 sysbus_realize_and_unref(SYS_BUS_DEVICE(dev), &error_fatal); 1296 sysbus_mmio_map(SYS_BUS_DEVICE(dev), 0, MP_ETH_BASE); 1297 sysbus_connect_irq(SYS_BUS_DEVICE(dev), 0, 1298 qdev_get_gpio_in(pic, MP_ETH_IRQ)); 1299 1300 sysbus_create_simple("mv88w8618_wlan", MP_WLAN_BASE, NULL); 1301 1302 sysbus_create_simple(TYPE_MUSICPAL_MISC, MP_MISC_BASE, NULL); 1303 1304 dev = sysbus_create_simple(TYPE_MUSICPAL_GPIO, MP_GPIO_BASE, 1305 qdev_get_gpio_in(pic, MP_GPIO_IRQ)); 1306 i2c_dev = sysbus_create_simple("gpio_i2c", -1, NULL); 1307 i2c = (I2CBus *)qdev_get_child_bus(i2c_dev, "i2c"); 1308 1309 lcd_dev = sysbus_create_simple(TYPE_MUSICPAL_LCD, MP_LCD_BASE, NULL); 1310 key_dev = sysbus_create_simple(TYPE_MUSICPAL_KEY, -1, NULL); 1311 1312 /* I2C read data */ 1313 qdev_connect_gpio_out(i2c_dev, 0, 1314 qdev_get_gpio_in(dev, MP_GPIO_I2C_DATA_BIT)); 1315 /* I2C data */ 1316 qdev_connect_gpio_out(dev, 3, qdev_get_gpio_in(i2c_dev, 0)); 1317 /* I2C clock */ 1318 qdev_connect_gpio_out(dev, 4, qdev_get_gpio_in(i2c_dev, 1)); 1319 1320 for (i = 0; i < 3; i++) { 1321 qdev_connect_gpio_out(dev, i, qdev_get_gpio_in(lcd_dev, i)); 1322 } 1323 for (i = 0; i < 4; i++) { 1324 qdev_connect_gpio_out(key_dev, i, qdev_get_gpio_in(dev, i + 8)); 1325 } 1326 for (i = 4; i < 8; i++) { 1327 qdev_connect_gpio_out(key_dev, i, qdev_get_gpio_in(dev, i + 15)); 1328 } 1329 1330 wm8750_dev = i2c_slave_create_simple(i2c, TYPE_WM8750, MP_WM_ADDR); 1331 dev = qdev_new(TYPE_MV88W8618_AUDIO); 1332 s = SYS_BUS_DEVICE(dev); 1333 object_property_set_link(OBJECT(dev), "wm8750", OBJECT(wm8750_dev), 1334 NULL); 1335 sysbus_realize_and_unref(s, &error_fatal); 1336 sysbus_mmio_map(s, 0, MP_AUDIO_BASE); 1337 sysbus_connect_irq(s, 0, qdev_get_gpio_in(pic, MP_AUDIO_IRQ)); 1338 1339 musicpal_binfo.ram_size = MP_RAM_DEFAULT_SIZE; 1340 arm_load_kernel(cpu, machine, &musicpal_binfo); 1341 } 1342 1343 static void musicpal_machine_init(MachineClass *mc) 1344 { 1345 mc->desc = "Marvell 88w8618 / MusicPal (ARM926EJ-S)"; 1346 mc->init = musicpal_init; 1347 mc->ignore_memory_transaction_failures = true; 1348 mc->default_cpu_type = ARM_CPU_TYPE_NAME("arm926"); 1349 mc->default_ram_size = MP_RAM_DEFAULT_SIZE; 1350 mc->default_ram_id = "musicpal.ram"; 1351 } 1352 1353 DEFINE_MACHINE("musicpal", musicpal_machine_init) 1354 1355 static void mv88w8618_wlan_class_init(ObjectClass *klass, void *data) 1356 { 1357 DeviceClass *dc = DEVICE_CLASS(klass); 1358 1359 dc->realize = mv88w8618_wlan_realize; 1360 } 1361 1362 static const TypeInfo mv88w8618_wlan_info = { 1363 .name = "mv88w8618_wlan", 1364 .parent = TYPE_SYS_BUS_DEVICE, 1365 .instance_size = sizeof(SysBusDevice), 1366 .class_init = mv88w8618_wlan_class_init, 1367 }; 1368 1369 static void musicpal_register_types(void) 1370 { 1371 type_register_static(&mv88w8618_pic_info); 1372 type_register_static(&mv88w8618_pit_info); 1373 type_register_static(&mv88w8618_flashcfg_info); 1374 type_register_static(&mv88w8618_wlan_info); 1375 type_register_static(&musicpal_lcd_info); 1376 type_register_static(&musicpal_gpio_info); 1377 type_register_static(&musicpal_key_info); 1378 type_register_static(&musicpal_misc_info); 1379 } 1380 1381 type_init(musicpal_register_types) 1382