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e775cc1a |
| 02-Sep-2022 |
AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> |
arm64: dts: mediatek: cherry: Wire up the ChromeOS Embedded Controller
Wire up the ChromeOS Embedded Controller on SPI0 and its communication channel via SCP RPMSG along with all of the offered func
arm64: dts: mediatek: cherry: Wire up the ChromeOS Embedded Controller
Wire up the ChromeOS Embedded Controller on SPI0 and its communication channel via SCP RPMSG along with all of the offered functionality, including Keyboard, Smart Battery Metrics (SBS), keyboard backlight, I2C tunnel, regulators and Type-C connector management.
Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Link: https://lore.kernel.org/r/20220902081156.38526-3-angelogioacchino.delregno@collabora.com Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
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d86a1c69 |
| 02-Sep-2022 |
AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> |
arm64: dts: mediatek: cherry: Enable the System Companion Processor
MT8195 features a SCP like some other older SoCs, and Cherry uses it for various tasks. Add the required pin configuration and DMA
arm64: dts: mediatek: cherry: Enable the System Companion Processor
MT8195 features a SCP like some other older SoCs, and Cherry uses it for various tasks. Add the required pin configuration and DMA pool and enable the node.
Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Link: https://lore.kernel.org/r/20220902081156.38526-2-angelogioacchino.delregno@collabora.com Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
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Revision tags: v5.15.64, v5.15.63, v5.15.62, v5.15.61, v5.15.60, v5.15.59, v5.19, v5.15.58, v5.15.57, v5.15.56, v5.15.55, v5.15.54, v5.15.53 |
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10d4a706 |
| 04-Jul-2022 |
AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> |
arm64: dts: mediatek: cherry: Add I2C-HID touchscreen on I2C4
This platform carries a HID compatible I2C touchscreen on the i2c4 bus, but it may be at a different address, depending on the board mod
arm64: dts: mediatek: cherry: Add I2C-HID touchscreen on I2C4
This platform carries a HID compatible I2C touchscreen on the i2c4 bus, but it may be at a different address, depending on the board model. Add the node for a touchscreen at 0x10, but enable it only in the final board dts.
Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Link: https://lore.kernel.org/r/20220704101321.44835-12-angelogioacchino.delregno@collabora.com Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
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c34bc660 |
| 04-Jul-2022 |
AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> |
arm64: dts: mediatek: cherry: Enable support for the SPI NOR flash
This platform has a SPI NOR: enable support for it, completing the storage compartment enablement for the entire platform.
Signed-
arm64: dts: mediatek: cherry: Enable support for the SPI NOR flash
This platform has a SPI NOR: enable support for it, completing the storage compartment enablement for the entire platform.
Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Reviewed-by: Nícolas F. R. A. Prado <nfraprado@collabora.com> Link: https://lore.kernel.org/r/20220704101321.44835-11-angelogioacchino.delregno@collabora.com Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
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0de0fe95 |
| 04-Jul-2022 |
AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> |
arm64: dts: mediatek: cherry: Enable MT6360 sub-pmic on I2C7
All devices of the Cherry platform have a MT6360 sub-pmic, providing two LDOs. Add the required node to enable the PMIC but without regul
arm64: dts: mediatek: cherry: Enable MT6360 sub-pmic on I2C7
All devices of the Cherry platform have a MT6360 sub-pmic, providing two LDOs. Add the required node to enable the PMIC but without regulators yet, as these will be added in a later commit.
Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Reviewed-by: Nícolas F. R. A. Prado <nfraprado@collabora.com> Link: https://lore.kernel.org/r/20220704101321.44835-10-angelogioacchino.delregno@collabora.com Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
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b6267a39 |
| 04-Jul-2022 |
AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> |
arm64: dts: mediatek: cherry: Enable T-PHYs and USB XHCI controllers
Add USB functionality by enabling the required PHYs and the XHCI controllers. This enables all of the supported USB ports on the
arm64: dts: mediatek: cherry: Enable T-PHYs and USB XHCI controllers
Add USB functionality by enabling the required PHYs and the XHCI controllers. This enables all of the supported USB ports on the Cherry boards.
Please note that u3phy1 also enables u3port1, which is configured to be a PCI-Express PHY for the second PCIe controller that is found on the MT8195 SoC, which will be enabled in a later commit.
Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Reviewed-by: Nícolas F. R. A. Prado <nfraprado@collabora.com> Link: https://lore.kernel.org/r/20220704101321.44835-9-angelogioacchino.delregno@collabora.com Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
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d82b3562 |
| 04-Jul-2022 |
AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> |
arm64: dts: mediatek: cherry: Enable I2C and SPI controllers
This platform uses eight I2C controllers and one SPI controller: in preparation for enabling devices attached to these controllers, add b
arm64: dts: mediatek: cherry: Enable I2C and SPI controllers
This platform uses eight I2C controllers and one SPI controller: in preparation for enabling devices attached to these controllers, add basic configuration to enable the busses.
Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Reviewed-by: Nícolas F. R. A. Prado <nfraprado@collabora.com> Link: https://lore.kernel.org/r/20220704101321.44835-8-angelogioacchino.delregno@collabora.com Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
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5bf7dabe |
| 04-Jul-2022 |
AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> |
arm64: dts: mediatek: cherry: Document gpios and add default pin config
Add gpio-line-names to document GPIO names and add the default basic pin configuration to allow lower power operation by setti
arm64: dts: mediatek: cherry: Document gpios and add default pin config
Add gpio-line-names to document GPIO names and add the default basic pin configuration to allow lower power operation by setting appropriate state on the unused pins.
Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Reviewed-by: Nícolas F. R. A. Prado <nfraprado@collabora.com> Link: https://lore.kernel.org/r/20220704101321.44835-7-angelogioacchino.delregno@collabora.com Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
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4d380708 |
| 04-Jul-2022 |
AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> |
arm64: dts: mediatek: cherry: Add support for internal eMMC storage
Add mtk-sd controller and pin configuration to enable the internal eMMC storage: now it is possible to mount a rootfs located at t
arm64: dts: mediatek: cherry: Add support for internal eMMC storage
Add mtk-sd controller and pin configuration to enable the internal eMMC storage: now it is possible to mount a rootfs located at the internal storage.
Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Reviewed-by: Nícolas F. R. A. Prado <nfraprado@collabora.com> Link: https://lore.kernel.org/r/20220704101321.44835-6-angelogioacchino.delregno@collabora.com Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
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9e056506 |
| 04-Jul-2022 |
AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> |
arm64: dts: mediatek: cherry: Assign interrupt line to MT6359 PMIC
To allow MT6359 peripherals to trigger interrupts and the driver to safely handle them, assign the right interrupt line for the Che
arm64: dts: mediatek: cherry: Assign interrupt line to MT6359 PMIC
To allow MT6359 peripherals to trigger interrupts and the driver to safely handle them, assign the right interrupt line for the Cherry platform to the MT6359 PMIC node.
Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Reviewed-by: Nícolas F. R. A. Prado <nfraprado@collabora.com> Link: https://lore.kernel.org/r/20220704101321.44835-5-angelogioacchino.delregno@collabora.com Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
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37242cb9 |
| 04-Jul-2022 |
AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> |
arm64: dts: mediatek: cherry: Add platform regulators layout and config
Add the regulators layout for this platform, including the basic power rails controlled by the EC (and/or always on). Moreover
arm64: dts: mediatek: cherry: Add platform regulators layout and config
Add the regulators layout for this platform, including the basic power rails controlled by the EC (and/or always on). Moreover, include the MT6359 PMIC devicetree and add some configuration for its regulators, essential to keep the machine alive after booting.
Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Reviewed-by: Nícolas F. R. A. Prado <nfraprado@collabora.com> Link: https://lore.kernel.org/r/20220704101321.44835-4-angelogioacchino.delregno@collabora.com Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
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5eb2e303 |
| 04-Jul-2022 |
AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> |
arm64: dts: mediatek: Introduce MT8195 Cherry platform's Tomato
Introduce the MT8195 Cherry Chromebook platform, including three revisions of Cherry Tomato boards.
This basic configuration allows t
arm64: dts: mediatek: Introduce MT8195 Cherry platform's Tomato
Introduce the MT8195 Cherry Chromebook platform, including three revisions of Cherry Tomato boards.
This basic configuration allows to boot Linux on all board revisions and get a serial console from a ramdisk.
Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Link: https://lore.kernel.org/r/20220704101321.44835-3-angelogioacchino.delregno@collabora.com Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
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