Revision tags: v4.17.11 |
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ac947b17 |
| 27-Jul-2018 |
Emmanuel Vadot <manu@freebsd.org> |
arm64: dts: allwinner: a64: Add SID node
The A64 have a SID controller which consist of EFUSE (starting at 0x200) and three registers to read/write some of the protected efuses.
Signed-off-by: Emma
arm64: dts: allwinner: a64: Add SID node
The A64 have a SID controller which consist of EFUSE (starting at 0x200) and three registers to read/write some of the protected efuses.
Signed-off-by: Emmanuel Vadot <manu@freebsd.org> Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>
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Revision tags: v4.17.10, v4.17.9 |
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22f3d86f |
| 18-Jul-2018 |
Corentin Labbe <clabbe@baylibre.com> |
arm64: dts: allwinner: a64: Remove unused address-cells/size-cells of dwmac-sun8i
address-cells/size-cells is unnecessary for dwmac-sun8i node. It was in early days, but since a mdio node is used, i
arm64: dts: allwinner: a64: Remove unused address-cells/size-cells of dwmac-sun8i
address-cells/size-cells is unnecessary for dwmac-sun8i node. It was in early days, but since a mdio node is used, it could be removed.
This patch fix the following DT warning: Warning (avoid_unnecessary_addr_size): /soc/ethernet@1c50000: unnecessary #address-cells/#size-cells without "ranges" or child "reg" property
Signed-off-by: Corentin Labbe <clabbe@baylibre.com> Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>
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Revision tags: v4.17.8, v4.17.7, v4.17.6, v4.17.5, v4.17.4, v4.17.3 |
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fca63f58 |
| 22-Jun-2018 |
Icenowy Zheng <icenowy@aosc.io> |
arm64: dts: allwinner: a64: add device tree node for HDMI simplefb
As the U-Boot bootloader now is also capable of initialize the HDMI on A64 boards, add a simplefb device tree node for accessing th
arm64: dts: allwinner: a64: add device tree node for HDMI simplefb
As the U-Boot bootloader now is also capable of initialize the HDMI on A64 boards, add a simplefb device tree node for accessing the HDMI framebuffer initialized by the bootloader.
Signed-off-by: Icenowy Zheng <icenowy@aosc.io> Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>
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2c796fc8 |
| 22-Jun-2018 |
Icenowy Zheng <icenowy@aosc.io> |
arm64: dts: allwinner: a64: add necessary device tree nodes for DE2 CCU
As we have all necessary parts to enable the DE2 CCU on the Allwinner A64 SoC, add the needed device tree nodes, including the
arm64: dts: allwinner: a64: add necessary device tree nodes for DE2 CCU
As we have all necessary parts to enable the DE2 CCU on the Allwinner A64 SoC, add the needed device tree nodes, including the DE2 CCU itself and the DE2 bus.
The "mixer0-lcd0" simplefb device node is updated to use the DE2 CCU.
Signed-off-by: Icenowy Zheng <icenowy@aosc.io> Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>
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Revision tags: v4.17.2, v4.17.1, v4.17 |
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1f1f5183 |
| 11-Apr-2018 |
Icenowy Zheng <icenowy@aosc.io> |
arm64: dts: allwinner: a64: add SRAM controller device tree node
Allwinner A64 has a SRAM controller, and in the device tree currently we have a syscon node to enable EMAC driver to access the EMAC
arm64: dts: allwinner: a64: add SRAM controller device tree node
Allwinner A64 has a SRAM controller, and in the device tree currently we have a syscon node to enable EMAC driver to access the EMAC clock register. As SRAM controller driver can now export regmap for this register, replace the syscon node to the SRAM controller device node, and let EMAC driver to acquire its EMAC clock regmap.
Signed-off-by: Icenowy Zheng <icenowy@aosc.io> [wens@csie.org: Updated compatible string] Acked-by: Maxime Ripard <maxime.ripard@bootlin.com> Signed-off-by: Chen-Yu Tsai <wens@csie.org>
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b5df280b |
| 06-Jun-2018 |
Andre Przywara <andre.przywara@arm.com> |
arm64: dts: allwinner: a64: Add PWM controllers
The Allwinner A64 SoC features two PWM controllers, which are fully compatible to the one used in the A13 and H3 chips.
Add the nodes for the devices
arm64: dts: allwinner: a64: Add PWM controllers
The Allwinner A64 SoC features two PWM controllers, which are fully compatible to the one used in the A13 and H3 chips.
Add the nodes for the devices (one for the "normal" PWM, the other for the one in the CPUS domain) and the pins their outputs are connected to.
On the A64 the "normal" PWM is muxed together with one of the MDIO pins used to communicate with the Ethernet PHY, so it won't be usable on many boards. But the Pinebook laptop uses this pin for controlling the LCD backlight.
On Pine64 the CPUS PWM pin however is routed to the "RPi2" header, at the same location as the PWM pin on the RaspberryPi.
Tested on Pinebook and Teres-I
[vasily: fixed comment message as requested by Stefan Bruens, added default muxing options to pwm and r_pwm nodes]
Signed-off-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Tested-by: Harald Geyer <harald@ccbib.org> Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>
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871b5352 |
| 06-Jun-2018 |
Icenowy Zheng <icenowy@aosc.io> |
arm64: dts: allwinner: a64: add R_I2C controller
Allwinner A64 has a I2C controller, which is in the R_ MMIO zone and has two groups of pinmuxes on PL bank, so it's called R_I2C.
Add support for th
arm64: dts: allwinner: a64: add R_I2C controller
Allwinner A64 has a I2C controller, which is in the R_ MMIO zone and has two groups of pinmuxes on PL bank, so it's called R_I2C.
Add support for this I2C controller and the pinmux which doesn't conflict with RSB.
Signed-off-by: Icenowy Zheng <icenowy@aosc.io> Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>
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e1a9a474 |
| 01-Jun-2018 |
Jagan Teki <jagan@amarulasolutions.com> |
arm64: allwinner: a64: Add RTC clock to phandle 32kHz external oscillator
Outside of SOC few chips need external clock source through RTC example Wifi chip. So RTC clock nodes to phandle 32kHz exter
arm64: allwinner: a64: Add RTC clock to phandle 32kHz external oscillator
Outside of SOC few chips need external clock source through RTC example Wifi chip. So RTC clock nodes to phandle 32kHz external oscillator.
prefix rtc- with clock-output-names defined in dt-binding to avoid confusion with existing osc32k name.
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>
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Revision tags: v4.16 |
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c1cff65f |
| 15-Mar-2018 |
Harald Geyer <harald@ccbib.org> |
arm64: dts: allwinner: a64: add simplefb for A64 SoC
The A64 SoC features two display pipelines, one has a LCD output, the other has a HDMI output.
Add support for simplefb for the LCD output. Test
arm64: dts: allwinner: a64: add simplefb for A64 SoC
The A64 SoC features two display pipelines, one has a LCD output, the other has a HDMI output.
Add support for simplefb for the LCD output. Tested on Teres I.
This patch was inspired by work of Icenowy Zheng.
Signed-off-by: Harald Geyer <harald@ccbib.org> Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>
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d4185043 |
| 15-Mar-2018 |
Harald Geyer <harald@ccbib.org> |
arm64: dts: allwinner: a64: Add watchdog
Add a watchdog node for the A64, automatically enabled on all boards. Since the device is compatible with an existing driver, we only reserve a new compatibl
arm64: dts: allwinner: a64: Add watchdog
Add a watchdog node for the A64, automatically enabled on all boards. Since the device is compatible with an existing driver, we only reserve a new compatible string to be used together with the fall back. Tested on Olimex Teres-I.
Signed-off-by: Harald Geyer <harald@ccbib.org> Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>
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11239fe6 |
| 15-Mar-2018 |
Harald Geyer <harald@ccbib.org> |
arm64: dts: allwinner: a64: Add i2c0 pins
Add the proper pin group node to reference in board files.
Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Harald Geyer <harald@ccbib.o
arm64: dts: allwinner: a64: Add i2c0 pins
Add the proper pin group node to reference in board files.
Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Harald Geyer <harald@ccbib.org> Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>
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1c92c009 |
| 29-Jan-2018 |
Marcus Cooper <codekipper@gmail.com> |
arm64: dts: allwinner: a64: Add DAI nodes
Add the DAI blocks to the device tree. I2S0 and I2S1 are for connecting to an external codec.
Signed-off-by: Marcus Cooper <codekipper@gmail.com> Signed-of
arm64: dts: allwinner: a64: Add DAI nodes
Add the DAI blocks to the device tree. I2S0 and I2S1 are for connecting to an external codec.
Signed-off-by: Marcus Cooper <codekipper@gmail.com> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
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78e07137 |
| 29-Jan-2018 |
Marcus Cooper <codekipper@gmail.com> |
arm64: dts: allwinner: a64: Add SPDIF to the A64
Add the device tree sound bindings for the S/PDIF block.
Signed-off-by: Marcus Cooper <codekipper@gmail.com> Signed-off-by: Maxime Ripard <maxime.ri
arm64: dts: allwinner: a64: Add SPDIF to the A64
Add the device tree sound bindings for the S/PDIF block.
Signed-off-by: Marcus Cooper <codekipper@gmail.com> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
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b399d2ac |
| 29-Jan-2018 |
Marcus Cooper <codekipper@gmail.com> |
arm64: dts: allwinner: a64: Add the SPDIF block and pin
Add the SPDIF transceiver controller block and pin to the A64 dtsi.
Signed-off-by: Marcus Cooper <codekipper@gmail.com> Signed-off-by: Maxime
arm64: dts: allwinner: a64: Add the SPDIF block and pin
Add the SPDIF transceiver controller block and pin to the A64 dtsi.
Signed-off-by: Marcus Cooper <codekipper@gmail.com> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
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Revision tags: v4.15, v4.13.16, v4.14 |
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16416084 |
| 31-Oct-2017 |
Corentin Labbe <clabbe.montjoie@gmail.com> |
arm64: dts: allwinner: add snps,dwmac-mdio compatible to emac/mdio
stmmac bindings docs said that its mdio node must have compatible = "snps,dwmac-mdio"; Since dwmac-sun8i does not have any good rea
arm64: dts: allwinner: add snps,dwmac-mdio compatible to emac/mdio
stmmac bindings docs said that its mdio node must have compatible = "snps,dwmac-mdio"; Since dwmac-sun8i does not have any good reasons to not doing it, all their MDIO node must have it.
Signed-off-by: Corentin Labbe <clabbe.montjoie@gmail.com> Acked-by: Florian Fainelli <f.fainelli@gmail.com> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
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94f44288 |
| 31-Oct-2017 |
Corentin Labbe <clabbe.montjoie@gmail.com> |
arm64: dts: allwinner: A64: Restore EMAC changes
The original dwmac-sun8i DT bindings have some issue on how to handle integrated PHY and was reverted in last RC of 4.13. But now we have a solution
arm64: dts: allwinner: A64: Restore EMAC changes
The original dwmac-sun8i DT bindings have some issue on how to handle integrated PHY and was reverted in last RC of 4.13. But now we have a solution so we need to get back that was reverted.
This patch restore arm64 DT about dwmac-sun8i for A64 This reverts commit 87e1f5e8bb4b ("arm64: dts: allwinner: Revert EMAC changes")
Signed-off-by: Corentin Labbe <clabbe.montjoie@gmail.com> Acked-by: Florian Fainelli <f.fainelli@gmail.com> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
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d8bcaabe |
| 13-Oct-2017 |
Rob Herring <robh@kernel.org> |
arm64: dts: fix unit-address leading 0s
Fix dtc warnings for 'simple_bus_reg' due to leading 0s. Converted using the following command:
perl -p -i -e 's/\@0+([0-9a-f])/\@$1/g' `find arch/arm64/boot
arm64: dts: fix unit-address leading 0s
Fix dtc warnings for 'simple_bus_reg' due to leading 0s. Converted using the following command:
perl -p -i -e 's/\@0+([0-9a-f])/\@$1/g' `find arch/arm64/boot/dts -type -f -name '*.dts*'
Signed-off-by: Rob Herring <robh@kernel.org> Signed-off-by: Arnd Bergmann <arnd@arndb.de>
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Revision tags: v4.13.5 |
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06c1258a |
| 27-Sep-2017 |
Stefan Brüns <stefan.bruens@rwth-aachen.de> |
arm64: allwinner: a64: add dma controller references to spi nodes
The spi controller nodes omit the dma controller/channel references, add it.
This does not yet enable DMA for SPI transfers, as the
arm64: allwinner: a64: add dma controller references to spi nodes
The spi controller nodes omit the dma controller/channel references, add it.
This does not yet enable DMA for SPI transfers, as the spi-sun6i driver lacks support for DMA, but always uses PIO to the FIFO.
Signed-off-by: Stefan Brüns <stefan.bruens@rwth-aachen.de> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
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c32637e0 |
| 27-Sep-2017 |
Stefan Brüns <stefan.bruens@rwth-aachen.de> |
arm64: allwinner: a64: Add device node for DMA controller
The A64 SoC has a DMA controller that supports 8 DMA channels to and from various peripherals. The last used DRQ port is 27.
Add a device n
arm64: allwinner: a64: Add device node for DMA controller
The A64 SoC has a DMA controller that supports 8 DMA channels to and from various peripherals. The last used DRQ port is 27.
Add a device node for it.
Signed-off-by: Stefan Brüns <stefan.bruens@rwth-aachen.de> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
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92d378fb |
| 26-Sep-2017 |
Corentin LABBE <clabbe.montjoie@gmail.com> |
arm64: allwinner: a64: Fix node with unit name and no reg property
This patch fix the warning "xxx has a unit name, but no reg property" by removing "@0" from such node
Signed-off-by: Corentin Labb
arm64: allwinner: a64: Fix node with unit name and no reg property
This patch fix the warning "xxx has a unit name, but no reg property" by removing "@0" from such node
Signed-off-by: Corentin Labbe <clabbe.montjoie@gmail.com> Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com> Signed-off-by: Chen-Yu Tsai <wens@csie.org>
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d6c9da12 |
| 26-Sep-2017 |
Corentin LABBE <clabbe.montjoie@gmail.com> |
arm64: allwinner: a64: Fix simple-bus unit address format error
This patch remove leading 0 of unit address and so remove lots of warning when building DT with W=1.
Signed-off-by: Corentin Labbe <c
arm64: allwinner: a64: Fix simple-bus unit address format error
This patch remove leading 0 of unit address and so remove lots of warning when building DT with W=1.
Signed-off-by: Corentin Labbe <clabbe.montjoie@gmail.com> Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com> Signed-off-by: Chen-Yu Tsai <wens@csie.org>
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Revision tags: v4.13 |
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b518bb15 |
| 30-Aug-2017 |
Stefan Brüns <stefan.bruens@rwth-aachen.de> |
arm64: allwinner: a64: add SPI nodes
The A64 SPI controllers are register compatible to the h3/h5 SPI controllers.
The A64 has two SPI controllers, each with a single chip select. The handles for t
arm64: allwinner: a64: add SPI nodes
The A64 SPI controllers are register compatible to the h3/h5 SPI controllers.
The A64 has two SPI controllers, each with a single chip select. The handles for the DMA channels (23/24 for SPI0/SPI1) are omitted, as the A64 DMA support is currently missing.
Signed-off-by: Stefan Brüns <stefan.bruens@rwth-aachen.de> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
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87e1f5e8 |
| 25-Aug-2017 |
Maxime Ripard <maxime.ripard@free-electrons.com> |
arm64: dts: allwinner: Revert EMAC changes
Since the discussion is not settled yet for the EMAC, and that the release in getting really close, let's revert the changes for now, and we'll reintroduce
arm64: dts: allwinner: Revert EMAC changes
Since the discussion is not settled yet for the EMAC, and that the release in getting really close, let's revert the changes for now, and we'll reintroduce them later.
Acked-by: Chen-Yu Tsai <wens@csie.org> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
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3a4bae5f |
| 10-Jul-2017 |
Corentin Labbe <clabbe.montjoie@gmail.com> |
arm64: allwinner: sun50i-a64: Correct emac register size
The datasheet said that emac register size is 0x10000 not 0x100
Signed-off-by: Corentin Labbe <clabbe.montjoie@gmail.com> Signed-off-by: Max
arm64: allwinner: sun50i-a64: Correct emac register size
The datasheet said that emac register size is 0x10000 not 0x100
Signed-off-by: Corentin Labbe <clabbe.montjoie@gmail.com> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com> [wens@csie.org: Fixed commit subject prefix] Signed-off-by: Chen-Yu Tsai <wens@csie.org>
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Revision tags: v4.12 |
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#
535ca508 |
| 06-Jun-2017 |
Icenowy Zheng <icenowy@aosc.io> |
arm64: allwinner: a64: add NMI (R_INTC) controller on A64
Allwinner A64 SoC features a R_INTC controller, which controls the NMI line, and this interrupt line is usually connected to the AXP PMIC.
arm64: allwinner: a64: add NMI (R_INTC) controller on A64
Allwinner A64 SoC features a R_INTC controller, which controls the NMI line, and this interrupt line is usually connected to the AXP PMIC.
Add support for it.
Signed-off-by: Icenowy Zheng <icenowy@aosc.io> [wens@csie.org: Add fallback sun6i-a31-r-intc compatible] Signed-off-by: Chen-Yu Tsai <wens@csie.org> Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com>
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