|
Revision tags: v6.6.30, v6.6.29, v6.6.28, v6.6.27, v6.6.26, v6.6.25, v6.6.24, v6.6.23 |
|
| #
9d0b70b5 |
| 15-Mar-2024 |
Pin-yen Lin <treapking@chromium.org> |
arm64: dts: mediatek: mt8192-asurada: Update min voltage constraint for MT6315
[ Upstream commit 374a7c6400e314458178255a63c37d6347845092 ]
Update the minimum voltage from 300000 uV to 400000 uV so
arm64: dts: mediatek: mt8192-asurada: Update min voltage constraint for MT6315
[ Upstream commit 374a7c6400e314458178255a63c37d6347845092 ]
Update the minimum voltage from 300000 uV to 400000 uV so it matches
the MT6315 datasheet.
Also update the minimum voltage for Vgpu regulator from 606250 uV to
400000 uV because the requested voltage could be lower than the minimum
voltage on the GPU OPP table when the MTK Smart Voltage Scaling (SVS)
driver is enabled.
Fixes: 3183cb62b033 ("arm64: dts: mediatek: asurada: Add SPMI regulators")
Signed-off-by: Pin-yen Lin <treapking@chromium.org>
Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Link: https://lore.kernel.org/r/20240315111621.2263159-2-treapking@chromium.org
Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Signed-off-by: Sasha Levin <sashal@kernel.org>
show more ...
|
|
Revision tags: v6.6.30, v6.6.29, v6.6.28, v6.6.27, v6.6.26, v6.6.25, v6.6.24, v6.6.23 |
|
| #
9d0b70b5 |
| 15-Mar-2024 |
Pin-yen Lin <treapking@chromium.org> |
arm64: dts: mediatek: mt8192-asurada: Update min voltage constraint for MT6315
[ Upstream commit 374a7c6400e314458178255a63c37d6347845092 ]
Update the minimum voltage from 300000 uV to 400000 uV so
arm64: dts: mediatek: mt8192-asurada: Update min voltage constraint for MT6315
[ Upstream commit 374a7c6400e314458178255a63c37d6347845092 ]
Update the minimum voltage from 300000 uV to 400000 uV so it matches
the MT6315 datasheet.
Also update the minimum voltage for Vgpu regulator from 606250 uV to
400000 uV because the requested voltage could be lower than the minimum
voltage on the GPU OPP table when the MTK Smart Voltage Scaling (SVS)
driver is enabled.
Fixes: 3183cb62b033 ("arm64: dts: mediatek: asurada: Add SPMI regulators")
Signed-off-by: Pin-yen Lin <treapking@chromium.org>
Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Link: https://lore.kernel.org/r/20240315111621.2263159-2-treapking@chromium.org
Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Signed-off-by: Sasha Levin <sashal@kernel.org>
show more ...
|
|
Revision tags: v6.6.30, v6.6.29, v6.6.28, v6.6.27, v6.6.26, v6.6.25, v6.6.24, v6.6.23 |
|
| #
9d0b70b5 |
| 15-Mar-2024 |
Pin-yen Lin <treapking@chromium.org> |
arm64: dts: mediatek: mt8192-asurada: Update min voltage constraint for MT6315
[ Upstream commit 374a7c6400e314458178255a63c37d6347845092 ]
Update the minimum voltage from 300000 uV to 400000 uV so
arm64: dts: mediatek: mt8192-asurada: Update min voltage constraint for MT6315
[ Upstream commit 374a7c6400e314458178255a63c37d6347845092 ]
Update the minimum voltage from 300000 uV to 400000 uV so it matches
the MT6315 datasheet.
Also update the minimum voltage for Vgpu regulator from 606250 uV to
400000 uV because the requested voltage could be lower than the minimum
voltage on the GPU OPP table when the MTK Smart Voltage Scaling (SVS)
driver is enabled.
Fixes: 3183cb62b033 ("arm64: dts: mediatek: asurada: Add SPMI regulators")
Signed-off-by: Pin-yen Lin <treapking@chromium.org>
Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Link: https://lore.kernel.org/r/20240315111621.2263159-2-treapking@chromium.org
Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Signed-off-by: Sasha Levin <sashal@kernel.org>
show more ...
|
| #
889f1338 |
| 07-Feb-2024 |
Nícolas F. R. A. Prado <nfraprado@collabora.com> |
arm64: dts: mediatek: mt8192-asurada: Remove CrosEC base detection node
[ Upstream commit 9b49cabe631b0a25aaf8fc2ba81b5b9ea6ff01b7 ]
The commit adding the ChromeOS EC to the Asurada Devicetree mist
arm64: dts: mediatek: mt8192-asurada: Remove CrosEC base detection node
[ Upstream commit 9b49cabe631b0a25aaf8fc2ba81b5b9ea6ff01b7 ]
The commit adding the ChromeOS EC to the Asurada Devicetree mistakenly
added a base detection node. While tablet mode detection is supported by
CrosEC and used by Hayato, it is done through the cros-ec-keyb driver.
The base detection node, which is handled by the hid-google-hammer
driver, also provides tablet mode detection but by checking base
attachment status on the CrosEC, which is not supported for Asurada.
Hence, remove the unused CrosEC base detection node for Asurada.
Fixes: eb188a2aaa82 ("arm64: dts: mediatek: asurada: Add ChromeOS EC")
Signed-off-by: Nícolas F. R. A. Prado <nfraprado@collabora.com>
Link: https://lore.kernel.org/r/20240207-mt8192-asurada-cbas-remove-v1-1-04cb65951975@collabora.com
Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Signed-off-by: Sasha Levin <sashal@kernel.org>
show more ...
|
|
Revision tags: v6.6.16, v6.6.15, v6.6.14, v6.6.13, v6.6.12, v6.6.11, v6.6.10, v6.6.9, v6.6.8, v6.6.7, v6.6.6, v6.6.5, v6.6.4, v6.6.3, v6.6.2, v6.5.11, v6.6.1, v6.5.10, v6.6, v6.5.9, v6.5.8, v6.5.7, v6.5.6, v6.5.5, v6.5.4, v6.5.3, v6.5.2, v6.1.51, v6.5.1, v6.1.50, v6.5, v6.1.49, v6.1.48, v6.1.46, v6.1.45, v6.1.44, v6.1.43, v6.1.42, v6.1.41, v6.1.40, v6.1.39, v6.1.38, v6.1.37, v6.1.36, v6.4, v6.1.35, v6.1.34, v6.1.33, v6.1.32, v6.1.31, v6.1.30, v6.1.29 |
|
| #
d72cfbd6 |
| 15-May-2023 |
Douglas Anderson <dianders@chromium.org> |
arm64: dts: mediatek: mt8192: Add mediatek,broken-save-restore-fw to asurada
Firmware shipped on mt8192 Chromebooks is affected by the GICR
save/restore issue as described by the patch ("dt-bindings
arm64: dts: mediatek: mt8192: Add mediatek,broken-save-restore-fw to asurada
Firmware shipped on mt8192 Chromebooks is affected by the GICR
save/restore issue as described by the patch ("dt-bindings:
interrupt-controller: arm,gic-v3: Add quirk for Mediatek SoCs w/
broken FW"). Add the quirk property.
Fixes: 331fae2fc922 ("arm64: dts: mediatek: Introduce MT8192-based Asurada board family")
Reviewed-by: Julius Werner <jwerner@chromium.org>
Signed-off-by: Douglas Anderson <dianders@chromium.org>
Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Link: https://lore.kernel.org/r/20230515131353.v2.4.Ie7e600278ffbed55a1e5a58178203787b1449b35@changeid
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
show more ...
|
|
Revision tags: v6.1.28, v6.1.27, v6.1.26, v6.3, v6.1.25, v6.1.24, v6.1.23, v6.1.22, v6.1.21, v6.1.20, v6.1.19, v6.1.18, v6.1.17, v6.1.16, v6.1.15 |
|
| #
309460b6 |
| 01-Mar-2023 |
Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com> |
arm64: dts: mediatek: mt8192-asurada: Enable GPU
Enable the GPU with its power supplies described.
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
[wenst@: patch split out from M
arm64: dts: mediatek: mt8192-asurada: Enable GPU
Enable the GPU with its power supplies described.
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
[wenst@: patch split out from MT8192 GPU node patch]
Signed-off-by: Chen-Yu Tsai <wenst@chromium.org>
[Angelo: Minor commit title fix]
Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Reviewed-by: Chen-Yu Tsai <wenst@chromium.org>
Tested-by: Chen-Yu Tsai <wenst@chromium.org>
Link: https://lore.kernel.org/r/20230301095523.428461-14-angelogioacchino.delregno@collabora.com
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
show more ...
|
| #
c4ce03bf |
| 01-Mar-2023 |
AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> |
arm64: dts: mediatek: mt8192-asurada: Couple VGPU and VSRAM_OTHER regulators
Add coupling for these regulators, as VSRAM_OTHER is used to power the
GPU SRAM, and they have a strict voltage output re
arm64: dts: mediatek: mt8192-asurada: Couple VGPU and VSRAM_OTHER regulators
Add coupling for these regulators, as VSRAM_OTHER is used to power the
GPU SRAM, and they have a strict voltage output relation to satisfy in
order to ensure GPU stable operation.
While at it, also add voltage constraint overrides for the GPU SRAM
regulator "mt6359_vsram_others" so that we stay in a safe range of
0.75-0.80V.
Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Reviewed-by: Chen-Yu Tsai <wenst@chromium.org>
Tested-by: Chen-Yu Tsai <wenst@chromium.org>
Link: https://lore.kernel.org/r/20230301095523.428461-13-angelogioacchino.delregno@collabora.com
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
show more ...
|
| #
ff4c868b |
| 01-Mar-2023 |
AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> |
arm64: dts: mediatek: mt8192-asurada: Fix voltage constraint for Vgpu
The MT8192 SoC specifies a maximum voltage for the GPU's digital supply
of 0.88V and the GPU OPPs are declaring a maximum voltag
arm64: dts: mediatek: mt8192-asurada: Fix voltage constraint for Vgpu
The MT8192 SoC specifies a maximum voltage for the GPU's digital supply
of 0.88V and the GPU OPPs are declaring a maximum voltage of 0.80V.
In order to keep the GPU voltage in the safe range, change the maximum
voltage for mt6315@7's vbuck1 to 0.80V as sending, for any mistake,
1.193V would be catastrophic.
Fixes: 3183cb62b033 ("arm64: dts: mediatek: asurada: Add SPMI regulators")
Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Reviewed-by: Chen-yu Tsai <wenst@chromium.org>
Tested-by: Chen-Yu Tsai <wenst@chromium.org>
Link: https://lore.kernel.org/r/20230301095523.428461-12-angelogioacchino.delregno@collabora.com
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
show more ...
|
| #
3daabcb2 |
| 01-Mar-2023 |
AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> |
arm64: dts: mediatek: mt8192-asurada: Assign sram supply to MFG1 pd
Add a phandle to the MT8192_POWER_DOMAIN_MFG1 power domain and
assign the GPU VSRAM supply to this in mt8192-asurada: this allows
arm64: dts: mediatek: mt8192-asurada: Assign sram supply to MFG1 pd
Add a phandle to the MT8192_POWER_DOMAIN_MFG1 power domain and
assign the GPU VSRAM supply to this in mt8192-asurada: this allows to
keep the sram powered up while the GPU is used.
Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Reviewed-by: Chen-Yu Tsai <wenst@chromium.org>
Tested-by: Chen-Yu Tsai <wenst@chromium.org>
Link: https://lore.kernel.org/r/20230301095523.428461-11-angelogioacchino.delregno@collabora.com
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
show more ...
|
| #
6fe90cc5 |
| 01-Mar-2023 |
Nícolas F. R. A. Prado <nfraprado@collabora.com> |
arm64: dts: mediatek: mt8192-asurada: Add MFG0 domain supply
The mfg0 power domain encompasses the whole GPU and its surrounding
glue logic. This power domain has a separate power rail.
Add its pow
arm64: dts: mediatek: mt8192-asurada: Add MFG0 domain supply
The mfg0 power domain encompasses the whole GPU and its surrounding
glue logic. This power domain has a separate power rail.
Add its power supply for Asurada.
Signed-off-by: Nícolas F. R. A. Prado <nfraprado@collabora.com>
[wenst@chromium.org: fix subject prefix and add commit message]
Signed-off-by: Chen-Yu Tsai <wenst@chromium.org>
[Angelo: Reordered commits to address DVFS stability issues]
Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Reviewed-by: Chen-Yu Tsai <wenst@chromium.org>
Tested-by: Chen-Yu Tsai <wenst@chromium.org>
Link: https://lore.kernel.org/r/20230301095523.428461-10-angelogioacchino.delregno@collabora.com
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
show more ...
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|
Revision tags: v6.1.14, v6.1.13, v6.2, v6.1.12, v6.1.11, v6.1.10, v6.1.9, v6.1.8, v6.1.7, v6.1.6, v6.1.5, v6.0.19, v6.0.18, v6.1.4, v6.1.3, v6.0.17, v6.1.2, v6.0.16, v6.1.1, v6.0.15, v6.0.14, v6.0.13, v6.1, v6.0.12, v6.0.11, v6.0.10, v5.15.80, v6.0.9, v5.15.79, v6.0.8, v5.15.78, v6.0.7, v5.15.77 |
|
| #
77c060e3 |
| 02-Nov-2022 |
Nícolas F. R. A. Prado <nfraprado@collabora.com> |
arm64: dts: mediatek: asurada: Add aliases for i2c and mmc
Add aliases for the i2c and mmc nodes on the Asurada platform DT to
ensure that we get stable ids for those devices on userspace.
Reviewed
arm64: dts: mediatek: asurada: Add aliases for i2c and mmc
Add aliases for the i2c and mmc nodes on the Asurada platform DT to
ensure that we get stable ids for those devices on userspace.
Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Signed-off-by: Nícolas F. R. A. Prado <nfraprado@collabora.com>
Link: https://lore.kernel.org/r/20221102190611.283546-6-nfraprado@collabora.com
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
show more ...
|
| #
ad5cc915 |
| 02-Nov-2022 |
Nícolas F. R. A. Prado <nfraprado@collabora.com> |
arm64: dts: mediatek: asurada: Enable audio support
Enable audio support for the Asurada platform. This consists of the
machine sound card, the rt1015p codec for the speakers, the rt5682 codec
for t
arm64: dts: mediatek: asurada: Enable audio support
Enable audio support for the Asurada platform. This consists of the
machine sound card, the rt1015p codec for the speakers, the rt5682 codec
for the headset, and the dmic codec for the internal microphone.
Newer revisions of spherion and hayato use the rt5682s codec for the
headset instead, so the codecs and card compatible are added through
separate dtsi files to prepare for that.
HDMI audio support is left out for now since the DisplayPort chip
required isn't enabled yet.
Tested-by: Chen-Yu Tsai <wenst@chromium.org>
Signed-off-by: Nícolas F. R. A. Prado <nfraprado@collabora.com>
Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Link: https://lore.kernel.org/r/20221102190611.283546-5-nfraprado@collabora.com
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
show more ...
|
| #
7b3da218 |
| 02-Nov-2022 |
Nícolas F. R. A. Prado <nfraprado@collabora.com> |
arm64: dts: mediatek: asurada: Enable internal display
The asurada platform has an ANX7625 bridge connecting the DSI's output
to the internal eDP panel. Add and enable these devices in order to get
arm64: dts: mediatek: asurada: Enable internal display
The asurada platform has an ANX7625 bridge connecting the DSI's output
to the internal eDP panel. Add and enable these devices in order to get
a usable internal display.
Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Tested-by: Chen-Yu Tsai <wenst@chromium.org>
Signed-off-by: Nícolas F. R. A. Prado <nfraprado@collabora.com>
Link: https://lore.kernel.org/r/20221102190611.283546-4-nfraprado@collabora.com
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
show more ...
|
| #
ea65d256 |
| 02-Nov-2022 |
Nícolas F. R. A. Prado <nfraprado@collabora.com> |
arm64: dts: mediatek: asurada: Add display backlight
Add the display backlight for the Asurada platform. It relies on the
display PWM controller, so also enable and configure this component.
Review
arm64: dts: mediatek: asurada: Add display backlight
Add the display backlight for the Asurada platform. It relies on the
display PWM controller, so also enable and configure this component.
Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Tested-by: Chen-Yu Tsai <wenst@chromium.org>
Signed-off-by: Nícolas F. R. A. Prado <nfraprado@collabora.com>
Link: https://lore.kernel.org/r/20221102190611.283546-3-nfraprado@collabora.com
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
show more ...
|
| #
f9f00b1f |
| 02-Nov-2022 |
Nícolas F. R. A. Prado <nfraprado@collabora.com> |
arm64: dts: mediatek: asurada: Add display regulators
Add the regulators present on the Asurada platform that are used to
power the internal and external displays.
Reviewed-by: AngeloGioacchino Del
arm64: dts: mediatek: asurada: Add display regulators
Add the regulators present on the Asurada platform that are used to
power the internal and external displays.
Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Tested-by: Chen-Yu Tsai <wenst@chromium.org>
Signed-off-by: Nícolas F. R. A. Prado <nfraprado@collabora.com>
Link: https://lore.kernel.org/r/20221102190611.283546-2-nfraprado@collabora.com
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
show more ...
|
|
Revision tags: v5.15.76, v6.0.6, v6.0.5, v5.15.75, v6.0.4, v6.0.3, v6.0.2, v5.15.74, v5.15.73, v6.0.1, v5.15.72, v6.0, v5.15.71, v5.15.70, v5.15.69, v5.15.68, v5.15.67, v5.15.66, v5.15.65, v5.15.64, v5.15.63, v5.15.62, v5.15.61, v5.15.60, v5.15.59, v5.19, v5.15.58, v5.15.57, v5.15.56, v5.15.55, v5.15.54, v5.15.53, v5.15.52 |
|
| #
b0e50a1f |
| 29-Jun-2022 |
Nícolas F. R. A. Prado <nfraprado@collabora.com> |
arm64: dts: mediatek: asurada: Add SPI NOR flash memory
Add support for the SPI NOR flash memory present on the Asurada
platform.
Signed-off-by: Nícolas F. R. A. Prado <nfraprado@collabora.com>
Rev
arm64: dts: mediatek: asurada: Add SPI NOR flash memory
Add support for the SPI NOR flash memory present on the Asurada
platform.
Signed-off-by: Nícolas F. R. A. Prado <nfraprado@collabora.com>
Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Tested-by: Chen-Yu Tsai <wenst@chromium.org>
Link: https://lore.kernel.org/r/20220629155956.1138955-20-nfraprado@collabora.com
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
show more ...
|
| #
b10e80b1 |
| 29-Jun-2022 |
Nícolas F. R. A. Prado <nfraprado@collabora.com> |
arm64: dts: mediatek: asurada: Enable SCP
Enable support for the SCP co-processor present on MT8192. It is used
as part of the video encoding and decoding processes.
A region of memory is carved ou
arm64: dts: mediatek: asurada: Enable SCP
Enable support for the SCP co-processor present on MT8192. It is used
as part of the video encoding and decoding processes.
A region of memory is carved out for its use, and remoteproc setup for
communication with the ChromeOS EC.
Signed-off-by: Nícolas F. R. A. Prado <nfraprado@collabora.com>
Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Tested-by: Chen-Yu Tsai <wenst@chromium.org>
Link: https://lore.kernel.org/r/20220629155956.1138955-19-nfraprado@collabora.com
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
show more ...
|
| #
15306b90 |
| 29-Jun-2022 |
Nícolas F. R. A. Prado <nfraprado@collabora.com> |
arm64: dts: mediatek: asurada: Enable MMC
Enable both MMC controllers present on Asurada. MMC0 is for
non-removable internal memory, while MMC1 is an SD card slot. MMC1 isn't
used on all machines, b
arm64: dts: mediatek: asurada: Enable MMC
Enable both MMC controllers present on Asurada. MMC0 is for
non-removable internal memory, while MMC1 is an SD card slot. MMC1 isn't
used on all machines, but in those cases the CD interrupt is never
triggered and thus it is basically as if it was disabled.
Signed-off-by: Nícolas F. R. A. Prado <nfraprado@collabora.com>
Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Tested-by: Chen-Yu Tsai <wenst@chromium.org>
Link: https://lore.kernel.org/r/20220629155956.1138955-18-nfraprado@collabora.com
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
show more ...
|
| #
3183cb62 |
| 29-Jun-2022 |
Nícolas F. R. A. Prado <nfraprado@collabora.com> |
arm64: dts: mediatek: asurada: Add SPMI regulators
The Asurada platform uses regulators from MT6315 PMICs acessible through
SPMI. Add support for them.
Signed-off-by: Nícolas F. R. A. Prado <nfrapr
arm64: dts: mediatek: asurada: Add SPMI regulators
The Asurada platform uses regulators from MT6315 PMICs acessible through
SPMI. Add support for them.
Signed-off-by: Nícolas F. R. A. Prado <nfraprado@collabora.com>
Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Tested-by: Chen-Yu Tsai <wenst@chromium.org>
Link: https://lore.kernel.org/r/20220629155956.1138955-17-nfraprado@collabora.com
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
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| #
af9e3ed0 |
| 29-Jun-2022 |
Nícolas F. R. A. Prado <nfraprado@collabora.com> |
arm64: dts: mediatek: asurada: Add MT6359 PMIC
MT6359 is the primary PMIC present on the Asurada platform. Include its
dtsi and configure properties specific for the platform.
Signed-off-by: Nícola
arm64: dts: mediatek: asurada: Add MT6359 PMIC
MT6359 is the primary PMIC present on the Asurada platform. Include its
dtsi and configure properties specific for the platform.
Signed-off-by: Nícolas F. R. A. Prado <nfraprado@collabora.com>
Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Tested-by: Chen-Yu Tsai <wenst@chromium.org>
Link: https://lore.kernel.org/r/20220629155956.1138955-16-nfraprado@collabora.com
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
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| #
0dca9f0b |
| 29-Jun-2022 |
Nícolas F. R. A. Prado <nfraprado@collabora.com> |
arm64: dts: mediatek: asurada: Enable PCIe and add WiFi
Enable MT8192's PCIe controller and add support for the MT7921e WiFi
card that is present on that bus for the Asurada platform.
Signed-off-by
arm64: dts: mediatek: asurada: Enable PCIe and add WiFi
Enable MT8192's PCIe controller and add support for the MT7921e WiFi
card that is present on that bus for the Asurada platform.
Signed-off-by: Nícolas F. R. A. Prado <nfraprado@collabora.com>
Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Tested-by: Chen-Yu Tsai <wenst@chromium.org>
Link: https://lore.kernel.org/r/20220629155956.1138955-15-nfraprado@collabora.com
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
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| #
aa421ef2 |
| 29-Jun-2022 |
Nícolas F. R. A. Prado <nfraprado@collabora.com> |
arm64: dts: mediatek: asurada: Enable XHCI
Enable XHCI controller on the Asurada platform. This allows the use of
the USB ports, and therefore a rootfs can be loaded and a usable shell
reached from
arm64: dts: mediatek: asurada: Enable XHCI
Enable XHCI controller on the Asurada platform. This allows the use of
the USB ports, and therefore a rootfs can be loaded and a usable shell
reached from a live USB image.
Signed-off-by: Nícolas F. R. A. Prado <nfraprado@collabora.com>
Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Tested-by: Chen-Yu Tsai <wenst@chromium.org>
Link: https://lore.kernel.org/r/20220629155956.1138955-14-nfraprado@collabora.com
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
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| #
cbd4af08 |
| 29-Jun-2022 |
Nícolas F. R. A. Prado <nfraprado@collabora.com> |
arm64: dts: mediatek: asurada: Add I2C touchscreen
All machines of the Asurada platform have a touchscreen at address 0x10
in the I2C0 bus, but the devices vary: Spherion has the Elan eKTH3500
touch
arm64: dts: mediatek: asurada: Add I2C touchscreen
All machines of the Asurada platform have a touchscreen at address 0x10
in the I2C0 bus, but the devices vary: Spherion has the Elan eKTH3500
touchscreen, while Hayato has a generic HID-over-i2c touchscreen.
Add common support for the touchscreens on the platform and the
specifics in each board file.
Signed-off-by: Nícolas F. R. A. Prado <nfraprado@collabora.com>
Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Tested-by: Chen-Yu Tsai <wenst@chromium.org>
Link: https://lore.kernel.org/r/20220629155956.1138955-12-nfraprado@collabora.com
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
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| #
e031715a |
| 29-Jun-2022 |
Nícolas F. R. A. Prado <nfraprado@collabora.com> |
arm64: dts: mediatek: asurada: Add Elan eKTH3000 I2C trackpad
Add support for the Elan eKTH3000 i2c trackpad present on Asurada. It is
connected to the I2C2 bus and has address 0x15.
Signed-off-by:
arm64: dts: mediatek: asurada: Add Elan eKTH3000 I2C trackpad
Add support for the Elan eKTH3000 i2c trackpad present on Asurada. It is
connected to the I2C2 bus and has address 0x15.
Signed-off-by: Nícolas F. R. A. Prado <nfraprado@collabora.com>
Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Tested-by: Chen-Yu Tsai <wenst@chromium.org>
Link: https://lore.kernel.org/r/20220629155956.1138955-11-nfraprado@collabora.com
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
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| #
863fb752 |
| 29-Jun-2022 |
Nícolas F. R. A. Prado <nfraprado@collabora.com> |
arm64: dts: mediatek: asurada: Add Cr50 TPM
The Asurada platform has a Google Security Chip connected to the SPI5
bus. It runs the cr50 firmware and provides TPM functionality. Add
support for it.
arm64: dts: mediatek: asurada: Add Cr50 TPM
The Asurada platform has a Google Security Chip connected to the SPI5
bus. It runs the cr50 firmware and provides TPM functionality. Add
support for it.
Signed-off-by: Nícolas F. R. A. Prado <nfraprado@collabora.com>
Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Tested-by: Chen-Yu Tsai <wenst@chromium.org>
Link: https://lore.kernel.org/r/20220629155956.1138955-10-nfraprado@collabora.com
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
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