1// SPDX-License-Identifier: (GPL-2.0 OR MIT)
2/*
3 * Copyright (C) 2020 MediaTek Inc.
4 * Author: Seiya Wang <seiya.wang@mediatek.com>
5 */
6/dts-v1/;
7#include "mt8192.dtsi"
8#include <dt-bindings/gpio/gpio.h>
9
10/ {
11	aliases {
12		serial0 = &uart0;
13	};
14
15	chosen {
16		stdout-path = "serial0:115200n8";
17	};
18
19	memory@40000000 {
20		device_type = "memory";
21		reg = <0 0x40000000 0 0x80000000>;
22	};
23
24	/* system wide LDO 1.8V power rail */
25	pp1800_ldo_g: regulator-1v8-g {
26		compatible = "regulator-fixed";
27		regulator-name = "pp1800_ldo_g";
28		regulator-always-on;
29		regulator-boot-on;
30		regulator-min-microvolt = <1800000>;
31		regulator-max-microvolt = <1800000>;
32		vin-supply = <&pp3300_g>;
33	};
34
35	/* system wide switching 3.3V power rail */
36	pp3300_g: regulator-3v3-g {
37		compatible = "regulator-fixed";
38		regulator-name = "pp3300_g";
39		regulator-always-on;
40		regulator-boot-on;
41		regulator-min-microvolt = <3300000>;
42		regulator-max-microvolt = <3300000>;
43		vin-supply = <&ppvar_sys>;
44	};
45
46	/* system wide LDO 3.3V power rail */
47	pp3300_ldo_z: regulator-3v3-z {
48		compatible = "regulator-fixed";
49		regulator-name = "pp3300_ldo_z";
50		regulator-always-on;
51		regulator-boot-on;
52		regulator-min-microvolt = <3300000>;
53		regulator-max-microvolt = <3300000>;
54		vin-supply = <&ppvar_sys>;
55	};
56
57	/* separately switched 3.3V power rail */
58	pp3300_u: regulator-3v3-u {
59		compatible = "regulator-fixed";
60		regulator-name = "pp3300_u";
61		regulator-always-on;
62		regulator-boot-on;
63		regulator-min-microvolt = <3300000>;
64		regulator-max-microvolt = <3300000>;
65		/* enable pin wired to GPIO controlled by EC */
66		vin-supply = <&pp3300_g>;
67	};
68
69	/* system wide switching 5.0V power rail */
70	pp5000_a: regulator-5v0-a {
71		compatible = "regulator-fixed";
72		regulator-name = "pp5000_a";
73		regulator-always-on;
74		regulator-boot-on;
75		regulator-min-microvolt = <5000000>;
76		regulator-max-microvolt = <5000000>;
77		vin-supply = <&ppvar_sys>;
78	};
79
80	/* system wide semi-regulated power rail from battery or USB */
81	ppvar_sys: regulator-var-sys {
82		compatible = "regulator-fixed";
83		regulator-name = "ppvar_sys";
84		regulator-always-on;
85		regulator-boot-on;
86	};
87};
88
89&i2c0 {
90	status = "okay";
91
92	clock-frequency = <400000>;
93	pinctrl-names = "default";
94	pinctrl-0 = <&i2c0_pins>;
95
96	touchscreen: touchscreen@10 {
97		reg = <0x10>;
98		interrupts-extended = <&pio 21 IRQ_TYPE_LEVEL_LOW>;
99		pinctrl-names = "default";
100		pinctrl-0 = <&touchscreen_pins>;
101	};
102};
103
104&i2c1 {
105	status = "okay";
106
107	clock-frequency = <400000>;
108	pinctrl-names = "default";
109	pinctrl-0 = <&i2c1_pins>;
110};
111
112&i2c2 {
113	status = "okay";
114
115	clock-frequency = <400000>;
116	clock-stretch-ns = <12600>;
117	pinctrl-names = "default";
118	pinctrl-0 = <&i2c2_pins>;
119
120	trackpad@15 {
121		compatible = "elan,ekth3000";
122		reg = <0x15>;
123		interrupts-extended = <&pio 15 IRQ_TYPE_LEVEL_LOW>;
124		pinctrl-names = "default";
125		pinctrl-0 = <&trackpad_pins>;
126		vcc-supply = <&pp3300_u>;
127		wakeup-source;
128	};
129};
130
131&i2c3 {
132	status = "okay";
133
134	clock-frequency = <400000>;
135	pinctrl-names = "default";
136	pinctrl-0 = <&i2c3_pins>;
137};
138
139&i2c7 {
140	status = "okay";
141
142	clock-frequency = <400000>;
143	pinctrl-names = "default";
144	pinctrl-0 = <&i2c7_pins>;
145};
146
147&pio {
148	/* 220 lines */
149	gpio-line-names = "I2S_DP_LRCK",
150			  "IS_DP_BCLK",
151			  "I2S_DP_MCLK",
152			  "I2S_DP_DATAOUT",
153			  "SAR0_INT_ODL",
154			  "EC_AP_INT_ODL",
155			  "EDPBRDG_INT_ODL",
156			  "DPBRDG_INT_ODL",
157			  "DPBRDG_PWREN",
158			  "DPBRDG_RST_ODL",
159			  "I2S_HP_MCLK",
160			  "I2S_HP_BCK",
161			  "I2S_HP_LRCK",
162			  "I2S_HP_DATAIN",
163			  /*
164			   * AP_FLASH_WP_L is crossystem ABI. Schematics
165			   * call it AP_FLASH_WP_ODL.
166			   */
167			  "AP_FLASH_WP_L",
168			  "TRACKPAD_INT_ODL",
169			  "EC_AP_HPD_OD",
170			  "SD_CD_ODL",
171			  "HP_INT_ODL_ALC",
172			  "EN_PP1000_DPBRDG",
173			  "AP_GPIO20",
174			  "TOUCH_INT_L_1V8",
175			  "UART_BT_WAKE_ODL",
176			  "AP_GPIO23",
177			  "AP_SPI_FLASH_CS_L",
178			  "AP_SPI_FLASH_CLK",
179			  "EN_PP3300_DPBRDG_DX",
180			  "AP_SPI_FLASH_MOSI",
181			  "AP_SPI_FLASH_MISO",
182			  "I2S_HP_DATAOUT",
183			  "AP_GPIO30",
184			  "I2S_SPKR_MCLK",
185			  "I2S_SPKR_BCLK",
186			  "I2S_SPKR_LRCK",
187			  "I2S_SPKR_DATAIN",
188			  "I2S_SPKR_DATAOUT",
189			  "AP_SPI_H1_TPM_CLK",
190			  "AP_SPI_H1_TPM_CS_L",
191			  "AP_SPI_H1_TPM_MISO",
192			  "AP_SPI_H1_TPM_MOSI",
193			  "BL_PWM",
194			  "EDPBRDG_PWREN",
195			  "EDPBRDG_RST_ODL",
196			  "EN_PP3300_HUB",
197			  "HUB_RST_L",
198			  "",
199			  "",
200			  "",
201			  "",
202			  "",
203			  "",
204			  "SD_CLK",
205			  "SD_CMD",
206			  "SD_DATA3",
207			  "SD_DATA0",
208			  "SD_DATA2",
209			  "SD_DATA1",
210			  "",
211			  "",
212			  "",
213			  "",
214			  "",
215			  "",
216			  "PCIE_WAKE_ODL",
217			  "PCIE_RST_L",
218			  "PCIE_CLKREQ_ODL",
219			  "",
220			  "",
221			  "",
222			  "",
223			  "",
224			  "",
225			  "",
226			  "",
227			  "",
228			  "",
229			  "",
230			  "",
231			  "",
232			  "",
233			  "",
234			  "",
235			  "",
236			  "",
237			  "",
238			  "",
239			  "",
240			  "",
241			  "",
242			  "SPMI_SCL",
243			  "SPMI_SDA",
244			  "AP_GOOD",
245			  "UART_DBG_TX_AP_RX",
246			  "UART_AP_TX_DBG_RX",
247			  "UART_AP_TX_BT_RX",
248			  "UART_BT_TX_AP_RX",
249			  "MIPI_DPI_D0_R",
250			  "MIPI_DPI_D1_R",
251			  "MIPI_DPI_D2_R",
252			  "MIPI_DPI_D3_R",
253			  "MIPI_DPI_D4_R",
254			  "MIPI_DPI_D5_R",
255			  "MIPI_DPI_D6_R",
256			  "MIPI_DPI_D7_R",
257			  "MIPI_DPI_D8_R",
258			  "MIPI_DPI_D9_R",
259			  "MIPI_DPI_D10_R",
260			  "",
261			  "",
262			  "MIPI_DPI_DE_R",
263			  "MIPI_DPI_D11_R",
264			  "MIPI_DPI_VSYNC_R",
265			  "MIPI_DPI_CLK_R",
266			  "MIPI_DPI_HSYNC_R",
267			  "PCM_BT_DATAIN",
268			  "PCM_BT_SYNC",
269			  "PCM_BT_DATAOUT",
270			  "PCM_BT_CLK",
271			  "AP_I2C_AUDIO_SCL",
272			  "AP_I2C_AUDIO_SDA",
273			  "SCP_I2C_SCL",
274			  "SCP_I2C_SDA",
275			  "AP_I2C_WLAN_SCL",
276			  "AP_I2C_WLAN_SDA",
277			  "AP_I2C_DPBRDG_SCL",
278			  "AP_I2C_DPBRDG_SDA",
279			  "EN_PP1800_DPBRDG_DX",
280			  "EN_PP3300_EDP_DX",
281			  "EN_PP1800_EDPBRDG_DX",
282			  "EN_PP1000_EDPBRDG",
283			  "SCP_JTAG0_TDO",
284			  "SCP_JTAG0_TDI",
285			  "SCP_JTAG0_TMS",
286			  "SCP_JTAG0_TCK",
287			  "SCP_JTAG0_TRSTN",
288			  "EN_PP3000_VMC_PMU",
289			  "EN_PP3300_DISPLAY_DX",
290			  "TOUCH_RST_L_1V8",
291			  "TOUCH_REPORT_DISABLE",
292			  "",
293			  "",
294			  "AP_I2C_TRACKPAD_SCL_1V8",
295			  "AP_I2C_TRACKPAD_SDA_1V8",
296			  "EN_PP3300_WLAN",
297			  "BT_KILL_L",
298			  "WIFI_KILL_L",
299			  "SET_VMC_VOLT_AT_1V8",
300			  "EN_SPK",
301			  "AP_WARM_RST_REQ",
302			  "",
303			  "",
304			  "EN_PP3000_SD_S3",
305			  "AP_EDP_BKLTEN",
306			  "",
307			  "",
308			  "",
309			  "AP_SPI_EC_CLK",
310			  "AP_SPI_EC_CS_L",
311			  "AP_SPI_EC_MISO",
312			  "AP_SPI_EC_MOSI",
313			  "AP_I2C_EDPBRDG_SCL",
314			  "AP_I2C_EDPBRDG_SDA",
315			  "MT6315_PROC_INT",
316			  "MT6315_GPU_INT",
317			  "UART_SERVO_TX_SCP_RX",
318			  "UART_SCP_TX_SERVO_RX",
319			  "BT_RTS_AP_CTS",
320			  "AP_RTS_BT_CTS",
321			  "UART_AP_WAKE_BT_ODL",
322			  "WLAN_ALERT_ODL",
323			  "EC_IN_RW_ODL",
324			  "H1_AP_INT_ODL",
325			  "",
326			  "",
327			  "",
328			  "",
329			  "",
330			  "",
331			  "",
332			  "",
333			  "",
334			  "",
335			  "",
336			  "MSDC0_CMD",
337			  "MSDC0_DAT0",
338			  "MSDC0_DAT2",
339			  "MSDC0_DAT4",
340			  "MSDC0_DAT6",
341			  "MSDC0_DAT1",
342			  "MSDC0_DAT5",
343			  "MSDC0_DAT7",
344			  "MSDC0_DSL",
345			  "MSDC0_CLK",
346			  "MSDC0_DAT3",
347			  "MSDC0_RST_L",
348			  "SCP_VREQ_VAO",
349			  "AUD_DAT_MOSI2",
350			  "AUD_NLE_MOSI1",
351			  "AUD_NLE_MOSI0",
352			  "AUD_DAT_MISO2",
353			  "AP_I2C_SAR_SDA",
354			  "AP_I2C_SAR_SCL",
355			  "AP_I2C_PWR_SCL",
356			  "AP_I2C_PWR_SDA",
357			  "AP_I2C_TS_SCL_1V8",
358			  "AP_I2C_TS_SDA_1V8",
359			  "SRCLKENA0",
360			  "SRCLKENA1",
361			  "AP_EC_WATCHDOG_L",
362			  "PWRAP_SPI0_MI",
363			  "PWRAP_SPI0_CSN",
364			  "PWRAP_SPI0_MO",
365			  "PWRAP_SPI0_CK",
366			  "AP_RTC_CLK32K",
367			  "AUD_CLK_MOSI",
368			  "AUD_SYNC_MOSI",
369			  "AUD_DAT_MOSI0",
370			  "AUD_DAT_MOSI1",
371			  "AUD_DAT_MISO0",
372			  "AUD_DAT_MISO1";
373
374	cr50_int: cr50-irq-default-pins {
375		pins-gsc-ap-int-odl {
376			pinmux = <PINMUX_GPIO171__FUNC_GPIO171>;
377			input-enable;
378		};
379	};
380
381	cros_ec_int: cros-ec-irq-default-pins {
382		pins-ec-ap-int-odl {
383			pinmux = <PINMUX_GPIO5__FUNC_GPIO5>;
384			input-enable;
385			bias-pull-up;
386		};
387	};
388
389	i2c0_pins: i2c0-default-pins {
390		pins-bus {
391			pinmux = <PINMUX_GPIO204__FUNC_SCL0>,
392				 <PINMUX_GPIO205__FUNC_SDA0>;
393			bias-pull-up = <MTK_PULL_SET_RSEL_011>;
394			drive-strength-microamp = <1000>;
395		};
396	};
397
398	i2c1_pins: i2c1-default-pins {
399		pins-bus {
400			pinmux = <PINMUX_GPIO118__FUNC_SCL1>,
401				 <PINMUX_GPIO119__FUNC_SDA1>;
402			bias-pull-up = <MTK_PULL_SET_RSEL_011>;
403			drive-strength-microamp = <1000>;
404		};
405	};
406
407	i2c2_pins: i2c2-default-pins {
408		pins-bus {
409			pinmux = <PINMUX_GPIO141__FUNC_SCL2>,
410				 <PINMUX_GPIO142__FUNC_SDA2>;
411			bias-pull-up = <MTK_PULL_SET_RSEL_011>;
412		};
413	};
414
415	i2c3_pins: i2c3-default-pins {
416		pins-bus {
417			pinmux = <PINMUX_GPIO160__FUNC_SCL3>,
418				 <PINMUX_GPIO161__FUNC_SDA3>;
419			bias-disable;
420			drive-strength-microamp = <1000>;
421		};
422	};
423
424	i2c7_pins: i2c7-default-pins {
425		pins-bus {
426			pinmux = <PINMUX_GPIO124__FUNC_SCL7>,
427				 <PINMUX_GPIO125__FUNC_SDA7>;
428			bias-disable;
429			drive-strength-microamp = <1000>;
430		};
431	};
432
433	spi1_pins: spi1-default-pins {
434		pins-cs-mosi-clk {
435			pinmux = <PINMUX_GPIO157__FUNC_SPI1_A_CSB>,
436				 <PINMUX_GPIO159__FUNC_SPI1_A_MO>,
437				 <PINMUX_GPIO156__FUNC_SPI1_A_CLK>;
438			bias-disable;
439		};
440
441		pins-miso {
442			pinmux = <PINMUX_GPIO158__FUNC_SPI1_A_MI>;
443			bias-pull-down;
444		};
445	};
446
447	spi5_pins: spi5-default-pins {
448		pins-bus {
449			pinmux = <PINMUX_GPIO38__FUNC_SPI5_A_MI>,
450				 <PINMUX_GPIO37__FUNC_GPIO37>,
451				 <PINMUX_GPIO39__FUNC_SPI5_A_MO>,
452				 <PINMUX_GPIO36__FUNC_SPI5_A_CLK>;
453			bias-disable;
454		};
455	};
456
457	trackpad_pins: trackpad-default-pins {
458		pins-int-n {
459			pinmux = <PINMUX_GPIO15__FUNC_GPIO15>;
460			input-enable;
461			bias-pull-up = <MTK_PUPD_SET_R1R0_11>;
462		};
463	};
464
465	touchscreen_pins: touchscreen-default-pins {
466		pins-irq {
467			pinmux = <PINMUX_GPIO21__FUNC_GPIO21>;
468			input-enable;
469			bias-pull-up;
470		};
471
472		pins-reset {
473			pinmux = <PINMUX_GPIO137__FUNC_GPIO137>;
474			output-high;
475		};
476
477		pins-report-sw {
478			pinmux = <PINMUX_GPIO138__FUNC_GPIO138>;
479			output-low;
480		};
481	};
482};
483
484&spi1 {
485	status = "okay";
486
487	mediatek,pad-select = <0>;
488	pinctrl-names = "default";
489	pinctrl-0 = <&spi1_pins>;
490
491	cros_ec: ec@0 {
492		compatible = "google,cros-ec-spi";
493		reg = <0>;
494		interrupts-extended = <&pio 5 IRQ_TYPE_LEVEL_LOW>;
495		spi-max-frequency = <3000000>;
496		pinctrl-names = "default";
497		pinctrl-0 = <&cros_ec_int>;
498
499		#address-cells = <1>;
500		#size-cells = <0>;
501
502		base_detection: cbas {
503			compatible = "google,cros-cbas";
504		};
505
506		cros_ec_pwm: pwm {
507			compatible = "google,cros-ec-pwm";
508			#pwm-cells = <1>;
509
510			status = "disabled";
511		};
512
513		i2c_tunnel: i2c-tunnel {
514			compatible = "google,cros-ec-i2c-tunnel";
515			google,remote-bus = <0>;
516			#address-cells = <1>;
517			#size-cells = <0>;
518		};
519
520		mt6360_ldo3_reg: regulator@0 {
521			compatible = "google,cros-ec-regulator";
522			reg = <0>;
523			regulator-min-microvolt = <1800000>;
524			regulator-max-microvolt = <3300000>;
525		};
526
527		mt6360_ldo5_reg: regulator@1 {
528			compatible = "google,cros-ec-regulator";
529			reg = <1>;
530			regulator-min-microvolt = <3300000>;
531			regulator-max-microvolt = <3300000>;
532		};
533
534		typec {
535			compatible = "google,cros-ec-typec";
536			#address-cells = <1>;
537			#size-cells = <0>;
538
539			usb_c0: connector@0 {
540				compatible = "usb-c-connector";
541				reg = <0>;
542				label = "left";
543				power-role = "dual";
544				data-role = "host";
545				try-power-role = "source";
546			};
547
548			usb_c1: connector@1 {
549				compatible = "usb-c-connector";
550				reg = <1>;
551				label = "right";
552				power-role = "dual";
553				data-role = "host";
554				try-power-role = "source";
555			};
556		};
557	};
558};
559
560&spi5 {
561	status = "okay";
562
563	cs-gpios = <&pio 37 GPIO_ACTIVE_LOW>;
564	mediatek,pad-select = <0>;
565	pinctrl-names = "default";
566	pinctrl-0 = <&spi5_pins>;
567
568	cr50@0 {
569		compatible = "google,cr50";
570		reg = <0>;
571		interrupts-extended = <&pio 171 IRQ_TYPE_EDGE_RISING>;
572		spi-max-frequency = <1000000>;
573		pinctrl-names = "default";
574		pinctrl-0 = <&cr50_int>;
575	};
576};
577
578&uart0 {
579	status = "okay";
580};
581
582#include <arm/cros-ec-keyboard.dtsi>
583#include <arm/cros-ec-sbs.dtsi>
584