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/openbmc/linux/drivers/net/ethernet/mediatek/
H A Dmtk_wed_mcu.c1 // SPDX-License-Identifier: GPL-2.0-only
19 static u32 wo_r32(struct mtk_wed_wo *wo, u32 reg) in wo_r32() argument
21 return readl(wo->boot.addr + reg); in wo_r32()
24 static void wo_w32(struct mtk_wed_wo *wo, u32 reg, u32 val) in wo_w32() argument
26 writel(val, wo->boot.addr + reg); in wo_w32()
30 mtk_wed_mcu_msg_alloc(const void *data, int data_len) in mtk_wed_mcu_msg_alloc() argument
39 memset(skb->head, 0, length); in mtk_wed_mcu_msg_alloc()
41 if (data && data_len) in mtk_wed_mcu_msg_alloc()
42 skb_put_data(skb, data, data_len); in mtk_wed_mcu_msg_alloc()
48 mtk_wed_mcu_get_response(struct mtk_wed_wo *wo, unsigned long expires) in mtk_wed_mcu_get_response() argument
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H A Dmtk_wed_wo.c1 // SPDX-License-Identifier: GPL-2.0-only
9 #include <linux/dma-mapping.h>
21 mtk_wed_mmio_r32(struct mtk_wed_wo *wo, u32 reg) in mtk_wed_mmio_r32() argument
25 if (regmap_read(wo->mmio.regs, reg, &val)) in mtk_wed_mmio_r32()
32 mtk_wed_mmio_w32(struct mtk_wed_wo *wo, u32 reg, u32 val) in mtk_wed_mmio_w32() argument
34 regmap_write(wo->mmio.regs, reg, val); in mtk_wed_mmio_w32()
38 mtk_wed_wo_get_isr(struct mtk_wed_wo *wo) in mtk_wed_wo_get_isr() argument
40 u32 val = mtk_wed_mmio_r32(wo, MTK_WED_WO_CCIF_RCHNUM); in mtk_wed_wo_get_isr()
46 mtk_wed_wo_set_isr(struct mtk_wed_wo *wo, u32 mask) in mtk_wed_wo_set_isr() argument
48 mtk_wed_mmio_w32(wo, MTK_WED_WO_CCIF_IRQ0_MASK, mask); in mtk_wed_wo_set_isr()
[all …]
H A Dmtk_wed_wo.h1 /* SPDX-License-Identifier: GPL-2.0-only */
256 mtk_wed_mcu_check_msg(struct mtk_wed_wo *wo, struct sk_buff *skb) in mtk_wed_mcu_check_msg() argument
258 struct mtk_wed_mcu_hdr *hdr = (struct mtk_wed_mcu_hdr *)skb->data; in mtk_wed_mcu_check_msg()
260 if (hdr->version) in mtk_wed_mcu_check_msg()
261 return -EINVAL; in mtk_wed_mcu_check_msg()
263 if (skb->len < sizeof(*hdr) || skb->len != le16_to_cpu(hdr->length)) in mtk_wed_mcu_check_msg()
264 return -EINVAL; in mtk_wed_mcu_check_msg()
269 void mtk_wed_mcu_rx_event(struct mtk_wed_wo *wo, struct sk_buff *skb);
270 void mtk_wed_mcu_rx_unsolicited_event(struct mtk_wed_wo *wo,
272 int mtk_wed_mcu_send_msg(struct mtk_wed_wo *wo, int id, int cmd,
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/openbmc/linux/Documentation/devicetree/bindings/arm/mediatek/
H A Dmediatek,mt7622-wed.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/arm/mediatek/mediatek,mt7622-wed.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Lorenzo Bianconi <lorenzo@kernel.org>
11 - Felix Fietkau <nbd@nbd.name>
21 - enum:
22 - mediatek,mt7622-wed
23 - mediatek,mt7981-wed
24 - mediatek,mt7986-wed
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/openbmc/linux/arch/sparc/include/uapi/asm/
H A Dasi.h1 /* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */
37 /* SPARCstation-5: only 6 bits are decoded. */
38 /* wo = Write Only, rw = Read Write; */
53 #define ASI_M_TXTC_DATA 0x0D /* Instruction Cache Data; rw, ss */
54 #define ASI_M_DATAC_TAG 0x0E /* Data Cache Tag; rw, ss */
55 #define ASI_M_DATAC_DATA 0x0F /* Data Cache Data; rw, ss */
63 #define ASI_M_FLUSH_PAGE 0x10 /* Flush I&D Cache Line (page); wo, ss */
64 #define ASI_M_FLUSH_SEG 0x11 /* Flush I&D Cache Line (seg); wo, ss */
65 #define ASI_M_FLUSH_REGION 0x12 /* Flush I&D Cache Line (region); wo, ss */
66 #define ASI_M_FLUSH_CTX 0x13 /* Flush I&D Cache Line (context); wo, ss */
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/openbmc/linux/arch/arm64/boot/dts/mediatek/
H A Dmt7986a.dtsi1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
7 #include <dt-bindings/interrupt-controller/irq.h>
8 #include <dt-bindings/interrupt-controller/arm-gic.h>
9 #include <dt-bindings/clock/mt7986-clk.h>
10 #include <dt-bindings/reset/mt7986-resets.h>
11 #include <dt-bindings/phy/phy.h>
15 interrupt-parent = <&gic>;
16 #address-cells = <2>;
17 #size-cells = <2>;
20 #address-cells = <1>;
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/openbmc/qemu/target/sparc/
H A Dasi.h36 /* SPARCstation-5: only 6 bits are decoded. */
37 /* wo = Write Only, rw = Read Write; */
52 #define ASI_M_TXTC_DATA 0x0D /* Instruction Cache Data; rw, ss */
53 #define ASI_M_DATAC_TAG 0x0E /* Data Cache Tag; rw, ss */
54 #define ASI_M_DATAC_DATA 0x0F /* Data Cache Data; rw, ss */
62 #define ASI_M_FLUSH_PAGE 0x10 /* Flush I&D Cache Line (page); wo, ss */
63 #define ASI_M_FLUSH_SEG 0x11 /* Flush I&D Cache Line (seg); wo, ss */
64 #define ASI_M_FLUSH_REGION 0x12 /* Flush I&D Cache Line (region); wo, ss */
65 #define ASI_M_FLUSH_CTX 0x13 /* Flush I&D Cache Line (context); wo, ss */
66 #define ASI_M_FLUSH_USER 0x14 /* Flush I&D Cache Line (user); wo, ss */
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/openbmc/linux/drivers/comedi/drivers/
H A Dni_atmio16d.c1 // SPDX-License-Identifier: GPL-2.0+
3 * Comedi driver for National Instruments AT-MIO16D board
9 * Description: National Instruments AT-MIO-16D
12 * Devices: [National Instruments] AT-MIO-16 (atmio16), AT-MIO-16D (atmio16d)
15 * [0] - I/O port
16 * [1] - MIO irq (0 == no irq; or 3,4,5,6,7,9,10,11,12,14,15)
17 * [2] - DIO irq (0 == no irq; or 3,4,5,6,7,9)
18 * [3] - DMA1 channel (0 == no DMA; or 5,6,7)
19 * [4] - DMA2 channel (0 == no DMA; or 5,6,7)
20 * [5] - a/d mux (0=differential; 1=single)
[all …]
H A Dni_daq_700.c1 // SPDX-License-Identifier: GPL-2.0+
4 * Driver for DAQCard-700 DIO/AI
7 * COMEDI - Linux Control and Measurement Device Interface
13 * Description: National Instruments PCMCIA DAQCard-700
16 * Devices: [National Instruments] PCMCIA DAQ-Card-700 (ni_daq_700)
20 * The daqcard-700 appears in Comedi as a digital I/O subdevice (0) with
21 * 16 channels and a analog input subdevice (1) with 16 single-ended channels
24 * Digital: The channel 0 corresponds to the daqcard-700's output
27 * Digital direction configuration: channels 0-7 output, 8-15 input.
29 * Analog: The input range is 0 to 4095 with a default of -10 to +10 volts.
[all …]
H A Dcb_das16_cs.c1 // SPDX-License-Identifier: GPL-2.0+
4 * Driver for Computer Boards PC-CARD DAS16/16.
6 * COMEDI - Linux Control and Measurement Device Interface
19 * Description: Computer Boards PC-CARD DAS16/16
20 * Devices: [ComputerBoards] PC-CARD DAS16/16 (cb_das16_cs),
21 * PC-CARD DAS16/16-AO
23 * Updated: Mon, 04 Nov 2002 20:04:21 -0800
52 #define DAS16CS_MISC1_OVR BIT(10) /* ro - 1=FIFO overflow */
59 #define DAS16CS_MISC1_EOC BIT(7) /* ro - 0=busy; 1=ready */
61 #define DAS16CS_MISC1_INTB BIT(4) /* ro - 0=latched; 1=cleared */
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/openbmc/linux/drivers/scsi/
H A DNCR5380.h1 /* SPDX-License-Identifier: GPL-2.0 */
9 * +1 (303) 666-5836
19 * 1+ (719) 578-3400
20 * 1+ (800) 334-5454
64 * The contents of the OUTPUT DATA register are asserted on the bus when
65 * either arbitration is occurring or the phase-indicating signals (
66 * IO, CD, MSG) in the TARGET COMMAND register and the ASSERT DATA
70 #define OUTPUT_DATA_REG 0 /* wo DATA lines on SCSI bus */
76 #define ICR_TRI_STATE 0x40 /* wo Set to tri-state drivers */
78 #define ICR_DIFF_ENABLE 0x20 /* wo Set to enable diff. drivers */
[all …]
H A Desp_scsi.h1 /* SPDX-License-Identifier: GPL-2.0 */
13 #define ESP_FDATA 0x02UL /* rw FIFO data bits 0x08 */
16 #define ESP_BUSID ESP_STATUS /* wo BusID for sel/resel 0x10 */
18 #define ESP_TIMEO ESP_INTRPT /* wo Timeout for sel/resel 0x14 */
20 #define ESP_STP ESP_SSTEP /* wo Transfer period/sync 0x18 */
22 #define ESP_SOFF ESP_FFLAGS /* wo Sync offset 0x1c */
24 #define ESP_CFACT 0x09UL /* wo Clock conv factor 0x24 */
26 #define ESP_CTEST 0x0aUL /* wo Chip test register 0x28 */
33 #define ESP_FGRND 0x0fUL /* rw Data base for fifo 0x3c */
40 /* ESP config reg 1, read-write, found on all ESP chips */
[all …]
/openbmc/linux/drivers/gpu/drm/panfrost/
H A Dpanfrost_regs.h1 /* SPDX-License-Identifier: GPL-2.0 */
6 * (C) COPYRIGHT 2010-2018 ARM Limited. All rights reserved.
54 #define GPU_PWR_KEY 0x50 /* (WO) Power manager key register */
115 #define SHADER_PWRON_LO 0x180 /* (WO) Shader core power on bitmap, low word */
116 #define SHADER_PWRON_HI 0x184 /* (WO) Shader core power on bitmap, high word */
118 #define TILER_PWRON_LO 0x190 /* (WO) Tiler core power on bitmap, low word */
119 #define TILER_PWRON_HI 0x194 /* (WO) Tiler core power on bitmap, high word */
121 #define L2_PWRON_LO 0x1A0 /* (WO) Level 2 cache power on bitmap, low word */
122 #define L2_PWRON_HI 0x1A4 /* (WO) Level 2 cache power on bitmap, high word */
128 #define SHADER_PWROFF_LO 0x1C0 /* (WO) Shader core power off bitmap, low word */
[all …]
/openbmc/linux/kernel/
H A Dexit.c1 // SPDX-License-Identifier: GPL-2.0-only
44 #include <linux/posix-timers.h>
80 * overflowing 32-bit refcounts or the ldsem writer count.
88 .data = &oops_limit,
125 nr_threads--; in __unhash_process()
132 list_del_rcu(&p->tasks); in __unhash_process()
133 list_del_init(&p->sibling); in __unhash_process()
136 list_del_rcu(&p->thread_group); in __unhash_process()
137 list_del_rcu(&p->thread_node); in __unhash_process()
141 * This function expects the tasklist_lock write-locked.
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/openbmc/linux/tools/testing/selftests/powerpc/ptrace/
H A Dptrace-hwbreak.c1 // SPDX-License-Identifier: GPL-2.0+
56 exit(-1); in get_dbginfo()
62 return !!(dbginfo->features & PPC_DEBUG_FEATURE_DATA_BP_DAWR); in dawr_present()
123 exit(-1); in test_workload()
129 /* PTRACE_SET_DEBUGREG, WO test */ in test_workload()
148 /* PPC_PTRACE_SETHWDEBUG, MODE_EXACT, WO test */ in test_workload()
163 /* PPC_PTRACE_SETHWDEBUG, MODE_RANGE, DW ALIGNED, WO test */ in test_workload()
175 /* PPC_PTRACE_SETHWDEBUG, MODE_RANGE, DW UNALIGNED, WO test */ in test_workload()
199 /* PPC_PTRACE_SETHWDEBUG 2, MODE_RANGE, DW ALIGNED, WO test */ in test_workload()
205 /* PPC_PTRACE_SETHWDEBUG 2, MODE_RANGE, DAWR Overlap, WO test */ in test_workload()
[all …]
/openbmc/linux/Documentation/ABI/testing/
H A Dsysfs-bus-rbd6 (WO) Add rbd block device.
14 The snapshot name can be "-" or omitted to map the image
15 read/write. A <dev-id> will be assigned for any registered block
16 device. If snapshot is used, it will be mapped read-only.
24 (WO) Remove rbd block device.
26 Usage: <dev-id> [force]
43 (WO) Available only if rbd module is inserted with single_major
57 (WO) Available only if rbd module is inserted with single_major
76 What: /sys/bus/rbd/devices/<dev-id>/size
77 What: /sys/bus/rbd/devices/<dev-id>/major
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H A Dsysfs-bus-cxl4 Contact: linux-cxl@vger.kernel.org
6 (WO) If userspace manually unbinds a port the kernel schedules
14 Contact: linux-cxl@vger.kernel.org
17 Memory Device Output Payload in the CXL-2.0
24 Contact: linux-cxl@vger.kernel.org
28 Payload in the CXL-2.0 specification.
34 Contact: linux-cxl@vger.kernel.org
38 Payload in the CXL-2.0 specification.
44 Contact: linux-cxl@vger.kernel.org
46 (RO) 64-bit serial number per the PCIe Device Serial Number
[all …]
H A Dsysfs-driver-intel_sdsi24 EOVERFLOW For provision commands, the size of the data
38 is available at http://github.com/intel/intel-sdsi
49 http://github.com/intel/intel-sdsi
56 (WO) Used to write an Authentication Key Certificate (AKC) to
65 (WO) Used to write a Capability Activation Payload (CAP) to the
/openbmc/linux/drivers/hwtracing/coresight/
H A Dcoresight-cti.h1 /* SPDX-License-Identifier: GPL-2.0 */
18 #include "coresight-priv.h"
22 * 0x000 - 0x144: CTI programming and status
23 * 0xEDC - 0xEF8: CTI integration test.
24 * 0xF00 - 0xFFC: Coresight management registers.
41 #define ITCHINACK 0xEDC /* WO CTI CSSoc 400 only*/
42 #define ITTRIGINACK 0xEE0 /* WO CTI CSSoc 400 only*/
43 #define ITCHOUT 0xEE4 /* WO RW-600 */
44 #define ITTRIGOUT 0xEE8 /* WO RW-600 */
55 * CTI CSSoc 400 has 8 IO triggers - other CTIs can be impl def.
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/openbmc/u-boot/drivers/gpio/
H A Dzynq_gpio.c1 // SPDX-License-Identifier: GPL-2.0+
7 * Most of code taken from linux kernel driver (linux/drivers/gpio/gpio-zynq.c)
8 * Copyright (C) 2009 - 2014 Xilinx, Inc.
44 ZYNQ##str##_GPIO_BANK0_NGPIO - 1)
47 ZYNQ##str##_GPIO_BANK1_NGPIO - 1)
50 ZYNQ##str##_GPIO_BANK2_NGPIO - 1)
53 ZYNQ##str##_GPIO_BANK3_NGPIO - 1)
56 ZYNQ##str##_GPIO_BANK4_NGPIO - 1)
59 ZYNQ##str##_GPIO_BANK5_NGPIO - 1)
62 /* LSW Mask & Data -WO */
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/openbmc/linux/drivers/scsi/aic7xxx/
H A Daic79xx.reg4 * Copyright (c) 1994-2001, 2004 Justin T. Gibbs.
5 * Copyright (c) 2000-2002 Adaptec Inc.
19 * 3. Neither the names of the above-listed copyright holders nor the names
34 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
62 if ((ahd->bugs & AHD_SET_MODE_BUG) != 0) { \
69 if ((ahd->bugs & AHD_SET_MODE_BUG) != 0) { \
76 if ((ahd->bugs & AHD_INTCOLLISION_BUG) != 0) { \
142 * Returned to data phase
143 * that requires data
187 * A command with a non-zero
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H A Daic7xxx.reg4 * Copyright (c) 1994-2001 Justin T. Gibbs.
5 * Copyright (c) 2000-2001 Adaptec Inc.
19 * 3. Neither the names of the above-listed copyright holders nor the names
34 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
49 * All page numbers refer to the Adaptec AIC-7770 Data Book available from
50 * Adaptec's Technical Documents Department 1-800-934-2766
65 * SCSI Sequence Control (p. 3-11).
82 * SCSI Transfer Control 0 Register (pp. 3-13).
83 * Controls the SCSI module data path.
98 * SCSI Transfer Control 1 Register (pp. 3-14,15).
[all …]
/openbmc/linux/drivers/media/pci/cx88/
H A Dcx88-reg.h1 /* SPDX-License-Identifier: GPL-2.0-or-later */
3 * cx88x-hw.h - CX2388x register offsets
5 * Copyright (C) 1996,97,98 Ralph Metzler (rjkm@thp.uni-koeln.de)
92 // DMA Channels 1-6 belong to SPIPE
96 // DMA Channels 9-20 belong to SPIPE
202 #define MO_VIDY_GPCNTRL 0x31C030 // {2}WO Video Y general purpose control
203 #define MO_VIDU_GPCNTRL 0x31C034 // {2}WO Video U general purpose control
204 #define MO_VIDV_GPCNTRL 0x31C038 // {2}WO Video V general purpose control
205 #define MO_VBI_GPCNTRL 0x31C03C // {2}WO VBI general purpose counter
219 #define MO_AUDD_GPCNTRL 0x32C030 // {2}WO Audio down general purpose control
[all …]
/openbmc/linux/drivers/spi/
H A Dspi-zynq-qspi.c1 // SPDX-License-Identifier: GPL-2.0+
18 #include <linux/spi/spi-mem.h>
23 #define ZYNQ_QSPI_IEN_OFFSET 0x08 /* Interrupt Enable Register, WO */
24 #define ZYNQ_QSPI_IDIS_OFFSET 0x0C /* Interrupt Disable Reg, WO */
28 #define ZYNQ_QSPI_TXD_00_00_OFFSET 0x1C /* Transmit 4-byte inst, WO */
29 #define ZYNQ_QSPI_TXD_00_01_OFFSET 0x80 /* Transmit 1-byte inst, WO */
30 #define ZYNQ_QSPI_TXD_00_10_OFFSET 0x84 /* Transmit 2-byte inst, WO */
31 #define ZYNQ_QSPI_TXD_00_11_OFFSET 0x88 /* Transmit 3-byte inst, WO */
32 #define ZYNQ_QSPI_RXD_OFFSET 0x20 /* Data Receive Register, RO */
57 * QSPI Configuration Register - Baud rate and slave select
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/openbmc/linux/Documentation/admin-guide/blockdev/
H A Dzram.rst2 zram: Compressed RAM-based block devices
8 The zram module creates RAM-based block devices named /dev/zram<id>
20 There are several ways to configure and manage zram device(-s):
23 b) using zramctl utility, provided by util-linux (util-linux@vger.kernel.org).
28 In order to get a better idea about zramctl please consult util-linux
29 documentation, zramctl man-page or `zramctl --help`. Please be informed
30 that zram maintainers do not develop/maintain util-linux or zramctl, should
31 you have any questions please contact util-linux@vger.kernel.org
45 -EBUSY an attempt to modify an attribute that cannot be changed once
47 -ENOMEM zram was not able to allocate enough memory to fulfil your
[all …]

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