Lines Matching +full:wo +full:- +full:data
1 /* SPDX-License-Identifier: GPL-2.0-or-later */
3 * cx88x-hw.h - CX2388x register offsets
5 * Copyright (C) 1996,97,98 Ralph Metzler (rjkm@thp.uni-koeln.de)
92 // DMA Channels 1-6 belong to SPIPE
96 // DMA Channels 9-20 belong to SPIPE
202 #define MO_VIDY_GPCNTRL 0x31C030 // {2}WO Video Y general purpose control
203 #define MO_VIDU_GPCNTRL 0x31C034 // {2}WO Video U general purpose control
204 #define MO_VIDV_GPCNTRL 0x31C038 // {2}WO Video V general purpose control
205 #define MO_VBI_GPCNTRL 0x31C03C // {2}WO VBI general purpose counter
219 #define MO_AUDD_GPCNTRL 0x32C030 // {2}WO Audio down general purpose control
220 #define MO_AUDU_GPCNTRL 0x32C034 // {2}WO Audio up general purpose control
221 #define MO_AUDR_GPCNTRL 0x32C038 // {2}WO Audio RDS general purpose control
435 #define MO_TS_GPCNTRL 0x33C030 // {2}WO TS general purpose control
455 #define MO_VIPD_GPCNTRL 0x34C030 // {2}WO VIP down general purpose control
456 #define MO_VIPU_GPCNTRL 0x34C034 // {2}WO VIP up general purpose control
478 #define MO_GP_ISM 0x350028 // {16}WO GPIO Intr Sens/Pol
482 #define MO_M2M_XSUM 0x35C028 // {32}RO M2M XOR-Checksum
484 #define MO_CRC_D 0x35C030 // {32}WO CRC16 new data in
505 #define MO_I2C 0x368000 // I2C data/control
528 #define MO_GPHST_MUX16 0x380064 // Host muxed 16-bit transfer parameters