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/openbmc/linux/drivers/net/phy/
H A Dphy.c61 static void phy_process_state_change(struct phy_device *phydev, in phy_process_state_change() argument
64 if (old_state != phydev->state) { in phy_process_state_change()
65 phydev_dbg(phydev, "PHY state change %s -> %s\n", in phy_process_state_change()
67 phy_state_to_str(phydev->state)); in phy_process_state_change()
68 if (phydev->drv && phydev->drv->link_change_notify) in phy_process_state_change()
69 phydev->drv->link_change_notify(phydev); in phy_process_state_change()
73 static void phy_link_up(struct phy_device *phydev) in phy_link_up() argument
75 phydev->phy_link_change(phydev, true); in phy_link_up()
76 phy_led_trigger_change_speed(phydev); in phy_link_up()
79 static void phy_link_down(struct phy_device *phydev) in phy_link_down() argument
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H A Dphy-c45.c15 * @phydev: target phy_device struct
17 static bool genphy_c45_baset1_able(struct phy_device *phydev) in genphy_c45_baset1_able() argument
21 if (phydev->pma_extable == -ENODATA) { in genphy_c45_baset1_able()
22 val = phy_read_mmd(phydev, MDIO_MMD_PMAPMD, MDIO_PMA_EXTABLE); in genphy_c45_baset1_able()
26 phydev->pma_extable = val; in genphy_c45_baset1_able()
29 return !!(phydev->pma_extable & MDIO_PMA_EXTABLE_BT1); in genphy_c45_baset1_able()
34 * @phydev: target phy_device struct
36 static bool genphy_c45_pma_can_sleep(struct phy_device *phydev) in genphy_c45_pma_can_sleep() argument
40 stat1 = phy_read_mmd(phydev, MDIO_MMD_PMAPMD, MDIO_STAT1); in genphy_c45_pma_can_sleep()
49 * @phydev: target phy_device struct
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H A Dphy_device.c238 void phy_device_free(struct phy_device *phydev) in phy_device_free() argument
240 put_device(&phydev->mdio.dev); in phy_device_free()
246 struct phy_device *phydev; in phy_mdio_device_free() local
248 phydev = container_of(mdiodev, struct phy_device, mdio); in phy_mdio_device_free()
249 phy_device_free(phydev); in phy_mdio_device_free()
260 struct phy_device *phydev; in phy_mdio_device_remove() local
262 phydev = container_of(mdiodev, struct phy_device, mdio); in phy_mdio_device_remove()
263 phy_device_remove(phydev); in phy_mdio_device_remove()
271 static bool mdio_bus_phy_may_suspend(struct phy_device *phydev) in mdio_bus_phy_may_suspend() argument
273 struct device_driver *drv = phydev->mdio.dev.driver; in mdio_bus_phy_may_suspend()
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H A Drealtek.c87 static int rtl821x_read_page(struct phy_device *phydev) in rtl821x_read_page() argument
89 return __phy_read(phydev, RTL821x_PAGE_SELECT); in rtl821x_read_page()
92 static int rtl821x_write_page(struct phy_device *phydev, int page) in rtl821x_write_page() argument
94 return __phy_write(phydev, RTL821x_PAGE_SELECT, page); in rtl821x_write_page()
97 static int rtl821x_probe(struct phy_device *phydev) in rtl821x_probe() argument
99 struct device *dev = &phydev->mdio.dev; in rtl821x_probe()
101 u32 phy_id = phydev->drv->phy_id; in rtl821x_probe()
113 ret = phy_read_paged(phydev, 0xa43, RTL8211F_PHYCR1); in rtl821x_probe()
123 ret = phy_read_paged(phydev, 0xa43, RTL8211F_PHYCR2); in rtl821x_probe()
132 phydev->priv = priv; in rtl821x_probe()
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H A Dbcm-phy-lib.c21 int __bcm_phy_write_exp(struct phy_device *phydev, u16 reg, u16 val) in __bcm_phy_write_exp() argument
25 rc = __phy_write(phydev, MII_BCM54XX_EXP_SEL, reg); in __bcm_phy_write_exp()
29 return __phy_write(phydev, MII_BCM54XX_EXP_DATA, val); in __bcm_phy_write_exp()
33 int bcm_phy_write_exp(struct phy_device *phydev, u16 reg, u16 val) in bcm_phy_write_exp() argument
37 phy_lock_mdio_bus(phydev); in bcm_phy_write_exp()
38 rc = __bcm_phy_write_exp(phydev, reg, val); in bcm_phy_write_exp()
39 phy_unlock_mdio_bus(phydev); in bcm_phy_write_exp()
45 int __bcm_phy_read_exp(struct phy_device *phydev, u16 reg) in __bcm_phy_read_exp() argument
49 val = __phy_write(phydev, MII_BCM54XX_EXP_SEL, reg); in __bcm_phy_read_exp()
53 val = __phy_read(phydev, MII_BCM54XX_EXP_DATA); in __bcm_phy_read_exp()
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H A Dvitesse.c83 static int vsc824x_add_skew(struct phy_device *phydev) in vsc824x_add_skew() argument
88 extcon = phy_read(phydev, MII_VSC8244_EXT_CON1); in vsc824x_add_skew()
99 err = phy_write(phydev, MII_VSC8244_EXT_CON1, extcon); in vsc824x_add_skew()
104 static int vsc824x_config_init(struct phy_device *phydev) in vsc824x_config_init() argument
108 err = phy_write(phydev, MII_VSC8244_AUX_CONSTAT, in vsc824x_config_init()
113 if (phydev->interface == PHY_INTERFACE_MODE_RGMII_ID) in vsc824x_config_init()
114 err = vsc824x_add_skew(phydev); in vsc824x_config_init()
121 static int vsc73xx_read_page(struct phy_device *phydev) in vsc73xx_read_page() argument
123 return __phy_read(phydev, VSC73XX_EXT_PAGE_ACCESS); in vsc73xx_read_page()
126 static int vsc73xx_write_page(struct phy_device *phydev, int page) in vsc73xx_write_page() argument
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H A Dmarvell-88x2222.c63 static int mv2222_tx_enable(struct phy_device *phydev) in mv2222_tx_enable() argument
65 return phy_clear_bits_mmd(phydev, MDIO_MMD_PMAPMD, MDIO_PMA_TXDIS, in mv2222_tx_enable()
70 static int mv2222_tx_disable(struct phy_device *phydev) in mv2222_tx_disable() argument
72 return phy_set_bits_mmd(phydev, MDIO_MMD_PMAPMD, MDIO_PMA_TXDIS, in mv2222_tx_disable()
76 static int mv2222_soft_reset(struct phy_device *phydev) in mv2222_soft_reset() argument
80 ret = phy_write_mmd(phydev, MDIO_MMD_VEND2, MV_PORT_RST, in mv2222_soft_reset()
85 return phy_read_mmd_poll_timeout(phydev, MDIO_MMD_VEND2, MV_PORT_RST, in mv2222_soft_reset()
90 static int mv2222_disable_aneg(struct phy_device *phydev) in mv2222_disable_aneg() argument
92 int ret = phy_clear_bits_mmd(phydev, MDIO_MMD_PCS, MV_1GBX_CTRL, in mv2222_disable_aneg()
97 return mv2222_soft_reset(phydev); in mv2222_disable_aneg()
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H A Dmediatek-ge-soc.c315 static int mtk_socphy_read_page(struct phy_device *phydev) in mtk_socphy_read_page() argument
317 return __phy_read(phydev, MTK_EXT_PAGE_ACCESS); in mtk_socphy_read_page()
320 static int mtk_socphy_write_page(struct phy_device *phydev, int page) in mtk_socphy_write_page() argument
322 return __phy_write(phydev, MTK_EXT_PAGE_ACCESS, page); in mtk_socphy_write_page()
331 static int cal_cycle(struct phy_device *phydev, int devad, in cal_cycle() argument
337 phy_modify_mmd(phydev, devad, regnum, in cal_cycle()
339 phy_set_bits_mmd(phydev, MDIO_MMD_VEND1, MTK_PHY_RG_AD_CALIN, in cal_cycle()
342 ret = phy_read_mmd_poll_timeout(phydev, MDIO_MMD_VEND1, in cal_cycle()
347 phydev_err(phydev, "Calibration cycle timeout\n"); in cal_cycle()
351 phy_clear_bits_mmd(phydev, MDIO_MMD_VEND1, MTK_PHY_RG_AD_CALIN, in cal_cycle()
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H A Dat803x.c326 static int at803x_debug_reg_write(struct phy_device *phydev, u16 reg, u16 data) in at803x_debug_reg_write() argument
330 ret = phy_write(phydev, AT803X_DEBUG_ADDR, reg); in at803x_debug_reg_write()
334 return phy_write(phydev, AT803X_DEBUG_DATA, data); in at803x_debug_reg_write()
337 static int at803x_debug_reg_read(struct phy_device *phydev, u16 reg) in at803x_debug_reg_read() argument
341 ret = phy_write(phydev, AT803X_DEBUG_ADDR, reg); in at803x_debug_reg_read()
345 return phy_read(phydev, AT803X_DEBUG_DATA); in at803x_debug_reg_read()
348 static int at803x_debug_reg_mask(struct phy_device *phydev, u16 reg, in at803x_debug_reg_mask() argument
354 ret = at803x_debug_reg_read(phydev, reg); in at803x_debug_reg_mask()
362 return phy_write(phydev, AT803X_DEBUG_DATA, val); in at803x_debug_reg_mask()
365 static int at803x_write_page(struct phy_device *phydev, int page) in at803x_write_page() argument
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H A Dbroadcom.c24 #define BRCM_PHY_MODEL(phydev) \ argument
25 ((phydev)->drv->phy_id & (phydev)->drv->phy_id_mask)
27 #define BRCM_PHY_REV(phydev) \ argument
28 ((phydev)->drv->phy_id & ~((phydev)->drv->phy_id_mask))
41 static bool bcm54xx_phy_can_wakeup(struct phy_device *phydev) in bcm54xx_phy_can_wakeup() argument
43 struct bcm54xx_phy_priv *priv = phydev->priv; in bcm54xx_phy_can_wakeup()
45 return phy_interrupt_is_valid(phydev) || priv->wake_irq >= 0; in bcm54xx_phy_can_wakeup()
48 static int bcm54xx_config_clock_delay(struct phy_device *phydev) in bcm54xx_config_clock_delay() argument
53 val = bcm54xx_auxctl_read(phydev, MII_BCM54XX_AUXCTL_SHDWSEL_MISC); in bcm54xx_config_clock_delay()
55 if (phydev->interface == PHY_INTERFACE_MODE_RGMII || in bcm54xx_config_clock_delay()
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H A Dmarvell.c315 static int marvell_read_page(struct phy_device *phydev) in marvell_read_page() argument
317 return __phy_read(phydev, MII_MARVELL_PHY_PAGE); in marvell_read_page()
320 static int marvell_write_page(struct phy_device *phydev, int page) in marvell_write_page() argument
322 return __phy_write(phydev, MII_MARVELL_PHY_PAGE, page); in marvell_write_page()
325 static int marvell_set_page(struct phy_device *phydev, int page) in marvell_set_page() argument
327 return phy_write(phydev, MII_MARVELL_PHY_PAGE, page); in marvell_set_page()
330 static int marvell_ack_interrupt(struct phy_device *phydev) in marvell_ack_interrupt() argument
335 err = phy_read(phydev, MII_M1011_IEVENT); in marvell_ack_interrupt()
343 static int marvell_config_intr(struct phy_device *phydev) in marvell_config_intr() argument
347 if (phydev->interrupts == PHY_INTERRUPT_ENABLED) { in marvell_config_intr()
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H A Dmarvell10g.c145 bool (*has_downshift)(struct phy_device *phydev);
147 int (*get_mactype)(struct phy_device *phydev);
148 int (*set_mactype)(struct phy_device *phydev, int mactype);
150 int (*init_interface)(struct phy_device *phydev, int mactype);
153 int (*hwmon_read_temp_reg)(struct phy_device *phydev);
169 static const struct mv3310_chip *to_mv3310_chip(struct phy_device *phydev) in to_mv3310_chip() argument
171 return phydev->drv->driver_data; in to_mv3310_chip()
186 static int mv3310_hwmon_read_temp_reg(struct phy_device *phydev) in mv3310_hwmon_read_temp_reg() argument
188 return phy_read_mmd(phydev, MDIO_MMD_VEND2, MV_V2_TEMP); in mv3310_hwmon_read_temp_reg()
191 static int mv2110_hwmon_read_temp_reg(struct phy_device *phydev) in mv2110_hwmon_read_temp_reg() argument
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H A Dbcm7xxx.c50 static int bcm7xxx_28nm_d0_afe_config_init(struct phy_device *phydev) in bcm7xxx_28nm_d0_afe_config_init() argument
53 bcm_phy_write_misc(phydev, AFE_RXCONFIG_0, 0xeb15); in bcm7xxx_28nm_d0_afe_config_init()
56 bcm_phy_write_misc(phydev, AFE_RXCONFIG_1, 0x9b2f); in bcm7xxx_28nm_d0_afe_config_init()
59 bcm_phy_write_misc(phydev, AFE_RXCONFIG_2, 0x2003); in bcm7xxx_28nm_d0_afe_config_init()
62 bcm_phy_write_misc(phydev, AFE_RX_LP_COUNTER, 0x7fc0); in bcm7xxx_28nm_d0_afe_config_init()
65 bcm_phy_write_misc(phydev, AFE_TX_CONFIG, 0x431); in bcm7xxx_28nm_d0_afe_config_init()
68 bcm_phy_write_misc(phydev, AFE_VDCA_ICTRL_0, 0xa7da); in bcm7xxx_28nm_d0_afe_config_init()
71 bcm_phy_write_misc(phydev, AFE_VDAC_OTHERS_0, 0xa020); in bcm7xxx_28nm_d0_afe_config_init()
76 bcm_phy_write_misc(phydev, AFE_HPF_TRIM_OTHERS, 0x00e3); in bcm7xxx_28nm_d0_afe_config_init()
79 phy_write(phydev, MII_BRCM_CORE_BASE1E, 0x0010); in bcm7xxx_28nm_d0_afe_config_init()
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H A Dmicrochip.c24 static int lan88xx_read_page(struct phy_device *phydev) in lan88xx_read_page() argument
26 return __phy_read(phydev, LAN88XX_EXT_PAGE_ACCESS); in lan88xx_read_page()
29 static int lan88xx_write_page(struct phy_device *phydev, int page) in lan88xx_write_page() argument
31 return __phy_write(phydev, LAN88XX_EXT_PAGE_ACCESS, page); in lan88xx_write_page()
34 static int lan88xx_phy_config_intr(struct phy_device *phydev) in lan88xx_phy_config_intr() argument
38 if (phydev->interrupts == PHY_INTERRUPT_ENABLED) { in lan88xx_phy_config_intr()
40 rc = phy_write(phydev, LAN88XX_INT_MASK, 0x7FFF); in lan88xx_phy_config_intr()
41 rc = phy_read(phydev, LAN88XX_INT_STS); in lan88xx_phy_config_intr()
42 rc = phy_write(phydev, LAN88XX_INT_MASK, in lan88xx_phy_config_intr()
46 rc = phy_write(phydev, LAN88XX_INT_MASK, 0); in lan88xx_phy_config_intr()
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H A Ddp83869.c156 static int dp83869_read_status(struct phy_device *phydev) in dp83869_read_status() argument
158 struct dp83869_private *dp83869 = phydev->priv; in dp83869_read_status()
161 ret = genphy_read_status(phydev); in dp83869_read_status()
165 if (linkmode_test_bit(ETHTOOL_LINK_MODE_FIBRE_BIT, phydev->supported)) { in dp83869_read_status()
166 if (phydev->link) { in dp83869_read_status()
168 phydev->speed = SPEED_100; in dp83869_read_status()
170 phydev->speed = SPEED_UNKNOWN; in dp83869_read_status()
171 phydev->duplex = DUPLEX_UNKNOWN; in dp83869_read_status()
178 static int dp83869_ack_interrupt(struct phy_device *phydev) in dp83869_ack_interrupt() argument
180 int err = phy_read(phydev, MII_DP83869_ISR); in dp83869_ack_interrupt()
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H A Dbcm-phy-lib.h33 int __bcm_phy_write_exp(struct phy_device *phydev, u16 reg, u16 val);
34 int __bcm_phy_read_exp(struct phy_device *phydev, u16 reg);
35 int __bcm_phy_modify_exp(struct phy_device *phydev, u16 reg, u16 mask, u16 set);
36 int bcm_phy_write_exp(struct phy_device *phydev, u16 reg, u16 val);
37 int bcm_phy_read_exp(struct phy_device *phydev, u16 reg);
38 int bcm_phy_modify_exp(struct phy_device *phydev, u16 reg, u16 mask, u16 set);
40 static inline int bcm_phy_write_exp_sel(struct phy_device *phydev, in bcm_phy_write_exp_sel() argument
43 return bcm_phy_write_exp(phydev, reg | MII_BCM54XX_EXP_SEL_ER, val); in bcm_phy_write_exp_sel()
46 static inline int bcm_phy_read_exp_sel(struct phy_device *phydev, u16 reg) in bcm_phy_read_exp_sel() argument
48 return bcm_phy_read_exp(phydev, reg | MII_BCM54XX_EXP_SEL_ER); in bcm_phy_read_exp_sel()
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H A Dbcm84881.c23 static int bcm84881_wait_init(struct phy_device *phydev) in bcm84881_wait_init() argument
27 return phy_read_mmd_poll_timeout(phydev, MDIO_MMD_PMAPMD, MDIO_CTRL1, in bcm84881_wait_init()
32 static int bcm84881_config_init(struct phy_device *phydev) in bcm84881_config_init() argument
34 switch (phydev->interface) { in bcm84881_config_init()
45 static int bcm84881_probe(struct phy_device *phydev) in bcm84881_probe() argument
50 if (!phydev->is_c45 || in bcm84881_probe()
51 (phydev->c45_ids.devices_in_package & mmd_mask) != mmd_mask) in bcm84881_probe()
57 static int bcm84881_get_features(struct phy_device *phydev) in bcm84881_get_features() argument
61 ret = genphy_c45_pma_read_abilities(phydev); in bcm84881_get_features()
67 phydev->supported); in bcm84881_get_features()
[all …]
/openbmc/linux/drivers/net/ethernet/realtek/
H A Dr8169_phy_config.c18 struct phy_device *phydev);
20 static void r8168d_modify_extpage(struct phy_device *phydev, int extpage, in r8168d_modify_extpage() argument
23 int oldpage = phy_select_page(phydev, 0x0007); in r8168d_modify_extpage()
25 __phy_write(phydev, 0x1e, extpage); in r8168d_modify_extpage()
26 __phy_modify(phydev, reg, mask, val); in r8168d_modify_extpage()
28 phy_restore_page(phydev, oldpage, 0); in r8168d_modify_extpage()
31 static void r8168d_phy_param(struct phy_device *phydev, u16 parm, in r8168d_phy_param() argument
34 int oldpage = phy_select_page(phydev, 0x0005); in r8168d_phy_param()
36 __phy_write(phydev, 0x05, parm); in r8168d_phy_param()
37 __phy_modify(phydev, 0x06, mask, val); in r8168d_phy_param()
[all …]
/openbmc/u-boot/drivers/net/phy/
H A Dmarvell.c105 static int m88e1xxx_phy_extread(struct phy_device *phydev, int addr, in m88e1xxx_phy_extread() argument
108 int oldpage = phy_read(phydev, MDIO_DEVAD_NONE, MII_MARVELL_PHY_PAGE); in m88e1xxx_phy_extread()
111 phy_write(phydev, MDIO_DEVAD_NONE, MII_MARVELL_PHY_PAGE, devaddr); in m88e1xxx_phy_extread()
112 val = phy_read(phydev, MDIO_DEVAD_NONE, regnum); in m88e1xxx_phy_extread()
113 phy_write(phydev, MDIO_DEVAD_NONE, MII_MARVELL_PHY_PAGE, oldpage); in m88e1xxx_phy_extread()
118 static int m88e1xxx_phy_extwrite(struct phy_device *phydev, int addr, in m88e1xxx_phy_extwrite() argument
121 int oldpage = phy_read(phydev, MDIO_DEVAD_NONE, MII_MARVELL_PHY_PAGE); in m88e1xxx_phy_extwrite()
123 phy_write(phydev, MDIO_DEVAD_NONE, MII_MARVELL_PHY_PAGE, devaddr); in m88e1xxx_phy_extwrite()
124 phy_write(phydev, MDIO_DEVAD_NONE, regnum, val); in m88e1xxx_phy_extwrite()
125 phy_write(phydev, MDIO_DEVAD_NONE, MII_MARVELL_PHY_PAGE, oldpage); in m88e1xxx_phy_extwrite()
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H A Dbroadcom.c36 static void bcm_phy_write_misc(struct phy_device *phydev, in bcm_phy_write_misc() argument
41 phy_write(phydev, MDIO_DEVAD_NONE, MIIM_BCM54xx_AUXCNTL, in bcm_phy_write_misc()
44 reg_val = phy_read(phydev, MDIO_DEVAD_NONE, MIIM_BCM54xx_AUXCNTL); in bcm_phy_write_misc()
46 phy_write(phydev, MDIO_DEVAD_NONE, MIIM_BCM54xx_AUXCNTL, reg_val); in bcm_phy_write_misc()
49 phy_write(phydev, MDIO_DEVAD_NONE, MIIM_BCM54XX_EXP_SEL, reg_val); in bcm_phy_write_misc()
51 phy_write(phydev, MDIO_DEVAD_NONE, MIIM_BCM54XX_EXP_DATA, value); in bcm_phy_write_misc()
55 static int bcm5461_config(struct phy_device *phydev) in bcm5461_config() argument
59 phy_reset(phydev); in bcm5461_config()
64 phy_write(phydev, MDIO_DEVAD_NONE, MIIM_BCM54xx_AUXCNTL, in bcm5461_config()
66 reg18 = phy_read(phydev, MDIO_DEVAD_NONE, MIIM_BCM54xx_AUXCNTL); in bcm5461_config()
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H A Datheros.c20 static int ar8021_config(struct phy_device *phydev) in ar8021_config() argument
22 phy_write(phydev, MDIO_DEVAD_NONE, 0x00, 0x1200); in ar8021_config()
23 phy_write(phydev, MDIO_DEVAD_NONE, 0x1d, 0x05); in ar8021_config()
24 phy_write(phydev, MDIO_DEVAD_NONE, 0x1e, 0x3D47); in ar8021_config()
26 phydev->supported = phydev->drv->features; in ar8021_config()
30 static int ar8031_config(struct phy_device *phydev) in ar8031_config() argument
32 if (phydev->interface == PHY_INTERFACE_MODE_RGMII_TXID || in ar8031_config()
33 phydev->interface == PHY_INTERFACE_MODE_RGMII_ID) { in ar8031_config()
34 phy_write(phydev, MDIO_DEVAD_NONE, AR803x_PHY_DEBUG_ADDR_REG, in ar8031_config()
36 phy_write(phydev, MDIO_DEVAD_NONE, AR803x_PHY_DEBUG_DATA_REG, in ar8031_config()
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/openbmc/linux/drivers/net/phy/mscc/
H A Dmscc_ptp.c26 /* phydev->bus->mdio_lock should be locked when using this function */
27 static int phy_ts_base_write(struct phy_device *phydev, u32 regnum, u16 val) in phy_ts_base_write() argument
29 struct vsc8531_private *priv = phydev->priv; in phy_ts_base_write()
31 WARN_ON_ONCE(!mutex_is_locked(&phydev->mdio.bus->mdio_lock)); in phy_ts_base_write()
32 return __mdiobus_write(phydev->mdio.bus, priv->ts_base_addr, regnum, in phy_ts_base_write()
36 /* phydev->bus->mdio_lock should be locked when using this function */
37 static int phy_ts_base_read(struct phy_device *phydev, u32 regnum) in phy_ts_base_read() argument
39 struct vsc8531_private *priv = phydev->priv; in phy_ts_base_read()
41 WARN_ON_ONCE(!mutex_is_locked(&phydev->mdio.bus->mdio_lock)); in phy_ts_base_read()
42 return __mdiobus_read(phydev->mdio.bus, priv->ts_base_addr, regnum); in phy_ts_base_read()
[all …]
H A Dmscc_main.c113 static int vsc85xx_phy_read_page(struct phy_device *phydev) in vsc85xx_phy_read_page() argument
115 return __phy_read(phydev, MSCC_EXT_PAGE_ACCESS); in vsc85xx_phy_read_page()
118 static int vsc85xx_phy_write_page(struct phy_device *phydev, int page) in vsc85xx_phy_write_page() argument
120 return __phy_write(phydev, MSCC_EXT_PAGE_ACCESS, page); in vsc85xx_phy_write_page()
123 static int vsc85xx_get_sset_count(struct phy_device *phydev) in vsc85xx_get_sset_count() argument
125 struct vsc8531_private *priv = phydev->priv; in vsc85xx_get_sset_count()
133 static void vsc85xx_get_strings(struct phy_device *phydev, u8 *data) in vsc85xx_get_strings() argument
135 struct vsc8531_private *priv = phydev->priv; in vsc85xx_get_strings()
146 static u64 vsc85xx_get_stat(struct phy_device *phydev, int i) in vsc85xx_get_stat() argument
148 struct vsc8531_private *priv = phydev->priv; in vsc85xx_get_stat()
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H A Dmscc_serdes.c14 static int pll5g_detune(struct phy_device *phydev) in pll5g_detune() argument
19 rd_dat = vsc85xx_csr_read(phydev, MACRO_CTRL, PHY_S6G_PLL5G_CFG2); in pll5g_detune()
22 ret = vsc85xx_csr_write(phydev, MACRO_CTRL, in pll5g_detune()
25 dev_err(&phydev->mdio.dev, "%s: write error\n", __func__); in pll5g_detune()
29 static int pll5g_tune(struct phy_device *phydev) in pll5g_tune() argument
34 rd_dat = vsc85xx_csr_read(phydev, MACRO_CTRL, PHY_S6G_PLL5G_CFG2); in pll5g_tune()
36 ret = vsc85xx_csr_write(phydev, MACRO_CTRL, in pll5g_tune()
39 dev_err(&phydev->mdio.dev, "%s: write error\n", __func__); in pll5g_tune()
43 static int vsc85xx_sd6g_pll_cfg_wr(struct phy_device *phydev, in vsc85xx_sd6g_pll_cfg_wr() argument
50 ret = vsc85xx_csr_write(phydev, MACRO_CTRL, in vsc85xx_sd6g_pll_cfg_wr()
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H A Dmscc_macsec.c22 static u32 vsc8584_macsec_phy_read(struct phy_device *phydev, in vsc8584_macsec_phy_read() argument
29 rc = phy_select_page(phydev, MSCC_PHY_PAGE_MACSEC); in vsc8584_macsec_phy_read()
33 __phy_write(phydev, MSCC_EXT_PAGE_MACSEC_20, in vsc8584_macsec_phy_read()
42 __phy_write(phydev, MSCC_EXT_PAGE_MACSEC_19, in vsc8584_macsec_phy_read()
49 val = __phy_read(phydev, MSCC_EXT_PAGE_MACSEC_19); in vsc8584_macsec_phy_read()
52 val_l = __phy_read(phydev, MSCC_EXT_PAGE_MACSEC_17); in vsc8584_macsec_phy_read()
53 val_h = __phy_read(phydev, MSCC_EXT_PAGE_MACSEC_18); in vsc8584_macsec_phy_read()
56 phy_restore_page(phydev, rc, rc); in vsc8584_macsec_phy_read()
61 static void vsc8584_macsec_phy_write(struct phy_device *phydev, in vsc8584_macsec_phy_write() argument
67 rc = phy_select_page(phydev, MSCC_PHY_PAGE_MACSEC); in vsc8584_macsec_phy_write()
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