xref: /openbmc/linux/drivers/net/phy/marvell.c (revision 460b0b64)
1a2443fd1SAndrew Lunn // SPDX-License-Identifier: GPL-2.0+
200db8189SAndy Fleming /*
300db8189SAndy Fleming  * drivers/net/phy/marvell.c
400db8189SAndy Fleming  *
500db8189SAndy Fleming  * Driver for Marvell PHYs
600db8189SAndy Fleming  *
700db8189SAndy Fleming  * Author: Andy Fleming
800db8189SAndy Fleming  *
900db8189SAndy Fleming  * Copyright (c) 2004 Freescale Semiconductor, Inc.
1000db8189SAndy Fleming  *
113871c387SMichael Stapelberg  * Copyright (c) 2013 Michael Stapelberg <michael@stapelberg.de>
1200db8189SAndy Fleming  */
1300db8189SAndy Fleming #include <linux/kernel.h>
1400db8189SAndy Fleming #include <linux/string.h>
150b04680fSAndrew Lunn #include <linux/ctype.h>
1600db8189SAndy Fleming #include <linux/errno.h>
1700db8189SAndy Fleming #include <linux/unistd.h>
180b04680fSAndrew Lunn #include <linux/hwmon.h>
1900db8189SAndy Fleming #include <linux/interrupt.h>
2000db8189SAndy Fleming #include <linux/init.h>
2100db8189SAndy Fleming #include <linux/delay.h>
2200db8189SAndy Fleming #include <linux/netdevice.h>
2300db8189SAndy Fleming #include <linux/etherdevice.h>
2400db8189SAndy Fleming #include <linux/skbuff.h>
2500db8189SAndy Fleming #include <linux/spinlock.h>
2600db8189SAndy Fleming #include <linux/mm.h>
2700db8189SAndy Fleming #include <linux/module.h>
2800db8189SAndy Fleming #include <linux/mii.h>
2900db8189SAndy Fleming #include <linux/ethtool.h>
30fc879f72SAndrew Lunn #include <linux/ethtool_netlink.h>
3100db8189SAndy Fleming #include <linux/phy.h>
322f495c39SBenjamin Herrenschmidt #include <linux/marvell_phy.h>
3369f42be8SHeiner Kallweit #include <linux/bitfield.h>
34cf41a51dSDavid Daney #include <linux/of.h>
35b697d9d3SIvan Bornyakov #include <linux/sfp.h>
3600db8189SAndy Fleming 
37eea3b201SAvinash Kumar #include <linux/io.h>
3800db8189SAndy Fleming #include <asm/irq.h>
39eea3b201SAvinash Kumar #include <linux/uaccess.h>
4000db8189SAndy Fleming 
4127d916d6SDavid Daney #define MII_MARVELL_PHY_PAGE		22
4252295666SAndrew Lunn #define MII_MARVELL_COPPER_PAGE		0x00
4352295666SAndrew Lunn #define MII_MARVELL_FIBER_PAGE		0x01
4452295666SAndrew Lunn #define MII_MARVELL_MSCR_PAGE		0x02
4552295666SAndrew Lunn #define MII_MARVELL_LED_PAGE		0x03
460c9bcc1dSAndrew Lunn #define MII_MARVELL_VCT5_PAGE		0x05
4752295666SAndrew Lunn #define MII_MARVELL_MISC_TEST_PAGE	0x06
48fc879f72SAndrew Lunn #define MII_MARVELL_VCT7_PAGE		0x07
4952295666SAndrew Lunn #define MII_MARVELL_WOL_PAGE		0x11
50b697d9d3SIvan Bornyakov #define MII_MARVELL_MODE_PAGE		0x12
5127d916d6SDavid Daney 
5200db8189SAndy Fleming #define MII_M1011_IEVENT		0x13
5300db8189SAndy Fleming #define MII_M1011_IEVENT_CLEAR		0x0000
5400db8189SAndy Fleming 
5500db8189SAndy Fleming #define MII_M1011_IMASK			0x12
5600db8189SAndy Fleming #define MII_M1011_IMASK_INIT		0x6400
5700db8189SAndy Fleming #define MII_M1011_IMASK_CLEAR		0x0000
5800db8189SAndy Fleming 
5976884679SAndy Fleming #define MII_M1011_PHY_SCR			0x10
60fecd5e91SAndrew Lunn #define MII_M1011_PHY_SCR_DOWNSHIFT_EN		BIT(11)
61f8d975beSHeiner Kallweit #define MII_M1011_PHY_SCR_DOWNSHIFT_MASK	GENMASK(14, 12)
62a3bdfce7SHeiner Kallweit #define MII_M1011_PHY_SCR_DOWNSHIFT_MAX		8
63fecd5e91SAndrew Lunn #define MII_M1011_PHY_SCR_MDI			(0x0 << 5)
64fecd5e91SAndrew Lunn #define MII_M1011_PHY_SCR_MDI_X			(0x1 << 5)
65fecd5e91SAndrew Lunn #define MII_M1011_PHY_SCR_AUTO_CROSS		(0x3 << 5)
6676884679SAndy Fleming 
67a3bdfce7SHeiner Kallweit #define MII_M1011_PHY_SSR			0x11
68a3bdfce7SHeiner Kallweit #define MII_M1011_PHY_SSR_DOWNSHIFT		BIT(5)
69a3bdfce7SHeiner Kallweit 
7076884679SAndy Fleming #define MII_M1111_PHY_LED_CONTROL	0x18
7176884679SAndy Fleming #define MII_M1111_PHY_LED_DIRECT	0x4100
7276884679SAndy Fleming #define MII_M1111_PHY_LED_COMBINE	0x411c
73895ee682SKim Phillips #define MII_M1111_PHY_EXT_CR		0x14
745c6bc519SHeiner Kallweit #define MII_M1111_PHY_EXT_CR_DOWNSHIFT_MASK	GENMASK(11, 9)
755c6bc519SHeiner Kallweit #define MII_M1111_PHY_EXT_CR_DOWNSHIFT_MAX	8
765c6bc519SHeiner Kallweit #define MII_M1111_PHY_EXT_CR_DOWNSHIFT_EN	BIT(8)
7761111598SAndrew Lunn #define MII_M1111_RGMII_RX_DELAY	BIT(7)
7861111598SAndrew Lunn #define MII_M1111_RGMII_TX_DELAY	BIT(1)
79895ee682SKim Phillips #define MII_M1111_PHY_EXT_SR		0x1b
80be937f1fSAlexandr Smirnov 
81895ee682SKim Phillips #define MII_M1111_HWCFG_MODE_MASK		0xf
82be937f1fSAlexandr Smirnov #define MII_M1111_HWCFG_MODE_FIBER_RGMII	0x3
834117b5beSKapil Juneja #define MII_M1111_HWCFG_MODE_SGMII_NO_CLK	0x4
84865b813aSAndrew Lunn #define MII_M1111_HWCFG_MODE_RTBI		0x7
851887023aSRobert Hancock #define MII_M1111_HWCFG_MODE_COPPER_1000X_AN	0x8
865f8cbc13SLiu Yu-B13201 #define MII_M1111_HWCFG_MODE_COPPER_RTBI	0x9
87865b813aSAndrew Lunn #define MII_M1111_HWCFG_MODE_COPPER_RGMII	0xb
881887023aSRobert Hancock #define MII_M1111_HWCFG_MODE_COPPER_1000X_NOAN	0xc
891887023aSRobert Hancock #define MII_M1111_HWCFG_SERIAL_AN_BYPASS	BIT(12)
90865b813aSAndrew Lunn #define MII_M1111_HWCFG_FIBER_COPPER_RES	BIT(13)
91865b813aSAndrew Lunn #define MII_M1111_HWCFG_FIBER_COPPER_AUTO	BIT(15)
92be937f1fSAlexandr Smirnov 
93c477d044SCyril Chemparathy #define MII_88E1121_PHY_MSCR_REG	21
94c477d044SCyril Chemparathy #define MII_88E1121_PHY_MSCR_RX_DELAY	BIT(5)
95c477d044SCyril Chemparathy #define MII_88E1121_PHY_MSCR_TX_DELAY	BIT(4)
96424ca4c5SRussell King #define MII_88E1121_PHY_MSCR_DELAY_MASK	(BIT(5) | BIT(4))
97c477d044SCyril Chemparathy 
980b04680fSAndrew Lunn #define MII_88E1121_MISC_TEST				0x1a
990b04680fSAndrew Lunn #define MII_88E1510_MISC_TEST_TEMP_THRESHOLD_MASK	0x1f00
1000b04680fSAndrew Lunn #define MII_88E1510_MISC_TEST_TEMP_THRESHOLD_SHIFT	8
1010b04680fSAndrew Lunn #define MII_88E1510_MISC_TEST_TEMP_IRQ_EN		BIT(7)
1020b04680fSAndrew Lunn #define MII_88E1510_MISC_TEST_TEMP_IRQ			BIT(6)
1030b04680fSAndrew Lunn #define MII_88E1121_MISC_TEST_TEMP_SENSOR_EN		BIT(5)
1040b04680fSAndrew Lunn #define MII_88E1121_MISC_TEST_TEMP_MASK			0x1f
1050b04680fSAndrew Lunn 
1060b04680fSAndrew Lunn #define MII_88E1510_TEMP_SENSOR		0x1b
1070b04680fSAndrew Lunn #define MII_88E1510_TEMP_SENSOR_MASK	0xff
1080b04680fSAndrew Lunn 
10969f42be8SHeiner Kallweit #define MII_88E1540_COPPER_CTRL3	0x1a
11069f42be8SHeiner Kallweit #define MII_88E1540_COPPER_CTRL3_LINK_DOWN_DELAY_MASK	GENMASK(11, 10)
11169f42be8SHeiner Kallweit #define MII_88E1540_COPPER_CTRL3_LINK_DOWN_DELAY_00MS	0
11269f42be8SHeiner Kallweit #define MII_88E1540_COPPER_CTRL3_LINK_DOWN_DELAY_10MS	1
11369f42be8SHeiner Kallweit #define MII_88E1540_COPPER_CTRL3_LINK_DOWN_DELAY_20MS	2
11469f42be8SHeiner Kallweit #define MII_88E1540_COPPER_CTRL3_LINK_DOWN_DELAY_40MS	3
11569f42be8SHeiner Kallweit #define MII_88E1540_COPPER_CTRL3_FAST_LINK_DOWN		BIT(9)
11669f42be8SHeiner Kallweit 
117fee2d546SAndrew Lunn #define MII_88E6390_MISC_TEST		0x1b
1184f920c29SMarek Behún #define MII_88E6390_MISC_TEST_TEMP_SENSOR_ENABLE_SAMPLE_1S	(0x0 << 14)
1194f920c29SMarek Behún #define MII_88E6390_MISC_TEST_TEMP_SENSOR_ENABLE		(0x1 << 14)
1204f920c29SMarek Behún #define MII_88E6390_MISC_TEST_TEMP_SENSOR_ENABLE_ONESHOT	(0x2 << 14)
1214f920c29SMarek Behún #define MII_88E6390_MISC_TEST_TEMP_SENSOR_DISABLE		(0x3 << 14)
1224f920c29SMarek Behún #define MII_88E6390_MISC_TEST_TEMP_SENSOR_MASK			(0x3 << 14)
123a978f7c4SMarek Behún #define MII_88E6393_MISC_TEST_SAMPLES_2048	(0x0 << 11)
124a978f7c4SMarek Behún #define MII_88E6393_MISC_TEST_SAMPLES_4096	(0x1 << 11)
125a978f7c4SMarek Behún #define MII_88E6393_MISC_TEST_SAMPLES_8192	(0x2 << 11)
126a978f7c4SMarek Behún #define MII_88E6393_MISC_TEST_SAMPLES_16384	(0x3 << 11)
127a978f7c4SMarek Behún #define MII_88E6393_MISC_TEST_SAMPLES_MASK	(0x3 << 11)
128a978f7c4SMarek Behún #define MII_88E6393_MISC_TEST_RATE_2_3MS	(0x5 << 8)
129a978f7c4SMarek Behún #define MII_88E6393_MISC_TEST_RATE_6_4MS	(0x6 << 8)
130a978f7c4SMarek Behún #define MII_88E6393_MISC_TEST_RATE_11_9MS	(0x7 << 8)
131a978f7c4SMarek Behún #define MII_88E6393_MISC_TEST_RATE_MASK		(0x7 << 8)
132fee2d546SAndrew Lunn 
133fee2d546SAndrew Lunn #define MII_88E6390_TEMP_SENSOR		0x1c
134a978f7c4SMarek Behún #define MII_88E6393_TEMP_SENSOR_THRESHOLD_MASK	0xff00
135a978f7c4SMarek Behún #define MII_88E6393_TEMP_SENSOR_THRESHOLD_SHIFT	8
136fee2d546SAndrew Lunn #define MII_88E6390_TEMP_SENSOR_MASK		0xff
137fee2d546SAndrew Lunn #define MII_88E6390_TEMP_SENSOR_SAMPLES		10
138fee2d546SAndrew Lunn 
139337ac9d5SCyril Chemparathy #define MII_88E1318S_PHY_MSCR1_REG	16
140337ac9d5SCyril Chemparathy #define MII_88E1318S_PHY_MSCR1_PAD_ODD	BIT(6)
1413ff1c259SCyril Chemparathy 
1423871c387SMichael Stapelberg /* Copper Specific Interrupt Enable Register */
1433871c387SMichael Stapelberg #define MII_88E1318S_PHY_CSIER				0x12
1443871c387SMichael Stapelberg /* WOL Event Interrupt Enable */
1453871c387SMichael Stapelberg #define MII_88E1318S_PHY_CSIER_WOL_EIE			BIT(7)
1463871c387SMichael Stapelberg 
1472d3960e5SAndrew Lunn #define MII_88E1318S_PHY_LED_FUNC		0x10
1482d3960e5SAndrew Lunn #define MII_88E1318S_PHY_LED_FUNC_OFF		(0x8)
1492d3960e5SAndrew Lunn #define MII_88E1318S_PHY_LED_FUNC_ON		(0x9)
150ea9e8648SAndrew Lunn #define MII_88E1318S_PHY_LED_FUNC_HI_Z		(0xa)
151ea9e8648SAndrew Lunn #define MII_88E1318S_PHY_LED_FUNC_BLINK		(0xb)
1523871c387SMichael Stapelberg #define MII_88E1318S_PHY_LED_TCR		0x12
1533871c387SMichael Stapelberg #define MII_88E1318S_PHY_LED_TCR_FORCE_INT	BIT(15)
1543871c387SMichael Stapelberg #define MII_88E1318S_PHY_LED_TCR_INTn_ENABLE	BIT(7)
1553871c387SMichael Stapelberg #define MII_88E1318S_PHY_LED_TCR_INT_ACTIVE_LOW	BIT(11)
1563871c387SMichael Stapelberg 
1573871c387SMichael Stapelberg /* Magic Packet MAC address registers */
1583871c387SMichael Stapelberg #define MII_88E1318S_PHY_MAGIC_PACKET_WORD2		0x17
1593871c387SMichael Stapelberg #define MII_88E1318S_PHY_MAGIC_PACKET_WORD1		0x18
1603871c387SMichael Stapelberg #define MII_88E1318S_PHY_MAGIC_PACKET_WORD0		0x19
1613871c387SMichael Stapelberg 
1623871c387SMichael Stapelberg #define MII_88E1318S_PHY_WOL_CTRL				0x10
1633871c387SMichael Stapelberg #define MII_88E1318S_PHY_WOL_CTRL_CLEAR_WOL_STATUS		BIT(12)
1646164659fSSong Yoong Siang #define MII_88E1318S_PHY_WOL_CTRL_LINK_UP_ENABLE		BIT(13)
1653871c387SMichael Stapelberg #define MII_88E1318S_PHY_WOL_CTRL_MAGIC_PACKET_MATCH_ENABLE	BIT(14)
1663871c387SMichael Stapelberg 
16707777246SWang Dongsheng #define MII_PHY_LED_CTRL	        16
168140bc929SSergei Poselenov #define MII_88E1121_PHY_LED_DEF		0x0030
16907777246SWang Dongsheng #define MII_88E1510_PHY_LED_DEF		0x1177
170a93f7fe1SJian Shen #define MII_88E1510_PHY_LED0_LINK_LED1_ACTIVE	0x1040
171140bc929SSergei Poselenov 
172be937f1fSAlexandr Smirnov #define MII_M1011_PHY_STATUS		0x11
173be937f1fSAlexandr Smirnov #define MII_M1011_PHY_STATUS_1000	0x8000
174be937f1fSAlexandr Smirnov #define MII_M1011_PHY_STATUS_100	0x4000
175be937f1fSAlexandr Smirnov #define MII_M1011_PHY_STATUS_SPD_MASK	0xc000
176be937f1fSAlexandr Smirnov #define MII_M1011_PHY_STATUS_FULLDUPLEX	0x2000
177be937f1fSAlexandr Smirnov #define MII_M1011_PHY_STATUS_RESOLVED	0x0800
178be937f1fSAlexandr Smirnov #define MII_M1011_PHY_STATUS_LINK	0x0400
179be937f1fSAlexandr Smirnov 
1806b358aedSSebastian Hesselbarth #define MII_88E3016_PHY_SPEC_CTRL	0x10
1816b358aedSSebastian Hesselbarth #define MII_88E3016_DISABLE_SCRAMBLER	0x0200
1826b358aedSSebastian Hesselbarth #define MII_88E3016_AUTO_MDIX_CROSSOVER	0x0030
18376884679SAndy Fleming 
184930b37eeSStefan Roese #define MII_88E1510_GEN_CTRL_REG_1		0x14
185930b37eeSStefan Roese #define MII_88E1510_GEN_CTRL_REG_1_MODE_MASK	0x7
186b697d9d3SIvan Bornyakov #define MII_88E1510_GEN_CTRL_REG_1_MODE_RGMII	0x0	/* RGMII to copper */
187930b37eeSStefan Roese #define MII_88E1510_GEN_CTRL_REG_1_MODE_SGMII	0x1	/* SGMII to copper */
188b697d9d3SIvan Bornyakov /* RGMII to 1000BASE-X */
189b697d9d3SIvan Bornyakov #define MII_88E1510_GEN_CTRL_REG_1_MODE_RGMII_1000X	0x2
190b697d9d3SIvan Bornyakov /* RGMII to 100BASE-FX */
191b697d9d3SIvan Bornyakov #define MII_88E1510_GEN_CTRL_REG_1_MODE_RGMII_100FX	0x3
192b697d9d3SIvan Bornyakov /* RGMII to SGMII */
193b697d9d3SIvan Bornyakov #define MII_88E1510_GEN_CTRL_REG_1_MODE_RGMII_SGMII	0x4
194930b37eeSStefan Roese #define MII_88E1510_GEN_CTRL_REG_1_RESET	0x8000	/* Soft reset */
195930b37eeSStefan Roese 
196020a45afSMohammad Athari Bin Ismail #define MII_88E1510_MSCR_2		0x15
197020a45afSMohammad Athari Bin Ismail 
1980c9bcc1dSAndrew Lunn #define MII_VCT5_TX_RX_MDI0_COUPLING	0x10
1990c9bcc1dSAndrew Lunn #define MII_VCT5_TX_RX_MDI1_COUPLING	0x11
2000c9bcc1dSAndrew Lunn #define MII_VCT5_TX_RX_MDI2_COUPLING	0x12
2010c9bcc1dSAndrew Lunn #define MII_VCT5_TX_RX_MDI3_COUPLING	0x13
2020c9bcc1dSAndrew Lunn #define MII_VCT5_TX_RX_AMPLITUDE_MASK	0x7f00
2030c9bcc1dSAndrew Lunn #define MII_VCT5_TX_RX_AMPLITUDE_SHIFT	8
2040c9bcc1dSAndrew Lunn #define MII_VCT5_TX_RX_COUPLING_POSITIVE_REFLECTION	BIT(15)
2050c9bcc1dSAndrew Lunn 
2060c9bcc1dSAndrew Lunn #define MII_VCT5_CTRL				0x17
2070c9bcc1dSAndrew Lunn #define MII_VCT5_CTRL_ENABLE				BIT(15)
2080c9bcc1dSAndrew Lunn #define MII_VCT5_CTRL_COMPLETE				BIT(14)
2090c9bcc1dSAndrew Lunn #define MII_VCT5_CTRL_TX_SAME_CHANNEL			(0x0 << 11)
2100c9bcc1dSAndrew Lunn #define MII_VCT5_CTRL_TX0_CHANNEL			(0x4 << 11)
2110c9bcc1dSAndrew Lunn #define MII_VCT5_CTRL_TX1_CHANNEL			(0x5 << 11)
2120c9bcc1dSAndrew Lunn #define MII_VCT5_CTRL_TX2_CHANNEL			(0x6 << 11)
2130c9bcc1dSAndrew Lunn #define MII_VCT5_CTRL_TX3_CHANNEL			(0x7 << 11)
2140c9bcc1dSAndrew Lunn #define MII_VCT5_CTRL_SAMPLES_2				(0x0 << 8)
2150c9bcc1dSAndrew Lunn #define MII_VCT5_CTRL_SAMPLES_4				(0x1 << 8)
2160c9bcc1dSAndrew Lunn #define MII_VCT5_CTRL_SAMPLES_8				(0x2 << 8)
2170c9bcc1dSAndrew Lunn #define MII_VCT5_CTRL_SAMPLES_16			(0x3 << 8)
2180c9bcc1dSAndrew Lunn #define MII_VCT5_CTRL_SAMPLES_32			(0x4 << 8)
2190c9bcc1dSAndrew Lunn #define MII_VCT5_CTRL_SAMPLES_64			(0x5 << 8)
2200c9bcc1dSAndrew Lunn #define MII_VCT5_CTRL_SAMPLES_128			(0x6 << 8)
2210c9bcc1dSAndrew Lunn #define MII_VCT5_CTRL_SAMPLES_DEFAULT			(0x6 << 8)
2220c9bcc1dSAndrew Lunn #define MII_VCT5_CTRL_SAMPLES_256			(0x7 << 8)
2230c9bcc1dSAndrew Lunn #define MII_VCT5_CTRL_SAMPLES_SHIFT			8
2240c9bcc1dSAndrew Lunn #define MII_VCT5_CTRL_MODE_MAXIMUM_PEEK			(0x0 << 6)
2250c9bcc1dSAndrew Lunn #define MII_VCT5_CTRL_MODE_FIRST_LAST_PEEK		(0x1 << 6)
2260c9bcc1dSAndrew Lunn #define MII_VCT5_CTRL_MODE_OFFSET			(0x2 << 6)
2270c9bcc1dSAndrew Lunn #define MII_VCT5_CTRL_SAMPLE_POINT			(0x3 << 6)
2280c9bcc1dSAndrew Lunn #define MII_VCT5_CTRL_PEEK_HYST_DEFAULT			3
2290c9bcc1dSAndrew Lunn 
2300c9bcc1dSAndrew Lunn #define MII_VCT5_SAMPLE_POINT_DISTANCE		0x18
231f2bc8ad3SAndrew Lunn #define MII_VCT5_SAMPLE_POINT_DISTANCE_MAX	511
2320c9bcc1dSAndrew Lunn #define MII_VCT5_TX_PULSE_CTRL			0x1c
2330c9bcc1dSAndrew Lunn #define MII_VCT5_TX_PULSE_CTRL_DONT_WAIT_LINK_DOWN	BIT(12)
2340c9bcc1dSAndrew Lunn #define MII_VCT5_TX_PULSE_CTRL_PULSE_WIDTH_128nS	(0x0 << 10)
2350c9bcc1dSAndrew Lunn #define MII_VCT5_TX_PULSE_CTRL_PULSE_WIDTH_96nS		(0x1 << 10)
2360c9bcc1dSAndrew Lunn #define MII_VCT5_TX_PULSE_CTRL_PULSE_WIDTH_64nS		(0x2 << 10)
2370c9bcc1dSAndrew Lunn #define MII_VCT5_TX_PULSE_CTRL_PULSE_WIDTH_32nS		(0x3 << 10)
2380c9bcc1dSAndrew Lunn #define MII_VCT5_TX_PULSE_CTRL_PULSE_WIDTH_SHIFT	10
2390c9bcc1dSAndrew Lunn #define MII_VCT5_TX_PULSE_CTRL_PULSE_AMPLITUDE_1000mV	(0x0 << 8)
2400c9bcc1dSAndrew Lunn #define MII_VCT5_TX_PULSE_CTRL_PULSE_AMPLITUDE_750mV	(0x1 << 8)
2410c9bcc1dSAndrew Lunn #define MII_VCT5_TX_PULSE_CTRL_PULSE_AMPLITUDE_500mV	(0x2 << 8)
2420c9bcc1dSAndrew Lunn #define MII_VCT5_TX_PULSE_CTRL_PULSE_AMPLITUDE_250mV	(0x3 << 8)
2430c9bcc1dSAndrew Lunn #define MII_VCT5_TX_PULSE_CTRL_PULSE_AMPLITUDE_SHIFT	8
2440c9bcc1dSAndrew Lunn #define MII_VCT5_TX_PULSE_CTRL_MAX_AMP			BIT(7)
2450c9bcc1dSAndrew Lunn #define MII_VCT5_TX_PULSE_CTRL_GT_140m_46_86mV		(0x6 << 0)
2460c9bcc1dSAndrew Lunn 
247db8668a1SAndrew Lunn /* For TDR measurements less than 11 meters, a short pulse should be
248db8668a1SAndrew Lunn  * used.
249db8668a1SAndrew Lunn  */
250db8668a1SAndrew Lunn #define TDR_SHORT_CABLE_LENGTH	11
251db8668a1SAndrew Lunn 
252fc879f72SAndrew Lunn #define MII_VCT7_PAIR_0_DISTANCE	0x10
253fc879f72SAndrew Lunn #define MII_VCT7_PAIR_1_DISTANCE	0x11
254fc879f72SAndrew Lunn #define MII_VCT7_PAIR_2_DISTANCE	0x12
255fc879f72SAndrew Lunn #define MII_VCT7_PAIR_3_DISTANCE	0x13
256fc879f72SAndrew Lunn 
257fc879f72SAndrew Lunn #define MII_VCT7_RESULTS	0x14
258fc879f72SAndrew Lunn #define MII_VCT7_RESULTS_PAIR3_MASK	0xf000
259fc879f72SAndrew Lunn #define MII_VCT7_RESULTS_PAIR2_MASK	0x0f00
260fc879f72SAndrew Lunn #define MII_VCT7_RESULTS_PAIR1_MASK	0x00f0
261fc879f72SAndrew Lunn #define MII_VCT7_RESULTS_PAIR0_MASK	0x000f
262fc879f72SAndrew Lunn #define MII_VCT7_RESULTS_PAIR3_SHIFT	12
263fc879f72SAndrew Lunn #define MII_VCT7_RESULTS_PAIR2_SHIFT	8
264fc879f72SAndrew Lunn #define MII_VCT7_RESULTS_PAIR1_SHIFT	4
265fc879f72SAndrew Lunn #define MII_VCT7_RESULTS_PAIR0_SHIFT	0
266fc879f72SAndrew Lunn #define MII_VCT7_RESULTS_INVALID	0
267fc879f72SAndrew Lunn #define MII_VCT7_RESULTS_OK		1
268fc879f72SAndrew Lunn #define MII_VCT7_RESULTS_OPEN		2
269fc879f72SAndrew Lunn #define MII_VCT7_RESULTS_SAME_SHORT	3
270fc879f72SAndrew Lunn #define MII_VCT7_RESULTS_CROSS_SHORT	4
271fc879f72SAndrew Lunn #define MII_VCT7_RESULTS_BUSY		9
272fc879f72SAndrew Lunn 
273fc879f72SAndrew Lunn #define MII_VCT7_CTRL		0x15
274fc879f72SAndrew Lunn #define MII_VCT7_CTRL_RUN_NOW			BIT(15)
275fc879f72SAndrew Lunn #define MII_VCT7_CTRL_RUN_ANEG			BIT(14)
276fc879f72SAndrew Lunn #define MII_VCT7_CTRL_DISABLE_CROSS		BIT(13)
277fc879f72SAndrew Lunn #define MII_VCT7_CTRL_RUN_AFTER_BREAK_LINK	BIT(12)
278fc879f72SAndrew Lunn #define MII_VCT7_CTRL_IN_PROGRESS		BIT(11)
279fc879f72SAndrew Lunn #define MII_VCT7_CTRL_METERS			BIT(10)
280fc879f72SAndrew Lunn #define MII_VCT7_CTRL_CENTIMETERS		0
281fc879f72SAndrew Lunn 
2826cfb3bccSCharles-Antoine Couret #define LPA_PAUSE_FIBER		0x180
2836cfb3bccSCharles-Antoine Couret #define LPA_PAUSE_ASYM_FIBER	0x100
2846cfb3bccSCharles-Antoine Couret 
2852170fef7SCharles-Antoine Couret #define NB_FIBER_STATS	1
2866cfb3bccSCharles-Antoine Couret 
28700db8189SAndy Fleming MODULE_DESCRIPTION("Marvell PHY driver");
28800db8189SAndy Fleming MODULE_AUTHOR("Andy Fleming");
28900db8189SAndy Fleming MODULE_LICENSE("GPL");
29000db8189SAndy Fleming 
291d2fa47d9SAndrew Lunn struct marvell_hw_stat {
292d2fa47d9SAndrew Lunn 	const char *string;
293d2fa47d9SAndrew Lunn 	u8 page;
294d2fa47d9SAndrew Lunn 	u8 reg;
295d2fa47d9SAndrew Lunn 	u8 bits;
296d2fa47d9SAndrew Lunn };
297d2fa47d9SAndrew Lunn 
298d2fa47d9SAndrew Lunn static struct marvell_hw_stat marvell_hw_stats[] = {
2992170fef7SCharles-Antoine Couret 	{ "phy_receive_errors_copper", 0, 21, 16},
300d2fa47d9SAndrew Lunn 	{ "phy_idle_errors", 0, 10, 8 },
3012170fef7SCharles-Antoine Couret 	{ "phy_receive_errors_fiber", 1, 21, 16},
302d2fa47d9SAndrew Lunn };
303d2fa47d9SAndrew Lunn 
304d2fa47d9SAndrew Lunn struct marvell_priv {
305d2fa47d9SAndrew Lunn 	u64 stats[ARRAY_SIZE(marvell_hw_stats)];
3060b04680fSAndrew Lunn 	char *hwmon_name;
3070b04680fSAndrew Lunn 	struct device *hwmon_dev;
3080c9bcc1dSAndrew Lunn 	bool cable_test_tdr;
309f2bc8ad3SAndrew Lunn 	u32 first;
310f2bc8ad3SAndrew Lunn 	u32 last;
311f2bc8ad3SAndrew Lunn 	u32 step;
312f2bc8ad3SAndrew Lunn 	s8 pair;
313d2fa47d9SAndrew Lunn };
314d2fa47d9SAndrew Lunn 
marvell_read_page(struct phy_device * phydev)315424ca4c5SRussell King static int marvell_read_page(struct phy_device *phydev)
3166427bb2dSAndrew Lunn {
317424ca4c5SRussell King 	return __phy_read(phydev, MII_MARVELL_PHY_PAGE);
318424ca4c5SRussell King }
319424ca4c5SRussell King 
marvell_write_page(struct phy_device * phydev,int page)320424ca4c5SRussell King static int marvell_write_page(struct phy_device *phydev, int page)
321424ca4c5SRussell King {
322424ca4c5SRussell King 	return __phy_write(phydev, MII_MARVELL_PHY_PAGE, page);
3236427bb2dSAndrew Lunn }
3246427bb2dSAndrew Lunn 
marvell_set_page(struct phy_device * phydev,int page)3256427bb2dSAndrew Lunn static int marvell_set_page(struct phy_device *phydev, int page)
3266427bb2dSAndrew Lunn {
3276427bb2dSAndrew Lunn 	return phy_write(phydev, MII_MARVELL_PHY_PAGE, page);
3286427bb2dSAndrew Lunn }
3296427bb2dSAndrew Lunn 
marvell_ack_interrupt(struct phy_device * phydev)33000db8189SAndy Fleming static int marvell_ack_interrupt(struct phy_device *phydev)
33100db8189SAndy Fleming {
33200db8189SAndy Fleming 	int err;
33300db8189SAndy Fleming 
33400db8189SAndy Fleming 	/* Clear the interrupts by reading the reg */
33500db8189SAndy Fleming 	err = phy_read(phydev, MII_M1011_IEVENT);
33600db8189SAndy Fleming 
33700db8189SAndy Fleming 	if (err < 0)
33800db8189SAndy Fleming 		return err;
33900db8189SAndy Fleming 
34000db8189SAndy Fleming 	return 0;
34100db8189SAndy Fleming }
34200db8189SAndy Fleming 
marvell_config_intr(struct phy_device * phydev)34300db8189SAndy Fleming static int marvell_config_intr(struct phy_device *phydev)
34400db8189SAndy Fleming {
34500db8189SAndy Fleming 	int err;
34600db8189SAndy Fleming 
3471f6d0f26SIoana Ciornei 	if (phydev->interrupts == PHY_INTERRUPT_ENABLED) {
3481f6d0f26SIoana Ciornei 		err = marvell_ack_interrupt(phydev);
3491f6d0f26SIoana Ciornei 		if (err)
3501f6d0f26SIoana Ciornei 			return err;
3511f6d0f26SIoana Ciornei 
35223beb38fSAndrew Lunn 		err = phy_write(phydev, MII_M1011_IMASK,
35323beb38fSAndrew Lunn 				MII_M1011_IMASK_INIT);
3541f6d0f26SIoana Ciornei 	} else {
35523beb38fSAndrew Lunn 		err = phy_write(phydev, MII_M1011_IMASK,
35623beb38fSAndrew Lunn 				MII_M1011_IMASK_CLEAR);
3571f6d0f26SIoana Ciornei 		if (err)
3581f6d0f26SIoana Ciornei 			return err;
3591f6d0f26SIoana Ciornei 
3601f6d0f26SIoana Ciornei 		err = marvell_ack_interrupt(phydev);
3611f6d0f26SIoana Ciornei 	}
36200db8189SAndy Fleming 
36300db8189SAndy Fleming 	return err;
36400db8189SAndy Fleming }
36500db8189SAndy Fleming 
marvell_handle_interrupt(struct phy_device * phydev)366a0723b37SIoana Ciornei static irqreturn_t marvell_handle_interrupt(struct phy_device *phydev)
367a0723b37SIoana Ciornei {
368a0723b37SIoana Ciornei 	int irq_status;
369a0723b37SIoana Ciornei 
370a0723b37SIoana Ciornei 	irq_status = phy_read(phydev, MII_M1011_IEVENT);
371a0723b37SIoana Ciornei 	if (irq_status < 0) {
372a0723b37SIoana Ciornei 		phy_error(phydev);
373a0723b37SIoana Ciornei 		return IRQ_NONE;
374a0723b37SIoana Ciornei 	}
375a0723b37SIoana Ciornei 
376a0723b37SIoana Ciornei 	if (!(irq_status & MII_M1011_IMASK_INIT))
377a0723b37SIoana Ciornei 		return IRQ_NONE;
378a0723b37SIoana Ciornei 
379a0723b37SIoana Ciornei 	phy_trigger_machine(phydev);
380a0723b37SIoana Ciornei 
381a0723b37SIoana Ciornei 	return IRQ_HANDLED;
382a0723b37SIoana Ciornei }
383a0723b37SIoana Ciornei 
marvell_set_polarity(struct phy_device * phydev,int polarity)384239aa55bSDavid Thomson static int marvell_set_polarity(struct phy_device *phydev, int polarity)
385239aa55bSDavid Thomson {
386feb938faSRussell King 	u16 val;
387239aa55bSDavid Thomson 
388239aa55bSDavid Thomson 	switch (polarity) {
389239aa55bSDavid Thomson 	case ETH_TP_MDI:
390feb938faSRussell King 		val = MII_M1011_PHY_SCR_MDI;
391239aa55bSDavid Thomson 		break;
392239aa55bSDavid Thomson 	case ETH_TP_MDI_X:
393feb938faSRussell King 		val = MII_M1011_PHY_SCR_MDI_X;
394239aa55bSDavid Thomson 		break;
395239aa55bSDavid Thomson 	case ETH_TP_MDI_AUTO:
396239aa55bSDavid Thomson 	case ETH_TP_MDI_INVALID:
397239aa55bSDavid Thomson 	default:
398feb938faSRussell King 		val = MII_M1011_PHY_SCR_AUTO_CROSS;
399239aa55bSDavid Thomson 		break;
400239aa55bSDavid Thomson 	}
401239aa55bSDavid Thomson 
402feb938faSRussell King 	return phy_modify_changed(phydev, MII_M1011_PHY_SCR,
403feb938faSRussell King 				  MII_M1011_PHY_SCR_AUTO_CROSS, val);
404239aa55bSDavid Thomson }
405239aa55bSDavid Thomson 
marvell_config_aneg(struct phy_device * phydev)40600db8189SAndy Fleming static int marvell_config_aneg(struct phy_device *phydev)
40700db8189SAndy Fleming {
408d6ab9336SFlorian Fainelli 	int changed = 0;
40900db8189SAndy Fleming 	int err;
41000db8189SAndy Fleming 
4114e26c5c3SRaju Lakkaraju 	err = marvell_set_polarity(phydev, phydev->mdix_ctrl);
41276884679SAndy Fleming 	if (err < 0)
41376884679SAndy Fleming 		return err;
41476884679SAndy Fleming 
415d6ab9336SFlorian Fainelli 	changed = err;
416d6ab9336SFlorian Fainelli 
41776884679SAndy Fleming 	err = phy_write(phydev, MII_M1111_PHY_LED_CONTROL,
41876884679SAndy Fleming 			MII_M1111_PHY_LED_DIRECT);
41976884679SAndy Fleming 	if (err < 0)
42076884679SAndy Fleming 		return err;
42100db8189SAndy Fleming 
42200db8189SAndy Fleming 	err = genphy_config_aneg(phydev);
4238ff44985SAnton Vorontsov 	if (err < 0)
42400db8189SAndy Fleming 		return err;
4258ff44985SAnton Vorontsov 
426d6ab9336SFlorian Fainelli 	if (phydev->autoneg != AUTONEG_ENABLE || changed) {
4270c3439bcSAndrew Lunn 		/* A write to speed/duplex bits (that is performed by
4288ff44985SAnton Vorontsov 		 * genphy_config_aneg() call above) must be followed by
4298ff44985SAnton Vorontsov 		 * a software reset. Otherwise, the write has no effect.
4308ff44985SAnton Vorontsov 		 */
43134386344SAndrew Lunn 		err = genphy_soft_reset(phydev);
4328ff44985SAnton Vorontsov 		if (err < 0)
4338ff44985SAnton Vorontsov 			return err;
4348ff44985SAnton Vorontsov 	}
4358ff44985SAnton Vorontsov 
4368ff44985SAnton Vorontsov 	return 0;
43700db8189SAndy Fleming }
43800db8189SAndy Fleming 
m88e1101_config_aneg(struct phy_device * phydev)439f2899788SAndrew Lunn static int m88e1101_config_aneg(struct phy_device *phydev)
440f2899788SAndrew Lunn {
441f2899788SAndrew Lunn 	int err;
442f2899788SAndrew Lunn 
443f2899788SAndrew Lunn 	/* This Marvell PHY has an errata which requires
444f2899788SAndrew Lunn 	 * that certain registers get written in order
445f2899788SAndrew Lunn 	 * to restart autonegotiation
446f2899788SAndrew Lunn 	 */
44734386344SAndrew Lunn 	err = genphy_soft_reset(phydev);
448f2899788SAndrew Lunn 	if (err < 0)
449f2899788SAndrew Lunn 		return err;
450f2899788SAndrew Lunn 
451f2899788SAndrew Lunn 	err = phy_write(phydev, 0x1d, 0x1f);
452f2899788SAndrew Lunn 	if (err < 0)
453f2899788SAndrew Lunn 		return err;
454f2899788SAndrew Lunn 
455f2899788SAndrew Lunn 	err = phy_write(phydev, 0x1e, 0x200c);
456f2899788SAndrew Lunn 	if (err < 0)
457f2899788SAndrew Lunn 		return err;
458f2899788SAndrew Lunn 
459f2899788SAndrew Lunn 	err = phy_write(phydev, 0x1d, 0x5);
460f2899788SAndrew Lunn 	if (err < 0)
461f2899788SAndrew Lunn 		return err;
462f2899788SAndrew Lunn 
463f2899788SAndrew Lunn 	err = phy_write(phydev, 0x1e, 0);
464f2899788SAndrew Lunn 	if (err < 0)
465f2899788SAndrew Lunn 		return err;
466f2899788SAndrew Lunn 
467f2899788SAndrew Lunn 	err = phy_write(phydev, 0x1e, 0x100);
468f2899788SAndrew Lunn 	if (err < 0)
469f2899788SAndrew Lunn 		return err;
470f2899788SAndrew Lunn 
471f2899788SAndrew Lunn 	return marvell_config_aneg(phydev);
472f2899788SAndrew Lunn }
473f2899788SAndrew Lunn 
4745cd119d9SDan Murphy #if IS_ENABLED(CONFIG_OF_MDIO)
4750c3439bcSAndrew Lunn /* Set and/or override some configuration registers based on the
476cf41a51dSDavid Daney  * marvell,reg-init property stored in the of_node for the phydev.
477cf41a51dSDavid Daney  *
478cf41a51dSDavid Daney  * marvell,reg-init = <reg-page reg mask value>,...;
479cf41a51dSDavid Daney  *
480cf41a51dSDavid Daney  * There may be one or more sets of <reg-page reg mask value>:
481cf41a51dSDavid Daney  *
482cf41a51dSDavid Daney  * reg-page: which register bank to use.
483cf41a51dSDavid Daney  * reg: the register.
484cf41a51dSDavid Daney  * mask: if non-zero, ANDed with existing register value.
485cf41a51dSDavid Daney  * value: ORed with the masked value and written to the regiser.
486cf41a51dSDavid Daney  *
487cf41a51dSDavid Daney  */
marvell_of_reg_init(struct phy_device * phydev)488cf41a51dSDavid Daney static int marvell_of_reg_init(struct phy_device *phydev)
489cf41a51dSDavid Daney {
490cf41a51dSDavid Daney 	const __be32 *paddr;
491424ca4c5SRussell King 	int len, i, saved_page, current_page, ret = 0;
492cf41a51dSDavid Daney 
493e5a03bfdSAndrew Lunn 	if (!phydev->mdio.dev.of_node)
494cf41a51dSDavid Daney 		return 0;
495cf41a51dSDavid Daney 
496e5a03bfdSAndrew Lunn 	paddr = of_get_property(phydev->mdio.dev.of_node,
497e5a03bfdSAndrew Lunn 				"marvell,reg-init", &len);
498cf41a51dSDavid Daney 	if (!paddr || len < (4 * sizeof(*paddr)))
499cf41a51dSDavid Daney 		return 0;
500cf41a51dSDavid Daney 
501424ca4c5SRussell King 	saved_page = phy_save_page(phydev);
502cf41a51dSDavid Daney 	if (saved_page < 0)
503424ca4c5SRussell King 		goto err;
504cf41a51dSDavid Daney 	current_page = saved_page;
505cf41a51dSDavid Daney 
506cf41a51dSDavid Daney 	len /= sizeof(*paddr);
507cf41a51dSDavid Daney 	for (i = 0; i < len - 3; i += 4) {
5086427bb2dSAndrew Lunn 		u16 page = be32_to_cpup(paddr + i);
509cf41a51dSDavid Daney 		u16 reg = be32_to_cpup(paddr + i + 1);
510cf41a51dSDavid Daney 		u16 mask = be32_to_cpup(paddr + i + 2);
511cf41a51dSDavid Daney 		u16 val_bits = be32_to_cpup(paddr + i + 3);
512cf41a51dSDavid Daney 		int val;
513cf41a51dSDavid Daney 
5146427bb2dSAndrew Lunn 		if (page != current_page) {
5156427bb2dSAndrew Lunn 			current_page = page;
516424ca4c5SRussell King 			ret = marvell_write_page(phydev, page);
517cf41a51dSDavid Daney 			if (ret < 0)
518cf41a51dSDavid Daney 				goto err;
519cf41a51dSDavid Daney 		}
520cf41a51dSDavid Daney 
521cf41a51dSDavid Daney 		val = 0;
522cf41a51dSDavid Daney 		if (mask) {
523424ca4c5SRussell King 			val = __phy_read(phydev, reg);
524cf41a51dSDavid Daney 			if (val < 0) {
525cf41a51dSDavid Daney 				ret = val;
526cf41a51dSDavid Daney 				goto err;
527cf41a51dSDavid Daney 			}
528cf41a51dSDavid Daney 			val &= mask;
529cf41a51dSDavid Daney 		}
530cf41a51dSDavid Daney 		val |= val_bits;
531cf41a51dSDavid Daney 
532424ca4c5SRussell King 		ret = __phy_write(phydev, reg, val);
533cf41a51dSDavid Daney 		if (ret < 0)
534cf41a51dSDavid Daney 			goto err;
535cf41a51dSDavid Daney 	}
536cf41a51dSDavid Daney err:
537424ca4c5SRussell King 	return phy_restore_page(phydev, saved_page, ret);
538cf41a51dSDavid Daney }
539cf41a51dSDavid Daney #else
marvell_of_reg_init(struct phy_device * phydev)540cf41a51dSDavid Daney static int marvell_of_reg_init(struct phy_device *phydev)
541cf41a51dSDavid Daney {
542cf41a51dSDavid Daney 	return 0;
543cf41a51dSDavid Daney }
544cf41a51dSDavid Daney #endif /* CONFIG_OF_MDIO */
545cf41a51dSDavid Daney 
m88e1121_config_aneg_rgmii_delays(struct phy_device * phydev)546864dc729SAndrew Lunn static int m88e1121_config_aneg_rgmii_delays(struct phy_device *phydev)
547140bc929SSergei Poselenov {
548424ca4c5SRussell King 	int mscr;
549c477d044SCyril Chemparathy 
550c477d044SCyril Chemparathy 	if (phydev->interface == PHY_INTERFACE_MODE_RGMII_ID)
551424ca4c5SRussell King 		mscr = MII_88E1121_PHY_MSCR_RX_DELAY |
552424ca4c5SRussell King 		       MII_88E1121_PHY_MSCR_TX_DELAY;
553c477d044SCyril Chemparathy 	else if (phydev->interface == PHY_INTERFACE_MODE_RGMII_RXID)
554424ca4c5SRussell King 		mscr = MII_88E1121_PHY_MSCR_RX_DELAY;
555c477d044SCyril Chemparathy 	else if (phydev->interface == PHY_INTERFACE_MODE_RGMII_TXID)
556424ca4c5SRussell King 		mscr = MII_88E1121_PHY_MSCR_TX_DELAY;
557424ca4c5SRussell King 	else
558424ca4c5SRussell King 		mscr = 0;
559c477d044SCyril Chemparathy 
560fe4f57bfSPavel Parkhomenko 	return phy_modify_paged_changed(phydev, MII_MARVELL_MSCR_PAGE,
561424ca4c5SRussell King 					MII_88E1121_PHY_MSCR_REG,
562424ca4c5SRussell King 					MII_88E1121_PHY_MSCR_DELAY_MASK, mscr);
563be8c6480SArnaud Patard }
564c477d044SCyril Chemparathy 
m88e1121_config_aneg(struct phy_device * phydev)565864dc729SAndrew Lunn static int m88e1121_config_aneg(struct phy_device *phydev)
566864dc729SAndrew Lunn {
567d6ab9336SFlorian Fainelli 	int changed = 0;
568864dc729SAndrew Lunn 	int err = 0;
569864dc729SAndrew Lunn 
570864dc729SAndrew Lunn 	if (phy_interface_is_rgmii(phydev)) {
571864dc729SAndrew Lunn 		err = m88e1121_config_aneg_rgmii_delays(phydev);
572fea23fb5SRussell King 		if (err < 0)
573864dc729SAndrew Lunn 			return err;
574864dc729SAndrew Lunn 	}
575140bc929SSergei Poselenov 
576fe4f57bfSPavel Parkhomenko 	changed = err;
577fe4f57bfSPavel Parkhomenko 
578fecd5e91SAndrew Lunn 	err = marvell_set_polarity(phydev, phydev->mdix_ctrl);
579140bc929SSergei Poselenov 	if (err < 0)
580140bc929SSergei Poselenov 		return err;
581140bc929SSergei Poselenov 
582fe4f57bfSPavel Parkhomenko 	changed |= err;
583d6ab9336SFlorian Fainelli 
584d6ab9336SFlorian Fainelli 	err = genphy_config_aneg(phydev);
585d6ab9336SFlorian Fainelli 	if (err < 0)
586d6ab9336SFlorian Fainelli 		return err;
587d6ab9336SFlorian Fainelli 
5884b1bd697SDavid S. Miller 	if (phydev->autoneg != AUTONEG_ENABLE || changed) {
589d6ab9336SFlorian Fainelli 		/* A software reset is used to ensure a "commit" of the
590d6ab9336SFlorian Fainelli 		 * changes is done.
591d6ab9336SFlorian Fainelli 		 */
592d6ab9336SFlorian Fainelli 		err = genphy_soft_reset(phydev);
593d6ab9336SFlorian Fainelli 		if (err < 0)
594d6ab9336SFlorian Fainelli 			return err;
595d6ab9336SFlorian Fainelli 	}
596d6ab9336SFlorian Fainelli 
597d6ab9336SFlorian Fainelli 	return 0;
598140bc929SSergei Poselenov }
599140bc929SSergei Poselenov 
m88e1318_config_aneg(struct phy_device * phydev)600337ac9d5SCyril Chemparathy static int m88e1318_config_aneg(struct phy_device *phydev)
6013ff1c259SCyril Chemparathy {
602424ca4c5SRussell King 	int err;
6033ff1c259SCyril Chemparathy 
604424ca4c5SRussell King 	err = phy_modify_paged(phydev, MII_MARVELL_MSCR_PAGE,
605424ca4c5SRussell King 			       MII_88E1318S_PHY_MSCR1_REG,
606424ca4c5SRussell King 			       0, MII_88E1318S_PHY_MSCR1_PAD_ODD);
6073ff1c259SCyril Chemparathy 	if (err < 0)
6083ff1c259SCyril Chemparathy 		return err;
6093ff1c259SCyril Chemparathy 
6103ff1c259SCyril Chemparathy 	return m88e1121_config_aneg(phydev);
6113ff1c259SCyril Chemparathy }
6123ff1c259SCyril Chemparathy 
61378301ebeSCharles-Antoine Couret /**
6143c1bcc86SAndrew Lunn  * linkmode_adv_to_fiber_adv_t
6153c1bcc86SAndrew Lunn  * @advertise: the linkmode advertisement settings
61678301ebeSCharles-Antoine Couret  *
6173c1bcc86SAndrew Lunn  * A small helper function that translates linkmode advertisement
6183c1bcc86SAndrew Lunn  * settings to phy autonegotiation advertisements for the MII_ADV
6193c1bcc86SAndrew Lunn  * register for fiber link.
62078301ebeSCharles-Antoine Couret  */
linkmode_adv_to_fiber_adv_t(unsigned long * advertise)6213c1bcc86SAndrew Lunn static inline u32 linkmode_adv_to_fiber_adv_t(unsigned long *advertise)
62278301ebeSCharles-Antoine Couret {
62378301ebeSCharles-Antoine Couret 	u32 result = 0;
62478301ebeSCharles-Antoine Couret 
6253c1bcc86SAndrew Lunn 	if (linkmode_test_bit(ETHTOOL_LINK_MODE_1000baseT_Half_BIT, advertise))
62620ecf424SRussell King 		result |= ADVERTISE_1000XHALF;
6273c1bcc86SAndrew Lunn 	if (linkmode_test_bit(ETHTOOL_LINK_MODE_1000baseT_Full_BIT, advertise))
62820ecf424SRussell King 		result |= ADVERTISE_1000XFULL;
62978301ebeSCharles-Antoine Couret 
6303c1bcc86SAndrew Lunn 	if (linkmode_test_bit(ETHTOOL_LINK_MODE_Asym_Pause_BIT, advertise) &&
6313c1bcc86SAndrew Lunn 	    linkmode_test_bit(ETHTOOL_LINK_MODE_Pause_BIT, advertise))
63220ecf424SRussell King 		result |= ADVERTISE_1000XPSE_ASYM;
6333c1bcc86SAndrew Lunn 	else if (linkmode_test_bit(ETHTOOL_LINK_MODE_Pause_BIT, advertise))
63420ecf424SRussell King 		result |= ADVERTISE_1000XPAUSE;
63578301ebeSCharles-Antoine Couret 
63678301ebeSCharles-Antoine Couret 	return result;
63778301ebeSCharles-Antoine Couret }
63878301ebeSCharles-Antoine Couret 
63978301ebeSCharles-Antoine Couret /**
64078301ebeSCharles-Antoine Couret  * marvell_config_aneg_fiber - restart auto-negotiation or write BMCR
64178301ebeSCharles-Antoine Couret  * @phydev: target phy_device struct
64278301ebeSCharles-Antoine Couret  *
64378301ebeSCharles-Antoine Couret  * Description: If auto-negotiation is enabled, we configure the
64478301ebeSCharles-Antoine Couret  *   advertising, and then restart auto-negotiation.  If it is not
64578301ebeSCharles-Antoine Couret  *   enabled, then we write the BMCR. Adapted for fiber link in
64678301ebeSCharles-Antoine Couret  *   some Marvell's devices.
64778301ebeSCharles-Antoine Couret  */
marvell_config_aneg_fiber(struct phy_device * phydev)64878301ebeSCharles-Antoine Couret static int marvell_config_aneg_fiber(struct phy_device *phydev)
64978301ebeSCharles-Antoine Couret {
65078301ebeSCharles-Antoine Couret 	int changed = 0;
65178301ebeSCharles-Antoine Couret 	int err;
6529f4bae70SRussell King 	u16 adv;
65378301ebeSCharles-Antoine Couret 
65478301ebeSCharles-Antoine Couret 	if (phydev->autoneg != AUTONEG_ENABLE)
65578301ebeSCharles-Antoine Couret 		return genphy_setup_forced(phydev);
65678301ebeSCharles-Antoine Couret 
65778301ebeSCharles-Antoine Couret 	/* Only allow advertising what this PHY supports */
6583c1bcc86SAndrew Lunn 	linkmode_and(phydev->advertising, phydev->advertising,
6593c1bcc86SAndrew Lunn 		     phydev->supported);
66078301ebeSCharles-Antoine Couret 
6619f4bae70SRussell King 	adv = linkmode_adv_to_fiber_adv_t(phydev->advertising);
6629f4bae70SRussell King 
66378301ebeSCharles-Antoine Couret 	/* Setup fiber advertisement */
6649f4bae70SRussell King 	err = phy_modify_changed(phydev, MII_ADVERTISE,
6659f4bae70SRussell King 				 ADVERTISE_1000XHALF | ADVERTISE_1000XFULL |
6669f4bae70SRussell King 				 ADVERTISE_1000XPAUSE | ADVERTISE_1000XPSE_ASYM,
6679f4bae70SRussell King 				 adv);
66878301ebeSCharles-Antoine Couret 	if (err < 0)
66978301ebeSCharles-Antoine Couret 		return err;
6709f4bae70SRussell King 	if (err > 0)
67178301ebeSCharles-Antoine Couret 		changed = 1;
67278301ebeSCharles-Antoine Couret 
673b5abac2dSRussell King 	return genphy_check_and_restart_aneg(phydev, changed);
67478301ebeSCharles-Antoine Couret }
67578301ebeSCharles-Antoine Couret 
m88e1111_config_aneg(struct phy_device * phydev)6761887023aSRobert Hancock static int m88e1111_config_aneg(struct phy_device *phydev)
6771887023aSRobert Hancock {
6781887023aSRobert Hancock 	int extsr = phy_read(phydev, MII_M1111_PHY_EXT_SR);
6791887023aSRobert Hancock 	int err;
6801887023aSRobert Hancock 
6811887023aSRobert Hancock 	if (extsr < 0)
6821887023aSRobert Hancock 		return extsr;
6831887023aSRobert Hancock 
6841887023aSRobert Hancock 	/* If not using SGMII or copper 1000BaseX modes, use normal process.
6851887023aSRobert Hancock 	 * Steps below are only required for these modes.
6861887023aSRobert Hancock 	 */
6871887023aSRobert Hancock 	if (phydev->interface != PHY_INTERFACE_MODE_SGMII &&
6881887023aSRobert Hancock 	    (extsr & MII_M1111_HWCFG_MODE_MASK) !=
6891887023aSRobert Hancock 	    MII_M1111_HWCFG_MODE_COPPER_1000X_AN)
6901887023aSRobert Hancock 		return marvell_config_aneg(phydev);
6911887023aSRobert Hancock 
6921887023aSRobert Hancock 	err = marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE);
6931887023aSRobert Hancock 	if (err < 0)
6941887023aSRobert Hancock 		goto error;
6951887023aSRobert Hancock 
6961887023aSRobert Hancock 	/* Configure the copper link first */
6971887023aSRobert Hancock 	err = marvell_config_aneg(phydev);
6981887023aSRobert Hancock 	if (err < 0)
6991887023aSRobert Hancock 		goto error;
7001887023aSRobert Hancock 
7011887023aSRobert Hancock 	/* Then the fiber link */
7021887023aSRobert Hancock 	err = marvell_set_page(phydev, MII_MARVELL_FIBER_PAGE);
7031887023aSRobert Hancock 	if (err < 0)
7041887023aSRobert Hancock 		goto error;
7051887023aSRobert Hancock 
70606b334f0SRobert Hancock 	if (phydev->interface == PHY_INTERFACE_MODE_SGMII)
70706b334f0SRobert Hancock 		/* Do not touch the fiber advertisement if we're in copper->sgmii mode.
70806b334f0SRobert Hancock 		 * Just ensure that SGMII-side autonegotiation is enabled.
70906b334f0SRobert Hancock 		 * If we switched from some other mode to SGMII it may not be.
71006b334f0SRobert Hancock 		 */
71106b334f0SRobert Hancock 		err = genphy_check_and_restart_aneg(phydev, false);
71206b334f0SRobert Hancock 	else
7131887023aSRobert Hancock 		err = marvell_config_aneg_fiber(phydev);
7141887023aSRobert Hancock 	if (err < 0)
7151887023aSRobert Hancock 		goto error;
7161887023aSRobert Hancock 
7171887023aSRobert Hancock 	return marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE);
7181887023aSRobert Hancock 
7191887023aSRobert Hancock error:
7201887023aSRobert Hancock 	marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE);
7211887023aSRobert Hancock 	return err;
7221887023aSRobert Hancock }
7231887023aSRobert Hancock 
m88e1510_config_aneg(struct phy_device * phydev)72410e24caaSMichal Simek static int m88e1510_config_aneg(struct phy_device *phydev)
72510e24caaSMichal Simek {
72610e24caaSMichal Simek 	int err;
72710e24caaSMichal Simek 
72852295666SAndrew Lunn 	err = marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE);
72978301ebeSCharles-Antoine Couret 	if (err < 0)
73078301ebeSCharles-Antoine Couret 		goto error;
73178301ebeSCharles-Antoine Couret 
73278301ebeSCharles-Antoine Couret 	/* Configure the copper link first */
73310e24caaSMichal Simek 	err = m88e1318_config_aneg(phydev);
73410e24caaSMichal Simek 	if (err < 0)
73578301ebeSCharles-Antoine Couret 		goto error;
73610e24caaSMichal Simek 
737de9c4e06SRussell King 	/* Do not touch the fiber page if we're in copper->sgmii mode */
738de9c4e06SRussell King 	if (phydev->interface == PHY_INTERFACE_MODE_SGMII)
739de9c4e06SRussell King 		return 0;
740de9c4e06SRussell King 
74178301ebeSCharles-Antoine Couret 	/* Then the fiber link */
74252295666SAndrew Lunn 	err = marvell_set_page(phydev, MII_MARVELL_FIBER_PAGE);
74378301ebeSCharles-Antoine Couret 	if (err < 0)
74478301ebeSCharles-Antoine Couret 		goto error;
74578301ebeSCharles-Antoine Couret 
74678301ebeSCharles-Antoine Couret 	err = marvell_config_aneg_fiber(phydev);
74778301ebeSCharles-Antoine Couret 	if (err < 0)
74878301ebeSCharles-Antoine Couret 		goto error;
74978301ebeSCharles-Antoine Couret 
75052295666SAndrew Lunn 	return marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE);
75178301ebeSCharles-Antoine Couret 
75278301ebeSCharles-Antoine Couret error:
75352295666SAndrew Lunn 	marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE);
75478301ebeSCharles-Antoine Couret 	return err;
75579be1a1cSClemens Gruber }
75679be1a1cSClemens Gruber 
marvell_config_led(struct phy_device * phydev)75707777246SWang Dongsheng static void marvell_config_led(struct phy_device *phydev)
75807777246SWang Dongsheng {
75907777246SWang Dongsheng 	u16 def_config;
76007777246SWang Dongsheng 	int err;
76107777246SWang Dongsheng 
76207777246SWang Dongsheng 	switch (MARVELL_PHY_FAMILY_ID(phydev->phy_id)) {
76307777246SWang Dongsheng 	/* Default PHY LED config: LED[0] .. Link, LED[1] .. Activity */
76407777246SWang Dongsheng 	case MARVELL_PHY_FAMILY_ID(MARVELL_PHY_ID_88E1121R):
76507777246SWang Dongsheng 	case MARVELL_PHY_FAMILY_ID(MARVELL_PHY_ID_88E1318S):
76607777246SWang Dongsheng 		def_config = MII_88E1121_PHY_LED_DEF;
76707777246SWang Dongsheng 		break;
76807777246SWang Dongsheng 	/* Default PHY LED config:
76907777246SWang Dongsheng 	 * LED[0] .. 1000Mbps Link
77007777246SWang Dongsheng 	 * LED[1] .. 100Mbps Link
77107777246SWang Dongsheng 	 * LED[2] .. Blink, Activity
77207777246SWang Dongsheng 	 */
77307777246SWang Dongsheng 	case MARVELL_PHY_FAMILY_ID(MARVELL_PHY_ID_88E1510):
774a93f7fe1SJian Shen 		if (phydev->dev_flags & MARVELL_PHY_LED0_LINK_LED1_ACTIVE)
775a93f7fe1SJian Shen 			def_config = MII_88E1510_PHY_LED0_LINK_LED1_ACTIVE;
776a93f7fe1SJian Shen 		else
77707777246SWang Dongsheng 			def_config = MII_88E1510_PHY_LED_DEF;
77807777246SWang Dongsheng 		break;
77907777246SWang Dongsheng 	default:
78007777246SWang Dongsheng 		return;
78107777246SWang Dongsheng 	}
78207777246SWang Dongsheng 
78307777246SWang Dongsheng 	err = phy_write_paged(phydev, MII_MARVELL_LED_PAGE, MII_PHY_LED_CTRL,
78407777246SWang Dongsheng 			      def_config);
78507777246SWang Dongsheng 	if (err < 0)
786ab2a605fSAndrew Lunn 		phydev_warn(phydev, "Fail to config marvell phy LED.\n");
78707777246SWang Dongsheng }
78807777246SWang Dongsheng 
marvell_config_init(struct phy_device * phydev)78979be1a1cSClemens Gruber static int marvell_config_init(struct phy_device *phydev)
79079be1a1cSClemens Gruber {
79185bec4bcSBhaskar Chowdhury 	/* Set default LED */
79207777246SWang Dongsheng 	marvell_config_led(phydev);
79307777246SWang Dongsheng 
79479be1a1cSClemens Gruber 	/* Set registers from marvell,reg-init DT property */
79510e24caaSMichal Simek 	return marvell_of_reg_init(phydev);
79610e24caaSMichal Simek }
79710e24caaSMichal Simek 
m88e3016_config_init(struct phy_device * phydev)7986b358aedSSebastian Hesselbarth static int m88e3016_config_init(struct phy_device *phydev)
7996b358aedSSebastian Hesselbarth {
800fea23fb5SRussell King 	int ret;
8016b358aedSSebastian Hesselbarth 
8026b358aedSSebastian Hesselbarth 	/* Enable Scrambler and Auto-Crossover */
803fea23fb5SRussell King 	ret = phy_modify(phydev, MII_88E3016_PHY_SPEC_CTRL,
804f102852fSRussell King 			 MII_88E3016_DISABLE_SCRAMBLER,
805fea23fb5SRussell King 			 MII_88E3016_AUTO_MDIX_CROSSOVER);
806fea23fb5SRussell King 	if (ret < 0)
807fea23fb5SRussell King 		return ret;
8086b358aedSSebastian Hesselbarth 
80979be1a1cSClemens Gruber 	return marvell_config_init(phydev);
8106b358aedSSebastian Hesselbarth }
8116b358aedSSebastian Hesselbarth 
m88e1111_config_init_hwcfg_mode(struct phy_device * phydev,u16 mode,int fibre_copper_auto)812865b813aSAndrew Lunn static int m88e1111_config_init_hwcfg_mode(struct phy_device *phydev,
813865b813aSAndrew Lunn 					   u16 mode,
814865b813aSAndrew Lunn 					   int fibre_copper_auto)
815865b813aSAndrew Lunn {
816865b813aSAndrew Lunn 	if (fibre_copper_auto)
817fea23fb5SRussell King 		mode |= MII_M1111_HWCFG_FIBER_COPPER_AUTO;
818865b813aSAndrew Lunn 
819fea23fb5SRussell King 	return phy_modify(phydev, MII_M1111_PHY_EXT_SR,
820f102852fSRussell King 			  MII_M1111_HWCFG_MODE_MASK |
821fea23fb5SRussell King 			  MII_M1111_HWCFG_FIBER_COPPER_AUTO |
822f102852fSRussell King 			  MII_M1111_HWCFG_FIBER_COPPER_RES,
823fea23fb5SRussell King 			  mode);
824865b813aSAndrew Lunn }
825865b813aSAndrew Lunn 
m88e1111_config_init_rgmii_delays(struct phy_device * phydev)82661111598SAndrew Lunn static int m88e1111_config_init_rgmii_delays(struct phy_device *phydev)
827895ee682SKim Phillips {
828fea23fb5SRussell King 	int delay;
829895ee682SKim Phillips 
83016d4d650SWeihang Li 	switch (phydev->interface) {
83116d4d650SWeihang Li 	case PHY_INTERFACE_MODE_RGMII_ID:
832fea23fb5SRussell King 		delay = MII_M1111_RGMII_RX_DELAY | MII_M1111_RGMII_TX_DELAY;
83316d4d650SWeihang Li 		break;
83416d4d650SWeihang Li 	case PHY_INTERFACE_MODE_RGMII_RXID:
835fea23fb5SRussell King 		delay = MII_M1111_RGMII_RX_DELAY;
83616d4d650SWeihang Li 		break;
83716d4d650SWeihang Li 	case PHY_INTERFACE_MODE_RGMII_TXID:
838fea23fb5SRussell King 		delay = MII_M1111_RGMII_TX_DELAY;
83916d4d650SWeihang Li 		break;
84016d4d650SWeihang Li 	default:
841fea23fb5SRussell King 		delay = 0;
84216d4d650SWeihang Li 		break;
8439daf5a76SKim Phillips 	}
844895ee682SKim Phillips 
845fea23fb5SRussell King 	return phy_modify(phydev, MII_M1111_PHY_EXT_CR,
846f102852fSRussell King 			  MII_M1111_RGMII_RX_DELAY | MII_M1111_RGMII_TX_DELAY,
847fea23fb5SRussell King 			  delay);
84861111598SAndrew Lunn }
84961111598SAndrew Lunn 
m88e1111_config_init_rgmii(struct phy_device * phydev)85061111598SAndrew Lunn static int m88e1111_config_init_rgmii(struct phy_device *phydev)
85161111598SAndrew Lunn {
85261111598SAndrew Lunn 	int temp;
85361111598SAndrew Lunn 	int err;
85461111598SAndrew Lunn 
85561111598SAndrew Lunn 	err = m88e1111_config_init_rgmii_delays(phydev);
856895ee682SKim Phillips 	if (err < 0)
857895ee682SKim Phillips 		return err;
858895ee682SKim Phillips 
859895ee682SKim Phillips 	temp = phy_read(phydev, MII_M1111_PHY_EXT_SR);
860895ee682SKim Phillips 	if (temp < 0)
861895ee682SKim Phillips 		return temp;
862895ee682SKim Phillips 
863895ee682SKim Phillips 	temp &= ~(MII_M1111_HWCFG_MODE_MASK);
864be937f1fSAlexandr Smirnov 
8657239016dSWang Jian 	if (temp & MII_M1111_HWCFG_FIBER_COPPER_RES)
866be937f1fSAlexandr Smirnov 		temp |= MII_M1111_HWCFG_MODE_FIBER_RGMII;
867be937f1fSAlexandr Smirnov 	else
868be937f1fSAlexandr Smirnov 		temp |= MII_M1111_HWCFG_MODE_COPPER_RGMII;
869895ee682SKim Phillips 
870e1dde8dcSAndrew Lunn 	return phy_write(phydev, MII_M1111_PHY_EXT_SR, temp);
871895ee682SKim Phillips }
872895ee682SKim Phillips 
m88e1111_config_init_sgmii(struct phy_device * phydev)873e1dde8dcSAndrew Lunn static int m88e1111_config_init_sgmii(struct phy_device *phydev)
874e1dde8dcSAndrew Lunn {
875e1dde8dcSAndrew Lunn 	int err;
876e1dde8dcSAndrew Lunn 
877865b813aSAndrew Lunn 	err = m88e1111_config_init_hwcfg_mode(
878865b813aSAndrew Lunn 		phydev,
879865b813aSAndrew Lunn 		MII_M1111_HWCFG_MODE_SGMII_NO_CLK,
880865b813aSAndrew Lunn 		MII_M1111_HWCFG_FIBER_COPPER_AUTO);
8814117b5beSKapil Juneja 	if (err < 0)
8824117b5beSKapil Juneja 		return err;
88307151bc9SMadalin Bucur 
88407151bc9SMadalin Bucur 	/* make sure copper is selected */
88552295666SAndrew Lunn 	return marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE);
8864117b5beSKapil Juneja }
8874117b5beSKapil Juneja 
m88e1111_config_init_rtbi(struct phy_device * phydev)888e1dde8dcSAndrew Lunn static int m88e1111_config_init_rtbi(struct phy_device *phydev)
889e1dde8dcSAndrew Lunn {
89061111598SAndrew Lunn 	int err;
891e1dde8dcSAndrew Lunn 
89261111598SAndrew Lunn 	err = m88e1111_config_init_rgmii_delays(phydev);
893fea23fb5SRussell King 	if (err < 0)
8945f8cbc13SLiu Yu-B13201 		return err;
8955f8cbc13SLiu Yu-B13201 
896865b813aSAndrew Lunn 	err = m88e1111_config_init_hwcfg_mode(
897865b813aSAndrew Lunn 		phydev,
898865b813aSAndrew Lunn 		MII_M1111_HWCFG_MODE_RTBI,
899865b813aSAndrew Lunn 		MII_M1111_HWCFG_FIBER_COPPER_AUTO);
9005f8cbc13SLiu Yu-B13201 	if (err < 0)
9015f8cbc13SLiu Yu-B13201 		return err;
9025f8cbc13SLiu Yu-B13201 
9035f8cbc13SLiu Yu-B13201 	/* soft reset */
90434386344SAndrew Lunn 	err = genphy_soft_reset(phydev);
9055f8cbc13SLiu Yu-B13201 	if (err < 0)
9065f8cbc13SLiu Yu-B13201 		return err;
907e1dde8dcSAndrew Lunn 
908865b813aSAndrew Lunn 	return m88e1111_config_init_hwcfg_mode(
909865b813aSAndrew Lunn 		phydev,
910865b813aSAndrew Lunn 		MII_M1111_HWCFG_MODE_RTBI,
911865b813aSAndrew Lunn 		MII_M1111_HWCFG_FIBER_COPPER_AUTO);
912e1dde8dcSAndrew Lunn }
913e1dde8dcSAndrew Lunn 
m88e1111_config_init_1000basex(struct phy_device * phydev)9141887023aSRobert Hancock static int m88e1111_config_init_1000basex(struct phy_device *phydev)
9151887023aSRobert Hancock {
9161887023aSRobert Hancock 	int extsr = phy_read(phydev, MII_M1111_PHY_EXT_SR);
9171887023aSRobert Hancock 	int err, mode;
9181887023aSRobert Hancock 
9191887023aSRobert Hancock 	if (extsr < 0)
9201887023aSRobert Hancock 		return extsr;
9211887023aSRobert Hancock 
9221887023aSRobert Hancock 	/* If using copper mode, ensure 1000BaseX auto-negotiation is enabled */
9231887023aSRobert Hancock 	mode = extsr & MII_M1111_HWCFG_MODE_MASK;
9241887023aSRobert Hancock 	if (mode == MII_M1111_HWCFG_MODE_COPPER_1000X_NOAN) {
9251887023aSRobert Hancock 		err = phy_modify(phydev, MII_M1111_PHY_EXT_SR,
9261887023aSRobert Hancock 				 MII_M1111_HWCFG_MODE_MASK |
9271887023aSRobert Hancock 				 MII_M1111_HWCFG_SERIAL_AN_BYPASS,
9281887023aSRobert Hancock 				 MII_M1111_HWCFG_MODE_COPPER_1000X_AN |
9291887023aSRobert Hancock 				 MII_M1111_HWCFG_SERIAL_AN_BYPASS);
9301887023aSRobert Hancock 		if (err < 0)
9311887023aSRobert Hancock 			return err;
9321887023aSRobert Hancock 	}
9331887023aSRobert Hancock 	return 0;
9341887023aSRobert Hancock }
9351887023aSRobert Hancock 
m88e1111_config_init(struct phy_device * phydev)936e1dde8dcSAndrew Lunn static int m88e1111_config_init(struct phy_device *phydev)
937e1dde8dcSAndrew Lunn {
938e1dde8dcSAndrew Lunn 	int err;
939e1dde8dcSAndrew Lunn 
940e1dde8dcSAndrew Lunn 	if (phy_interface_is_rgmii(phydev)) {
941e1dde8dcSAndrew Lunn 		err = m88e1111_config_init_rgmii(phydev);
942fea23fb5SRussell King 		if (err < 0)
943e1dde8dcSAndrew Lunn 			return err;
944e1dde8dcSAndrew Lunn 	}
945e1dde8dcSAndrew Lunn 
946e1dde8dcSAndrew Lunn 	if (phydev->interface == PHY_INTERFACE_MODE_SGMII) {
947e1dde8dcSAndrew Lunn 		err = m88e1111_config_init_sgmii(phydev);
948e1dde8dcSAndrew Lunn 		if (err < 0)
949e1dde8dcSAndrew Lunn 			return err;
950e1dde8dcSAndrew Lunn 	}
951e1dde8dcSAndrew Lunn 
952e1dde8dcSAndrew Lunn 	if (phydev->interface == PHY_INTERFACE_MODE_RTBI) {
953e1dde8dcSAndrew Lunn 		err = m88e1111_config_init_rtbi(phydev);
9545f8cbc13SLiu Yu-B13201 		if (err < 0)
9555f8cbc13SLiu Yu-B13201 			return err;
9565f8cbc13SLiu Yu-B13201 	}
9575f8cbc13SLiu Yu-B13201 
9581887023aSRobert Hancock 	if (phydev->interface == PHY_INTERFACE_MODE_1000BASEX) {
9591887023aSRobert Hancock 		err = m88e1111_config_init_1000basex(phydev);
9601887023aSRobert Hancock 		if (err < 0)
9611887023aSRobert Hancock 			return err;
9621887023aSRobert Hancock 	}
9631887023aSRobert Hancock 
964cf41a51dSDavid Daney 	err = marvell_of_reg_init(phydev);
965cf41a51dSDavid Daney 	if (err < 0)
966cf41a51dSDavid Daney 		return err;
9675f8cbc13SLiu Yu-B13201 
9680ed99eccSRobert Hancock 	err = genphy_soft_reset(phydev);
9690ed99eccSRobert Hancock 	if (err < 0)
9700ed99eccSRobert Hancock 		return err;
9710ed99eccSRobert Hancock 
9720ed99eccSRobert Hancock 	if (phydev->interface == PHY_INTERFACE_MODE_SGMII) {
9730ed99eccSRobert Hancock 		/* If the HWCFG_MODE was changed from another mode (such as
9740ed99eccSRobert Hancock 		 * 1000BaseX) to SGMII, the state of the support bits may have
9750ed99eccSRobert Hancock 		 * also changed now that the PHY has been reset.
9760ed99eccSRobert Hancock 		 * Update the PHY abilities accordingly.
9770ed99eccSRobert Hancock 		 */
9780ed99eccSRobert Hancock 		err = genphy_read_abilities(phydev);
9790ed99eccSRobert Hancock 		linkmode_or(phydev->advertising, phydev->advertising,
9800ed99eccSRobert Hancock 			    phydev->supported);
9810ed99eccSRobert Hancock 	}
9820ed99eccSRobert Hancock 	return err;
983895ee682SKim Phillips }
984895ee682SKim Phillips 
m88e1111_get_downshift(struct phy_device * phydev,u8 * data)9855c6bc519SHeiner Kallweit static int m88e1111_get_downshift(struct phy_device *phydev, u8 *data)
9865c6bc519SHeiner Kallweit {
9875c6bc519SHeiner Kallweit 	int val, cnt, enable;
9885c6bc519SHeiner Kallweit 
9895c6bc519SHeiner Kallweit 	val = phy_read(phydev, MII_M1111_PHY_EXT_CR);
9905c6bc519SHeiner Kallweit 	if (val < 0)
9915c6bc519SHeiner Kallweit 		return val;
9925c6bc519SHeiner Kallweit 
9935c6bc519SHeiner Kallweit 	enable = FIELD_GET(MII_M1111_PHY_EXT_CR_DOWNSHIFT_EN, val);
9945c6bc519SHeiner Kallweit 	cnt = FIELD_GET(MII_M1111_PHY_EXT_CR_DOWNSHIFT_MASK, val) + 1;
9955c6bc519SHeiner Kallweit 
9965c6bc519SHeiner Kallweit 	*data = enable ? cnt : DOWNSHIFT_DEV_DISABLE;
9975c6bc519SHeiner Kallweit 
9985c6bc519SHeiner Kallweit 	return 0;
9995c6bc519SHeiner Kallweit }
10005c6bc519SHeiner Kallweit 
m88e1111_set_downshift(struct phy_device * phydev,u8 cnt)10015c6bc519SHeiner Kallweit static int m88e1111_set_downshift(struct phy_device *phydev, u8 cnt)
10025c6bc519SHeiner Kallweit {
1003e7679c55SMaxim Kochetkov 	int val, err;
10045c6bc519SHeiner Kallweit 
10055c6bc519SHeiner Kallweit 	if (cnt > MII_M1111_PHY_EXT_CR_DOWNSHIFT_MAX)
10065c6bc519SHeiner Kallweit 		return -E2BIG;
10075c6bc519SHeiner Kallweit 
1008e7679c55SMaxim Kochetkov 	if (!cnt) {
1009e7679c55SMaxim Kochetkov 		err = phy_clear_bits(phydev, MII_M1111_PHY_EXT_CR,
10105c6bc519SHeiner Kallweit 				     MII_M1111_PHY_EXT_CR_DOWNSHIFT_EN);
1011e7679c55SMaxim Kochetkov 	} else {
10125c6bc519SHeiner Kallweit 		val = MII_M1111_PHY_EXT_CR_DOWNSHIFT_EN;
10135c6bc519SHeiner Kallweit 		val |= FIELD_PREP(MII_M1111_PHY_EXT_CR_DOWNSHIFT_MASK, cnt - 1);
10145c6bc519SHeiner Kallweit 
1015e7679c55SMaxim Kochetkov 		err = phy_modify(phydev, MII_M1111_PHY_EXT_CR,
10165c6bc519SHeiner Kallweit 				 MII_M1111_PHY_EXT_CR_DOWNSHIFT_EN |
10175c6bc519SHeiner Kallweit 				 MII_M1111_PHY_EXT_CR_DOWNSHIFT_MASK,
10185c6bc519SHeiner Kallweit 				 val);
10195c6bc519SHeiner Kallweit 	}
10205c6bc519SHeiner Kallweit 
1021e7679c55SMaxim Kochetkov 	if (err < 0)
1022e7679c55SMaxim Kochetkov 		return err;
1023e7679c55SMaxim Kochetkov 
1024e7679c55SMaxim Kochetkov 	return genphy_soft_reset(phydev);
1025e7679c55SMaxim Kochetkov }
1026e7679c55SMaxim Kochetkov 
m88e1111_get_tunable(struct phy_device * phydev,struct ethtool_tunable * tuna,void * data)10275c6bc519SHeiner Kallweit static int m88e1111_get_tunable(struct phy_device *phydev,
10285c6bc519SHeiner Kallweit 				struct ethtool_tunable *tuna, void *data)
10295c6bc519SHeiner Kallweit {
10305c6bc519SHeiner Kallweit 	switch (tuna->id) {
10315c6bc519SHeiner Kallweit 	case ETHTOOL_PHY_DOWNSHIFT:
10325c6bc519SHeiner Kallweit 		return m88e1111_get_downshift(phydev, data);
10335c6bc519SHeiner Kallweit 	default:
10345c6bc519SHeiner Kallweit 		return -EOPNOTSUPP;
10355c6bc519SHeiner Kallweit 	}
10365c6bc519SHeiner Kallweit }
10375c6bc519SHeiner Kallweit 
m88e1111_set_tunable(struct phy_device * phydev,struct ethtool_tunable * tuna,const void * data)10385c6bc519SHeiner Kallweit static int m88e1111_set_tunable(struct phy_device *phydev,
10395c6bc519SHeiner Kallweit 				struct ethtool_tunable *tuna, const void *data)
10405c6bc519SHeiner Kallweit {
10415c6bc519SHeiner Kallweit 	switch (tuna->id) {
10425c6bc519SHeiner Kallweit 	case ETHTOOL_PHY_DOWNSHIFT:
10435c6bc519SHeiner Kallweit 		return m88e1111_set_downshift(phydev, *(const u8 *)data);
10445c6bc519SHeiner Kallweit 	default:
10455c6bc519SHeiner Kallweit 		return -EOPNOTSUPP;
10465c6bc519SHeiner Kallweit 	}
10475c6bc519SHeiner Kallweit }
10485c6bc519SHeiner Kallweit 
m88e1011_get_downshift(struct phy_device * phydev,u8 * data)1049911af5e1SHeiner Kallweit static int m88e1011_get_downshift(struct phy_device *phydev, u8 *data)
1050a3bdfce7SHeiner Kallweit {
1051a3bdfce7SHeiner Kallweit 	int val, cnt, enable;
1052a3bdfce7SHeiner Kallweit 
1053a3bdfce7SHeiner Kallweit 	val = phy_read(phydev, MII_M1011_PHY_SCR);
1054a3bdfce7SHeiner Kallweit 	if (val < 0)
1055a3bdfce7SHeiner Kallweit 		return val;
1056a3bdfce7SHeiner Kallweit 
1057a3bdfce7SHeiner Kallweit 	enable = FIELD_GET(MII_M1011_PHY_SCR_DOWNSHIFT_EN, val);
1058f8d975beSHeiner Kallweit 	cnt = FIELD_GET(MII_M1011_PHY_SCR_DOWNSHIFT_MASK, val) + 1;
1059a3bdfce7SHeiner Kallweit 
1060a3bdfce7SHeiner Kallweit 	*data = enable ? cnt : DOWNSHIFT_DEV_DISABLE;
1061a3bdfce7SHeiner Kallweit 
1062a3bdfce7SHeiner Kallweit 	return 0;
1063a3bdfce7SHeiner Kallweit }
1064a3bdfce7SHeiner Kallweit 
m88e1011_set_downshift(struct phy_device * phydev,u8 cnt)1065911af5e1SHeiner Kallweit static int m88e1011_set_downshift(struct phy_device *phydev, u8 cnt)
1066a3bdfce7SHeiner Kallweit {
1067990875b2SMaxim Kochetkov 	int val, err;
1068a3bdfce7SHeiner Kallweit 
1069a3bdfce7SHeiner Kallweit 	if (cnt > MII_M1011_PHY_SCR_DOWNSHIFT_MAX)
1070a3bdfce7SHeiner Kallweit 		return -E2BIG;
1071a3bdfce7SHeiner Kallweit 
1072990875b2SMaxim Kochetkov 	if (!cnt) {
1073990875b2SMaxim Kochetkov 		err = phy_clear_bits(phydev, MII_M1011_PHY_SCR,
1074a3bdfce7SHeiner Kallweit 				     MII_M1011_PHY_SCR_DOWNSHIFT_EN);
1075990875b2SMaxim Kochetkov 	} else {
1076a3bdfce7SHeiner Kallweit 		val = MII_M1011_PHY_SCR_DOWNSHIFT_EN;
1077f8d975beSHeiner Kallweit 		val |= FIELD_PREP(MII_M1011_PHY_SCR_DOWNSHIFT_MASK, cnt - 1);
1078a3bdfce7SHeiner Kallweit 
1079990875b2SMaxim Kochetkov 		err = phy_modify(phydev, MII_M1011_PHY_SCR,
1080a3bdfce7SHeiner Kallweit 				 MII_M1011_PHY_SCR_DOWNSHIFT_EN |
1081f8d975beSHeiner Kallweit 				 MII_M1011_PHY_SCR_DOWNSHIFT_MASK,
1082a3bdfce7SHeiner Kallweit 				 val);
1083a3bdfce7SHeiner Kallweit 	}
1084a3bdfce7SHeiner Kallweit 
1085990875b2SMaxim Kochetkov 	if (err < 0)
1086990875b2SMaxim Kochetkov 		return err;
1087990875b2SMaxim Kochetkov 
1088990875b2SMaxim Kochetkov 	return genphy_soft_reset(phydev);
1089990875b2SMaxim Kochetkov }
1090990875b2SMaxim Kochetkov 
m88e1011_get_tunable(struct phy_device * phydev,struct ethtool_tunable * tuna,void * data)1091911af5e1SHeiner Kallweit static int m88e1011_get_tunable(struct phy_device *phydev,
1092a3bdfce7SHeiner Kallweit 				struct ethtool_tunable *tuna, void *data)
1093a3bdfce7SHeiner Kallweit {
1094a3bdfce7SHeiner Kallweit 	switch (tuna->id) {
1095a3bdfce7SHeiner Kallweit 	case ETHTOOL_PHY_DOWNSHIFT:
1096911af5e1SHeiner Kallweit 		return m88e1011_get_downshift(phydev, data);
1097a3bdfce7SHeiner Kallweit 	default:
1098a3bdfce7SHeiner Kallweit 		return -EOPNOTSUPP;
1099a3bdfce7SHeiner Kallweit 	}
1100a3bdfce7SHeiner Kallweit }
1101a3bdfce7SHeiner Kallweit 
m88e1011_set_tunable(struct phy_device * phydev,struct ethtool_tunable * tuna,const void * data)1102911af5e1SHeiner Kallweit static int m88e1011_set_tunable(struct phy_device *phydev,
1103a3bdfce7SHeiner Kallweit 				struct ethtool_tunable *tuna, const void *data)
1104a3bdfce7SHeiner Kallweit {
1105a3bdfce7SHeiner Kallweit 	switch (tuna->id) {
1106a3bdfce7SHeiner Kallweit 	case ETHTOOL_PHY_DOWNSHIFT:
1107911af5e1SHeiner Kallweit 		return m88e1011_set_downshift(phydev, *(const u8 *)data);
1108a3bdfce7SHeiner Kallweit 	default:
1109a3bdfce7SHeiner Kallweit 		return -EOPNOTSUPP;
1110a3bdfce7SHeiner Kallweit 	}
1111a3bdfce7SHeiner Kallweit }
1112a3bdfce7SHeiner Kallweit 
m88e1112_config_init(struct phy_device * phydev)11138385b1f0SMaxim Kochetkov static int m88e1112_config_init(struct phy_device *phydev)
11148385b1f0SMaxim Kochetkov {
11158385b1f0SMaxim Kochetkov 	int err;
11168385b1f0SMaxim Kochetkov 
11178385b1f0SMaxim Kochetkov 	err = m88e1011_set_downshift(phydev, 3);
11188385b1f0SMaxim Kochetkov 	if (err < 0)
11198385b1f0SMaxim Kochetkov 		return err;
11208385b1f0SMaxim Kochetkov 
11218385b1f0SMaxim Kochetkov 	return m88e1111_config_init(phydev);
11228385b1f0SMaxim Kochetkov }
11238385b1f0SMaxim Kochetkov 
m88e1111gbe_config_init(struct phy_device * phydev)11248385b1f0SMaxim Kochetkov static int m88e1111gbe_config_init(struct phy_device *phydev)
11258385b1f0SMaxim Kochetkov {
11268385b1f0SMaxim Kochetkov 	int err;
11278385b1f0SMaxim Kochetkov 
11288385b1f0SMaxim Kochetkov 	err = m88e1111_set_downshift(phydev, 3);
11298385b1f0SMaxim Kochetkov 	if (err < 0)
11308385b1f0SMaxim Kochetkov 		return err;
11318385b1f0SMaxim Kochetkov 
11328385b1f0SMaxim Kochetkov 	return m88e1111_config_init(phydev);
11338385b1f0SMaxim Kochetkov }
11348385b1f0SMaxim Kochetkov 
marvell_1011gbe_config_init(struct phy_device * phydev)11358385b1f0SMaxim Kochetkov static int marvell_1011gbe_config_init(struct phy_device *phydev)
11368385b1f0SMaxim Kochetkov {
11378385b1f0SMaxim Kochetkov 	int err;
11388385b1f0SMaxim Kochetkov 
11398385b1f0SMaxim Kochetkov 	err = m88e1011_set_downshift(phydev, 3);
11408385b1f0SMaxim Kochetkov 	if (err < 0)
11418385b1f0SMaxim Kochetkov 		return err;
11428385b1f0SMaxim Kochetkov 
11438385b1f0SMaxim Kochetkov 	return marvell_config_init(phydev);
11448385b1f0SMaxim Kochetkov }
m88e1116r_config_init(struct phy_device * phydev)1145e2d861ccSHeiner Kallweit static int m88e1116r_config_init(struct phy_device *phydev)
1146e2d861ccSHeiner Kallweit {
1147e2d861ccSHeiner Kallweit 	int err;
1148e2d861ccSHeiner Kallweit 
1149e2d861ccSHeiner Kallweit 	err = genphy_soft_reset(phydev);
1150e2d861ccSHeiner Kallweit 	if (err < 0)
1151e2d861ccSHeiner Kallweit 		return err;
1152e2d861ccSHeiner Kallweit 
1153e2d861ccSHeiner Kallweit 	msleep(500);
1154e2d861ccSHeiner Kallweit 
1155e2d861ccSHeiner Kallweit 	err = marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE);
1156e2d861ccSHeiner Kallweit 	if (err < 0)
1157e2d861ccSHeiner Kallweit 		return err;
1158e2d861ccSHeiner Kallweit 
1159e2d861ccSHeiner Kallweit 	err = marvell_set_polarity(phydev, phydev->mdix_ctrl);
1160e2d861ccSHeiner Kallweit 	if (err < 0)
1161e2d861ccSHeiner Kallweit 		return err;
1162e2d861ccSHeiner Kallweit 
1163911af5e1SHeiner Kallweit 	err = m88e1011_set_downshift(phydev, 8);
1164e2d861ccSHeiner Kallweit 	if (err < 0)
1165e2d861ccSHeiner Kallweit 		return err;
1166e2d861ccSHeiner Kallweit 
1167e2d861ccSHeiner Kallweit 	if (phy_interface_is_rgmii(phydev)) {
1168e2d861ccSHeiner Kallweit 		err = m88e1121_config_aneg_rgmii_delays(phydev);
1169e2d861ccSHeiner Kallweit 		if (err < 0)
1170e2d861ccSHeiner Kallweit 			return err;
1171e2d861ccSHeiner Kallweit 	}
1172e2d861ccSHeiner Kallweit 
1173e2d861ccSHeiner Kallweit 	err = genphy_soft_reset(phydev);
1174e2d861ccSHeiner Kallweit 	if (err < 0)
1175e2d861ccSHeiner Kallweit 		return err;
1176e2d861ccSHeiner Kallweit 
1177e2d861ccSHeiner Kallweit 	return marvell_config_init(phydev);
1178e2d861ccSHeiner Kallweit }
1179e2d861ccSHeiner Kallweit 
m88e1318_config_init(struct phy_device * phydev)1180dd9a122aSEsben Haabendal static int m88e1318_config_init(struct phy_device *phydev)
1181dd9a122aSEsben Haabendal {
1182dd9a122aSEsben Haabendal 	if (phy_interrupt_is_valid(phydev)) {
1183dd9a122aSEsben Haabendal 		int err = phy_modify_paged(
1184dd9a122aSEsben Haabendal 			phydev, MII_MARVELL_LED_PAGE,
1185dd9a122aSEsben Haabendal 			MII_88E1318S_PHY_LED_TCR,
1186dd9a122aSEsben Haabendal 			MII_88E1318S_PHY_LED_TCR_FORCE_INT,
1187dd9a122aSEsben Haabendal 			MII_88E1318S_PHY_LED_TCR_INTn_ENABLE |
1188dd9a122aSEsben Haabendal 			MII_88E1318S_PHY_LED_TCR_INT_ACTIVE_LOW);
1189dd9a122aSEsben Haabendal 		if (err < 0)
1190dd9a122aSEsben Haabendal 			return err;
1191dd9a122aSEsben Haabendal 	}
1192dd9a122aSEsben Haabendal 
119307777246SWang Dongsheng 	return marvell_config_init(phydev);
1194dd9a122aSEsben Haabendal }
1195dd9a122aSEsben Haabendal 
m88e1510_config_init(struct phy_device * phydev)1196407353ecSClemens Gruber static int m88e1510_config_init(struct phy_device *phydev)
1197407353ecSClemens Gruber {
119865a9dedcSLeszek Polak 	static const struct {
119965a9dedcSLeszek Polak 		u16 reg17, reg16;
120065a9dedcSLeszek Polak 	} errata_vals[] = {
120165a9dedcSLeszek Polak 		{ 0x214b, 0x2144 },
120265a9dedcSLeszek Polak 		{ 0x0c28, 0x2146 },
120365a9dedcSLeszek Polak 		{ 0xb233, 0x214d },
120465a9dedcSLeszek Polak 		{ 0xcc0c, 0x2159 },
120565a9dedcSLeszek Polak 	};
1206407353ecSClemens Gruber 	int err;
120765a9dedcSLeszek Polak 	int i;
120865a9dedcSLeszek Polak 
120965a9dedcSLeszek Polak 	/* As per Marvell Release Notes - Alaska 88E1510/88E1518/88E1512/
121065a9dedcSLeszek Polak 	 * 88E1514 Rev A0, Errata Section 5.1:
121165a9dedcSLeszek Polak 	 * If EEE is intended to be used, the following register writes
121265a9dedcSLeszek Polak 	 * must be done once after every hardware reset.
121365a9dedcSLeszek Polak 	 */
121465a9dedcSLeszek Polak 	err = marvell_set_page(phydev, 0x00FF);
121565a9dedcSLeszek Polak 	if (err < 0)
121665a9dedcSLeszek Polak 		return err;
121765a9dedcSLeszek Polak 
121865a9dedcSLeszek Polak 	for (i = 0; i < ARRAY_SIZE(errata_vals); ++i) {
121965a9dedcSLeszek Polak 		err = phy_write(phydev, 17, errata_vals[i].reg17);
122065a9dedcSLeszek Polak 		if (err)
122165a9dedcSLeszek Polak 			return err;
122265a9dedcSLeszek Polak 		err = phy_write(phydev, 16, errata_vals[i].reg16);
122365a9dedcSLeszek Polak 		if (err)
122465a9dedcSLeszek Polak 			return err;
122565a9dedcSLeszek Polak 	}
122665a9dedcSLeszek Polak 
122765a9dedcSLeszek Polak 	err = marvell_set_page(phydev, 0x00FB);
122865a9dedcSLeszek Polak 	if (err < 0)
122965a9dedcSLeszek Polak 		return err;
123065a9dedcSLeszek Polak 	err = phy_write(phydev, 07, 0xC00D);
123165a9dedcSLeszek Polak 	if (err < 0)
123265a9dedcSLeszek Polak 		return err;
123365a9dedcSLeszek Polak 	err = marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE);
123465a9dedcSLeszek Polak 	if (err < 0)
123565a9dedcSLeszek Polak 		return err;
1236407353ecSClemens Gruber 
1237407353ecSClemens Gruber 	/* SGMII-to-Copper mode initialization */
1238407353ecSClemens Gruber 	if (phydev->interface == PHY_INTERFACE_MODE_SGMII) {
1239407353ecSClemens Gruber 		/* Select page 18 */
12406427bb2dSAndrew Lunn 		err = marvell_set_page(phydev, 18);
1241407353ecSClemens Gruber 		if (err < 0)
1242407353ecSClemens Gruber 			return err;
1243407353ecSClemens Gruber 
1244407353ecSClemens Gruber 		/* In reg 20, write MODE[2:0] = 0x1 (SGMII to Copper) */
1245fea23fb5SRussell King 		err = phy_modify(phydev, MII_88E1510_GEN_CTRL_REG_1,
1246f102852fSRussell King 				 MII_88E1510_GEN_CTRL_REG_1_MODE_MASK,
1247fea23fb5SRussell King 				 MII_88E1510_GEN_CTRL_REG_1_MODE_SGMII);
1248407353ecSClemens Gruber 		if (err < 0)
1249407353ecSClemens Gruber 			return err;
1250407353ecSClemens Gruber 
1251407353ecSClemens Gruber 		/* PHY reset is necessary after changing MODE[2:0] */
1252832913c3SYejune Deng 		err = phy_set_bits(phydev, MII_88E1510_GEN_CTRL_REG_1,
1253fea23fb5SRussell King 				   MII_88E1510_GEN_CTRL_REG_1_RESET);
1254407353ecSClemens Gruber 		if (err < 0)
1255407353ecSClemens Gruber 			return err;
1256407353ecSClemens Gruber 
1257407353ecSClemens Gruber 		/* Reset page selection */
125852295666SAndrew Lunn 		err = marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE);
1259407353ecSClemens Gruber 		if (err < 0)
1260407353ecSClemens Gruber 			return err;
1261407353ecSClemens Gruber 	}
12628385b1f0SMaxim Kochetkov 	err = m88e1011_set_downshift(phydev, 3);
12638385b1f0SMaxim Kochetkov 	if (err < 0)
12648385b1f0SMaxim Kochetkov 		return err;
1265407353ecSClemens Gruber 
1266dd9a122aSEsben Haabendal 	return m88e1318_config_init(phydev);
1267407353ecSClemens Gruber }
1268407353ecSClemens Gruber 
m88e1118_config_aneg(struct phy_device * phydev)1269605f196eSRon Madrid static int m88e1118_config_aneg(struct phy_device *phydev)
1270605f196eSRon Madrid {
1271605f196eSRon Madrid 	int err;
1272605f196eSRon Madrid 
1273fecd5e91SAndrew Lunn 	err = marvell_set_polarity(phydev, phydev->mdix_ctrl);
1274605f196eSRon Madrid 	if (err < 0)
1275605f196eSRon Madrid 		return err;
1276605f196eSRon Madrid 
1277605f196eSRon Madrid 	err = genphy_config_aneg(phydev);
1278aec12836SPavel Parkhomenko 	if (err < 0)
1279aec12836SPavel Parkhomenko 		return err;
1280aec12836SPavel Parkhomenko 
1281aec12836SPavel Parkhomenko 	return genphy_soft_reset(phydev);
1282605f196eSRon Madrid }
1283605f196eSRon Madrid 
m88e1118_config_init(struct phy_device * phydev)1284605f196eSRon Madrid static int m88e1118_config_init(struct phy_device *phydev)
1285605f196eSRon Madrid {
12865b8f9703SRussell King (Oracle) 	u16 leds;
1287605f196eSRon Madrid 	int err;
1288605f196eSRon Madrid 
1289605f196eSRon Madrid 	/* Enable 1000 Mbit */
12905b8f9703SRussell King (Oracle) 	err = phy_write_paged(phydev, MII_MARVELL_MSCR_PAGE,
12915b8f9703SRussell King (Oracle) 			      MII_88E1121_PHY_MSCR_REG, 0x1070);
1292605f196eSRon Madrid 	if (err < 0)
1293605f196eSRon Madrid 		return err;
1294605f196eSRon Madrid 
1295f22725c9SRussell King (Oracle) 	if (phy_interface_is_rgmii(phydev)) {
1296f22725c9SRussell King (Oracle) 		err = m88e1121_config_aneg_rgmii_delays(phydev);
1297f22725c9SRussell King (Oracle) 		if (err < 0)
1298f22725c9SRussell King (Oracle) 			return err;
1299f22725c9SRussell King (Oracle) 	}
1300f22725c9SRussell King (Oracle) 
1301605f196eSRon Madrid 	/* Adjust LED Control */
13022f495c39SBenjamin Herrenschmidt 	if (phydev->dev_flags & MARVELL_PHY_M1118_DNS323_LEDS)
13035b8f9703SRussell King (Oracle) 		leds = 0x1100;
13042f495c39SBenjamin Herrenschmidt 	else
13055b8f9703SRussell King (Oracle) 		leds = 0x021e;
13065b8f9703SRussell King (Oracle) 
13075b8f9703SRussell King (Oracle) 	err = phy_write_paged(phydev, MII_MARVELL_LED_PAGE, 0x10, leds);
1308605f196eSRon Madrid 	if (err < 0)
1309605f196eSRon Madrid 		return err;
1310605f196eSRon Madrid 
1311cf41a51dSDavid Daney 	err = marvell_of_reg_init(phydev);
1312cf41a51dSDavid Daney 	if (err < 0)
1313cf41a51dSDavid Daney 		return err;
1314cf41a51dSDavid Daney 
13155b8f9703SRussell King (Oracle) 	/* Reset page register */
131652295666SAndrew Lunn 	err = marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE);
1317605f196eSRon Madrid 	if (err < 0)
1318605f196eSRon Madrid 		return err;
1319605f196eSRon Madrid 
132034386344SAndrew Lunn 	return genphy_soft_reset(phydev);
1321605f196eSRon Madrid }
1322605f196eSRon Madrid 
m88e1149_config_init(struct phy_device * phydev)132390600732SDavid Daney static int m88e1149_config_init(struct phy_device *phydev)
132490600732SDavid Daney {
132590600732SDavid Daney 	int err;
132690600732SDavid Daney 
132790600732SDavid Daney 	/* Change address */
132852295666SAndrew Lunn 	err = marvell_set_page(phydev, MII_MARVELL_MSCR_PAGE);
132990600732SDavid Daney 	if (err < 0)
133090600732SDavid Daney 		return err;
133190600732SDavid Daney 
133290600732SDavid Daney 	/* Enable 1000 Mbit */
133390600732SDavid Daney 	err = phy_write(phydev, 0x15, 0x1048);
133490600732SDavid Daney 	if (err < 0)
133590600732SDavid Daney 		return err;
133690600732SDavid Daney 
1337cf41a51dSDavid Daney 	err = marvell_of_reg_init(phydev);
1338cf41a51dSDavid Daney 	if (err < 0)
1339cf41a51dSDavid Daney 		return err;
1340cf41a51dSDavid Daney 
134190600732SDavid Daney 	/* Reset address */
134252295666SAndrew Lunn 	err = marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE);
134390600732SDavid Daney 	if (err < 0)
134490600732SDavid Daney 		return err;
134590600732SDavid Daney 
134634386344SAndrew Lunn 	return genphy_soft_reset(phydev);
134790600732SDavid Daney }
134890600732SDavid Daney 
m88e1145_config_init_rgmii(struct phy_device * phydev)1349e1dde8dcSAndrew Lunn static int m88e1145_config_init_rgmii(struct phy_device *phydev)
135076884679SAndy Fleming {
135176884679SAndy Fleming 	int err;
1352e69d9ed4SAndrew Lunn 
135361111598SAndrew Lunn 	err = m88e1111_config_init_rgmii_delays(phydev);
135476884679SAndy Fleming 	if (err < 0)
135576884679SAndy Fleming 		return err;
135676884679SAndy Fleming 
13572f495c39SBenjamin Herrenschmidt 	if (phydev->dev_flags & MARVELL_PHY_M1145_FLAGS_RESISTANCE) {
135876884679SAndy Fleming 		err = phy_write(phydev, 0x1d, 0x0012);
135976884679SAndy Fleming 		if (err < 0)
136076884679SAndy Fleming 			return err;
136176884679SAndy Fleming 
1362f102852fSRussell King 		err = phy_modify(phydev, 0x1e, 0x0fc0,
1363fea23fb5SRussell King 				 2 << 9 | /* 36 ohm */
1364fea23fb5SRussell King 				 2 << 6); /* 39 ohm */
136576884679SAndy Fleming 		if (err < 0)
136676884679SAndy Fleming 			return err;
136776884679SAndy Fleming 
136876884679SAndy Fleming 		err = phy_write(phydev, 0x1d, 0x3);
136976884679SAndy Fleming 		if (err < 0)
137076884679SAndy Fleming 			return err;
137176884679SAndy Fleming 
137276884679SAndy Fleming 		err = phy_write(phydev, 0x1e, 0x8000);
1373e1dde8dcSAndrew Lunn 	}
137476884679SAndy Fleming 	return err;
137576884679SAndy Fleming }
137676884679SAndy Fleming 
m88e1145_config_init_sgmii(struct phy_device * phydev)1377e1dde8dcSAndrew Lunn static int m88e1145_config_init_sgmii(struct phy_device *phydev)
1378e1dde8dcSAndrew Lunn {
1379865b813aSAndrew Lunn 	return m88e1111_config_init_hwcfg_mode(
1380865b813aSAndrew Lunn 		phydev, MII_M1111_HWCFG_MODE_SGMII_NO_CLK,
1381865b813aSAndrew Lunn 		MII_M1111_HWCFG_FIBER_COPPER_AUTO);
1382e1dde8dcSAndrew Lunn }
1383e1dde8dcSAndrew Lunn 
m88e1145_config_init(struct phy_device * phydev)1384e1dde8dcSAndrew Lunn static int m88e1145_config_init(struct phy_device *phydev)
1385e1dde8dcSAndrew Lunn {
1386e1dde8dcSAndrew Lunn 	int err;
1387e1dde8dcSAndrew Lunn 
1388e1dde8dcSAndrew Lunn 	/* Take care of errata E0 & E1 */
1389e1dde8dcSAndrew Lunn 	err = phy_write(phydev, 0x1d, 0x001b);
1390e1dde8dcSAndrew Lunn 	if (err < 0)
1391e1dde8dcSAndrew Lunn 		return err;
1392e1dde8dcSAndrew Lunn 
1393e1dde8dcSAndrew Lunn 	err = phy_write(phydev, 0x1e, 0x418f);
1394e1dde8dcSAndrew Lunn 	if (err < 0)
1395e1dde8dcSAndrew Lunn 		return err;
1396e1dde8dcSAndrew Lunn 
1397e1dde8dcSAndrew Lunn 	err = phy_write(phydev, 0x1d, 0x0016);
1398e1dde8dcSAndrew Lunn 	if (err < 0)
1399e1dde8dcSAndrew Lunn 		return err;
1400e1dde8dcSAndrew Lunn 
1401e1dde8dcSAndrew Lunn 	err = phy_write(phydev, 0x1e, 0xa2da);
1402e1dde8dcSAndrew Lunn 	if (err < 0)
1403e1dde8dcSAndrew Lunn 		return err;
1404e1dde8dcSAndrew Lunn 
1405e1dde8dcSAndrew Lunn 	if (phydev->interface == PHY_INTERFACE_MODE_RGMII_ID) {
1406e1dde8dcSAndrew Lunn 		err = m88e1145_config_init_rgmii(phydev);
1407e1dde8dcSAndrew Lunn 		if (err < 0)
1408e1dde8dcSAndrew Lunn 			return err;
1409e1dde8dcSAndrew Lunn 	}
1410e1dde8dcSAndrew Lunn 
1411e1dde8dcSAndrew Lunn 	if (phydev->interface == PHY_INTERFACE_MODE_SGMII) {
1412e1dde8dcSAndrew Lunn 		err = m88e1145_config_init_sgmii(phydev);
1413b0224175SViet Nga Dao 		if (err < 0)
1414b0224175SViet Nga Dao 			return err;
1415b0224175SViet Nga Dao 	}
14168385b1f0SMaxim Kochetkov 	err = m88e1111_set_downshift(phydev, 3);
14178385b1f0SMaxim Kochetkov 	if (err < 0)
14188385b1f0SMaxim Kochetkov 		return err;
1419b0224175SViet Nga Dao 
1420cf41a51dSDavid Daney 	err = marvell_of_reg_init(phydev);
1421cf41a51dSDavid Daney 	if (err < 0)
1422cf41a51dSDavid Daney 		return err;
1423cf41a51dSDavid Daney 
142476884679SAndy Fleming 	return 0;
142576884679SAndy Fleming }
142600db8189SAndy Fleming 
m88e1540_get_fld(struct phy_device * phydev,u8 * msecs)142769f42be8SHeiner Kallweit static int m88e1540_get_fld(struct phy_device *phydev, u8 *msecs)
142869f42be8SHeiner Kallweit {
142969f42be8SHeiner Kallweit 	int val;
143069f42be8SHeiner Kallweit 
143169f42be8SHeiner Kallweit 	val = phy_read(phydev, MII_88E1540_COPPER_CTRL3);
143269f42be8SHeiner Kallweit 	if (val < 0)
143369f42be8SHeiner Kallweit 		return val;
143469f42be8SHeiner Kallweit 
143569f42be8SHeiner Kallweit 	if (!(val & MII_88E1540_COPPER_CTRL3_FAST_LINK_DOWN)) {
143669f42be8SHeiner Kallweit 		*msecs = ETHTOOL_PHY_FAST_LINK_DOWN_OFF;
143769f42be8SHeiner Kallweit 		return 0;
143869f42be8SHeiner Kallweit 	}
143969f42be8SHeiner Kallweit 
144069f42be8SHeiner Kallweit 	val = FIELD_GET(MII_88E1540_COPPER_CTRL3_LINK_DOWN_DELAY_MASK, val);
144169f42be8SHeiner Kallweit 
144269f42be8SHeiner Kallweit 	switch (val) {
144369f42be8SHeiner Kallweit 	case MII_88E1540_COPPER_CTRL3_LINK_DOWN_DELAY_00MS:
144469f42be8SHeiner Kallweit 		*msecs = 0;
144569f42be8SHeiner Kallweit 		break;
144669f42be8SHeiner Kallweit 	case MII_88E1540_COPPER_CTRL3_LINK_DOWN_DELAY_10MS:
144769f42be8SHeiner Kallweit 		*msecs = 10;
144869f42be8SHeiner Kallweit 		break;
144969f42be8SHeiner Kallweit 	case MII_88E1540_COPPER_CTRL3_LINK_DOWN_DELAY_20MS:
145069f42be8SHeiner Kallweit 		*msecs = 20;
145169f42be8SHeiner Kallweit 		break;
145269f42be8SHeiner Kallweit 	case MII_88E1540_COPPER_CTRL3_LINK_DOWN_DELAY_40MS:
145369f42be8SHeiner Kallweit 		*msecs = 40;
145469f42be8SHeiner Kallweit 		break;
145569f42be8SHeiner Kallweit 	default:
145669f42be8SHeiner Kallweit 		return -EINVAL;
145769f42be8SHeiner Kallweit 	}
145869f42be8SHeiner Kallweit 
145969f42be8SHeiner Kallweit 	return 0;
146069f42be8SHeiner Kallweit }
146169f42be8SHeiner Kallweit 
m88e1540_set_fld(struct phy_device * phydev,const u8 * msecs)146269f42be8SHeiner Kallweit static int m88e1540_set_fld(struct phy_device *phydev, const u8 *msecs)
146369f42be8SHeiner Kallweit {
146469f42be8SHeiner Kallweit 	struct ethtool_eee eee;
146569f42be8SHeiner Kallweit 	int val, ret;
146669f42be8SHeiner Kallweit 
146769f42be8SHeiner Kallweit 	if (*msecs == ETHTOOL_PHY_FAST_LINK_DOWN_OFF)
146869f42be8SHeiner Kallweit 		return phy_clear_bits(phydev, MII_88E1540_COPPER_CTRL3,
146969f42be8SHeiner Kallweit 				      MII_88E1540_COPPER_CTRL3_FAST_LINK_DOWN);
147069f42be8SHeiner Kallweit 
147169f42be8SHeiner Kallweit 	/* According to the Marvell data sheet EEE must be disabled for
147269f42be8SHeiner Kallweit 	 * Fast Link Down detection to work properly
147369f42be8SHeiner Kallweit 	 */
14743365777aSAndrew Lunn 	ret = genphy_c45_ethtool_get_eee(phydev, &eee);
147569f42be8SHeiner Kallweit 	if (!ret && eee.eee_enabled) {
147669f42be8SHeiner Kallweit 		phydev_warn(phydev, "Fast Link Down detection requires EEE to be disabled!\n");
147769f42be8SHeiner Kallweit 		return -EBUSY;
147869f42be8SHeiner Kallweit 	}
147969f42be8SHeiner Kallweit 
148069f42be8SHeiner Kallweit 	if (*msecs <= 5)
148169f42be8SHeiner Kallweit 		val = MII_88E1540_COPPER_CTRL3_LINK_DOWN_DELAY_00MS;
148269f42be8SHeiner Kallweit 	else if (*msecs <= 15)
148369f42be8SHeiner Kallweit 		val = MII_88E1540_COPPER_CTRL3_LINK_DOWN_DELAY_10MS;
148469f42be8SHeiner Kallweit 	else if (*msecs <= 30)
148569f42be8SHeiner Kallweit 		val = MII_88E1540_COPPER_CTRL3_LINK_DOWN_DELAY_20MS;
148669f42be8SHeiner Kallweit 	else
148769f42be8SHeiner Kallweit 		val = MII_88E1540_COPPER_CTRL3_LINK_DOWN_DELAY_40MS;
148869f42be8SHeiner Kallweit 
148969f42be8SHeiner Kallweit 	val = FIELD_PREP(MII_88E1540_COPPER_CTRL3_LINK_DOWN_DELAY_MASK, val);
149069f42be8SHeiner Kallweit 
149169f42be8SHeiner Kallweit 	ret = phy_modify(phydev, MII_88E1540_COPPER_CTRL3,
149269f42be8SHeiner Kallweit 			 MII_88E1540_COPPER_CTRL3_LINK_DOWN_DELAY_MASK, val);
149369f42be8SHeiner Kallweit 	if (ret)
149469f42be8SHeiner Kallweit 		return ret;
149569f42be8SHeiner Kallweit 
149669f42be8SHeiner Kallweit 	return phy_set_bits(phydev, MII_88E1540_COPPER_CTRL3,
149769f42be8SHeiner Kallweit 			    MII_88E1540_COPPER_CTRL3_FAST_LINK_DOWN);
149869f42be8SHeiner Kallweit }
149969f42be8SHeiner Kallweit 
m88e1540_get_tunable(struct phy_device * phydev,struct ethtool_tunable * tuna,void * data)150069f42be8SHeiner Kallweit static int m88e1540_get_tunable(struct phy_device *phydev,
150169f42be8SHeiner Kallweit 				struct ethtool_tunable *tuna, void *data)
150269f42be8SHeiner Kallweit {
150369f42be8SHeiner Kallweit 	switch (tuna->id) {
150469f42be8SHeiner Kallweit 	case ETHTOOL_PHY_FAST_LINK_DOWN:
150569f42be8SHeiner Kallweit 		return m88e1540_get_fld(phydev, data);
1506a3bdfce7SHeiner Kallweit 	case ETHTOOL_PHY_DOWNSHIFT:
1507911af5e1SHeiner Kallweit 		return m88e1011_get_downshift(phydev, data);
150869f42be8SHeiner Kallweit 	default:
150969f42be8SHeiner Kallweit 		return -EOPNOTSUPP;
151069f42be8SHeiner Kallweit 	}
151169f42be8SHeiner Kallweit }
151269f42be8SHeiner Kallweit 
m88e1540_set_tunable(struct phy_device * phydev,struct ethtool_tunable * tuna,const void * data)151369f42be8SHeiner Kallweit static int m88e1540_set_tunable(struct phy_device *phydev,
151469f42be8SHeiner Kallweit 				struct ethtool_tunable *tuna, const void *data)
151569f42be8SHeiner Kallweit {
151669f42be8SHeiner Kallweit 	switch (tuna->id) {
151769f42be8SHeiner Kallweit 	case ETHTOOL_PHY_FAST_LINK_DOWN:
151869f42be8SHeiner Kallweit 		return m88e1540_set_fld(phydev, data);
1519a3bdfce7SHeiner Kallweit 	case ETHTOOL_PHY_DOWNSHIFT:
1520911af5e1SHeiner Kallweit 		return m88e1011_set_downshift(phydev, *(const u8 *)data);
152169f42be8SHeiner Kallweit 	default:
152269f42be8SHeiner Kallweit 		return -EOPNOTSUPP;
152369f42be8SHeiner Kallweit 	}
152469f42be8SHeiner Kallweit }
152569f42be8SHeiner Kallweit 
15268cbcdc1aSAndrew Lunn /* The VOD can be out of specification on link up. Poke an
15278cbcdc1aSAndrew Lunn  * undocumented register, in an undocumented page, with a magic value
15288cbcdc1aSAndrew Lunn  * to fix this.
15298cbcdc1aSAndrew Lunn  */
m88e6390_errata(struct phy_device * phydev)15308cbcdc1aSAndrew Lunn static int m88e6390_errata(struct phy_device *phydev)
15318cbcdc1aSAndrew Lunn {
15328cbcdc1aSAndrew Lunn 	int err;
15338cbcdc1aSAndrew Lunn 
15348cbcdc1aSAndrew Lunn 	err = phy_write(phydev, MII_BMCR,
15358cbcdc1aSAndrew Lunn 			BMCR_ANENABLE | BMCR_SPEED1000 | BMCR_FULLDPLX);
15368cbcdc1aSAndrew Lunn 	if (err)
15378cbcdc1aSAndrew Lunn 		return err;
15388cbcdc1aSAndrew Lunn 
15398cbcdc1aSAndrew Lunn 	usleep_range(300, 400);
15408cbcdc1aSAndrew Lunn 
15418cbcdc1aSAndrew Lunn 	err = phy_write_paged(phydev, 0xf8, 0x08, 0x36);
15428cbcdc1aSAndrew Lunn 	if (err)
15438cbcdc1aSAndrew Lunn 		return err;
15448cbcdc1aSAndrew Lunn 
15458cbcdc1aSAndrew Lunn 	return genphy_soft_reset(phydev);
15468cbcdc1aSAndrew Lunn }
15478cbcdc1aSAndrew Lunn 
m88e6390_config_aneg(struct phy_device * phydev)15488cbcdc1aSAndrew Lunn static int m88e6390_config_aneg(struct phy_device *phydev)
15498cbcdc1aSAndrew Lunn {
15508cbcdc1aSAndrew Lunn 	int err;
15518cbcdc1aSAndrew Lunn 
15528cbcdc1aSAndrew Lunn 	err = m88e6390_errata(phydev);
15538cbcdc1aSAndrew Lunn 	if (err)
15548cbcdc1aSAndrew Lunn 		return err;
15558cbcdc1aSAndrew Lunn 
15568cbcdc1aSAndrew Lunn 	return m88e1510_config_aneg(phydev);
15578cbcdc1aSAndrew Lunn }
15588cbcdc1aSAndrew Lunn 
15596cfb3bccSCharles-Antoine Couret /**
1560ab9cb729SAndrew Lunn  * fiber_lpa_mod_linkmode_lpa_t
1561c0ec3c27SAndrew Lunn  * @advertising: the linkmode advertisement settings
15626cfb3bccSCharles-Antoine Couret  * @lpa: value of the MII_LPA register for fiber link
1563be937f1fSAlexandr Smirnov  *
1564ab9cb729SAndrew Lunn  * A small helper function that translates MII_LPA bits to linkmode LP
1565ab9cb729SAndrew Lunn  * advertisement settings. Other bits in advertising are left
1566ab9cb729SAndrew Lunn  * unchanged.
15676cfb3bccSCharles-Antoine Couret  */
fiber_lpa_mod_linkmode_lpa_t(unsigned long * advertising,u32 lpa)1568ab9cb729SAndrew Lunn static void fiber_lpa_mod_linkmode_lpa_t(unsigned long *advertising, u32 lpa)
15696cfb3bccSCharles-Antoine Couret {
1570ab9cb729SAndrew Lunn 	linkmode_mod_bit(ETHTOOL_LINK_MODE_1000baseT_Half_BIT,
157120ecf424SRussell King 			 advertising, lpa & LPA_1000XHALF);
1572ab9cb729SAndrew Lunn 
1573ab9cb729SAndrew Lunn 	linkmode_mod_bit(ETHTOOL_LINK_MODE_1000baseT_Full_BIT,
157420ecf424SRussell King 			 advertising, lpa & LPA_1000XFULL);
15756cfb3bccSCharles-Antoine Couret }
15766cfb3bccSCharles-Antoine Couret 
marvell_read_status_page_an(struct phy_device * phydev,int fiber,int status)1577e1dde8dcSAndrew Lunn static int marvell_read_status_page_an(struct phy_device *phydev,
1578d2004e27SRussell King 				       int fiber, int status)
1579be937f1fSAlexandr Smirnov {
1580be937f1fSAlexandr Smirnov 	int lpa;
1581fcf1f59aSRussell King 	int err;
1582be937f1fSAlexandr Smirnov 
15833b72f84fSClemens Gruber 	if (!(status & MII_M1011_PHY_STATUS_RESOLVED)) {
15843b72f84fSClemens Gruber 		phydev->link = 0;
15853b72f84fSClemens Gruber 		return 0;
15863b72f84fSClemens Gruber 	}
15873b72f84fSClemens Gruber 
15883b72f84fSClemens Gruber 	if (status & MII_M1011_PHY_STATUS_FULLDUPLEX)
15893b72f84fSClemens Gruber 		phydev->duplex = DUPLEX_FULL;
15903b72f84fSClemens Gruber 	else
15913b72f84fSClemens Gruber 		phydev->duplex = DUPLEX_HALF;
15923b72f84fSClemens Gruber 
15933b72f84fSClemens Gruber 	switch (status & MII_M1011_PHY_STATUS_SPD_MASK) {
15943b72f84fSClemens Gruber 	case MII_M1011_PHY_STATUS_1000:
15953b72f84fSClemens Gruber 		phydev->speed = SPEED_1000;
15963b72f84fSClemens Gruber 		break;
15973b72f84fSClemens Gruber 
15983b72f84fSClemens Gruber 	case MII_M1011_PHY_STATUS_100:
15993b72f84fSClemens Gruber 		phydev->speed = SPEED_100;
16003b72f84fSClemens Gruber 		break;
16013b72f84fSClemens Gruber 
16023b72f84fSClemens Gruber 	default:
16033b72f84fSClemens Gruber 		phydev->speed = SPEED_10;
16043b72f84fSClemens Gruber 		break;
16053b72f84fSClemens Gruber 	}
16063b72f84fSClemens Gruber 
1607fcf1f59aSRussell King 	if (!fiber) {
1608fcf1f59aSRussell King 		err = genphy_read_lpa(phydev);
1609fcf1f59aSRussell King 		if (err < 0)
1610fcf1f59aSRussell King 			return err;
1611fcf1f59aSRussell King 
1612fcf1f59aSRussell King 		phy_resolve_aneg_pause(phydev);
1613fcf1f59aSRussell King 	} else {
1614be937f1fSAlexandr Smirnov 		lpa = phy_read(phydev, MII_LPA);
1615be937f1fSAlexandr Smirnov 		if (lpa < 0)
1616be937f1fSAlexandr Smirnov 			return lpa;
1617be937f1fSAlexandr Smirnov 
16186cfb3bccSCharles-Antoine Couret 		/* The fiber link is only 1000M capable */
1619ab9cb729SAndrew Lunn 		fiber_lpa_mod_linkmode_lpa_t(phydev->lp_advertising, lpa);
16206cfb3bccSCharles-Antoine Couret 
16216cfb3bccSCharles-Antoine Couret 		if (phydev->duplex == DUPLEX_FULL) {
16226cfb3bccSCharles-Antoine Couret 			if (!(lpa & LPA_PAUSE_FIBER)) {
16236cfb3bccSCharles-Antoine Couret 				phydev->pause = 0;
16246cfb3bccSCharles-Antoine Couret 				phydev->asym_pause = 0;
16256cfb3bccSCharles-Antoine Couret 			} else if ((lpa & LPA_PAUSE_ASYM_FIBER)) {
16266cfb3bccSCharles-Antoine Couret 				phydev->pause = 1;
16276cfb3bccSCharles-Antoine Couret 				phydev->asym_pause = 1;
16286cfb3bccSCharles-Antoine Couret 			} else {
16296cfb3bccSCharles-Antoine Couret 				phydev->pause = 1;
16306cfb3bccSCharles-Antoine Couret 				phydev->asym_pause = 0;
16316cfb3bccSCharles-Antoine Couret 			}
16326cfb3bccSCharles-Antoine Couret 		}
16336cfb3bccSCharles-Antoine Couret 	}
1634fcf1f59aSRussell King 
1635e1dde8dcSAndrew Lunn 	return 0;
1636e1dde8dcSAndrew Lunn }
1637e1dde8dcSAndrew Lunn 
1638e1dde8dcSAndrew Lunn /* marvell_read_status_page
1639e1dde8dcSAndrew Lunn  *
1640e1dde8dcSAndrew Lunn  * Description:
1641e1dde8dcSAndrew Lunn  *   Check the link, then figure out the current state
1642e1dde8dcSAndrew Lunn  *   by comparing what we advertise with what the link partner
1643e1dde8dcSAndrew Lunn  *   advertises.  Start by checking the gigabit possibilities,
1644e1dde8dcSAndrew Lunn  *   then move on to 10/100.
1645e1dde8dcSAndrew Lunn  */
marvell_read_status_page(struct phy_device * phydev,int page)1646e1dde8dcSAndrew Lunn static int marvell_read_status_page(struct phy_device *phydev, int page)
1647e1dde8dcSAndrew Lunn {
1648d2004e27SRussell King 	int status;
1649e1dde8dcSAndrew Lunn 	int fiber;
1650e1dde8dcSAndrew Lunn 	int err;
1651e1dde8dcSAndrew Lunn 
1652d2004e27SRussell King 	status = phy_read(phydev, MII_M1011_PHY_STATUS);
1653d2004e27SRussell King 	if (status < 0)
1654d2004e27SRussell King 		return status;
1655d2004e27SRussell King 
1656d2004e27SRussell King 	/* Use the generic register for copper link status,
1657d2004e27SRussell King 	 * and the PHY status register for fiber link status.
1658e1dde8dcSAndrew Lunn 	 */
1659d2004e27SRussell King 	if (page == MII_MARVELL_FIBER_PAGE) {
1660d2004e27SRussell King 		phydev->link = !!(status & MII_M1011_PHY_STATUS_LINK);
1661d2004e27SRussell King 	} else {
1662d2004e27SRussell King 		err = genphy_update_link(phydev);
1663d2004e27SRussell King 		if (err)
1664d2004e27SRussell King 			return err;
1665d2004e27SRussell King 	}
1666d2004e27SRussell King 
166752295666SAndrew Lunn 	if (page == MII_MARVELL_FIBER_PAGE)
1668e1dde8dcSAndrew Lunn 		fiber = 1;
1669e1dde8dcSAndrew Lunn 	else
1670e1dde8dcSAndrew Lunn 		fiber = 0;
1671e1dde8dcSAndrew Lunn 
167298f92831SRussell King 	linkmode_zero(phydev->lp_advertising);
167398f92831SRussell King 	phydev->pause = 0;
167498f92831SRussell King 	phydev->asym_pause = 0;
1675b82cf17fSRussell King 	phydev->speed = SPEED_UNKNOWN;
1676b82cf17fSRussell King 	phydev->duplex = DUPLEX_UNKNOWN;
16774217a64eSMichael Walle 	phydev->port = fiber ? PORT_FIBRE : PORT_TP;
167898f92831SRussell King 
1679e1dde8dcSAndrew Lunn 	if (phydev->autoneg == AUTONEG_ENABLE)
1680d2004e27SRussell King 		err = marvell_read_status_page_an(phydev, fiber, status);
1681e1dde8dcSAndrew Lunn 	else
168298f92831SRussell King 		err = genphy_read_status_fixed(phydev);
1683e1dde8dcSAndrew Lunn 
1684e1dde8dcSAndrew Lunn 	return err;
1685e1dde8dcSAndrew Lunn }
1686e1dde8dcSAndrew Lunn 
16876cfb3bccSCharles-Antoine Couret /* marvell_read_status
16886cfb3bccSCharles-Antoine Couret  *
16896cfb3bccSCharles-Antoine Couret  * Some Marvell's phys have two modes: fiber and copper.
16906cfb3bccSCharles-Antoine Couret  * Both need status checked.
16916cfb3bccSCharles-Antoine Couret  * Description:
16926cfb3bccSCharles-Antoine Couret  *   First, check the fiber link and status.
16936cfb3bccSCharles-Antoine Couret  *   If the fiber link is down, check the copper link and status which
16946cfb3bccSCharles-Antoine Couret  *   will be the default value if both link are down.
16956cfb3bccSCharles-Antoine Couret  */
marvell_read_status(struct phy_device * phydev)16966cfb3bccSCharles-Antoine Couret static int marvell_read_status(struct phy_device *phydev)
16976cfb3bccSCharles-Antoine Couret {
16986cfb3bccSCharles-Antoine Couret 	int err;
16996cfb3bccSCharles-Antoine Couret 
17006cfb3bccSCharles-Antoine Couret 	/* Check the fiber mode first */
17013c1bcc86SAndrew Lunn 	if (linkmode_test_bit(ETHTOOL_LINK_MODE_FIBRE_BIT,
17023c1bcc86SAndrew Lunn 			      phydev->supported) &&
1703a13c0652SRussell King 	    phydev->interface != PHY_INTERFACE_MODE_SGMII) {
170452295666SAndrew Lunn 		err = marvell_set_page(phydev, MII_MARVELL_FIBER_PAGE);
17056cfb3bccSCharles-Antoine Couret 		if (err < 0)
17066cfb3bccSCharles-Antoine Couret 			goto error;
17076cfb3bccSCharles-Antoine Couret 
170852295666SAndrew Lunn 		err = marvell_read_status_page(phydev, MII_MARVELL_FIBER_PAGE);
17096cfb3bccSCharles-Antoine Couret 		if (err < 0)
17106cfb3bccSCharles-Antoine Couret 			goto error;
17116cfb3bccSCharles-Antoine Couret 
17120c3439bcSAndrew Lunn 		/* If the fiber link is up, it is the selected and
17130c3439bcSAndrew Lunn 		 * used link. In this case, we need to stay in the
17140c3439bcSAndrew Lunn 		 * fiber page. Please to be careful about that, avoid
17150c3439bcSAndrew Lunn 		 * to restore Copper page in other functions which
17160c3439bcSAndrew Lunn 		 * could break the behaviour for some fiber phy like
17170c3439bcSAndrew Lunn 		 * 88E1512.
17180c3439bcSAndrew Lunn 		 */
17196cfb3bccSCharles-Antoine Couret 		if (phydev->link)
17206cfb3bccSCharles-Antoine Couret 			return 0;
17216cfb3bccSCharles-Antoine Couret 
17226cfb3bccSCharles-Antoine Couret 		/* If fiber link is down, check and save copper mode state */
172352295666SAndrew Lunn 		err = marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE);
17246cfb3bccSCharles-Antoine Couret 		if (err < 0)
17256cfb3bccSCharles-Antoine Couret 			goto error;
17266cfb3bccSCharles-Antoine Couret 	}
17276cfb3bccSCharles-Antoine Couret 
172852295666SAndrew Lunn 	return marvell_read_status_page(phydev, MII_MARVELL_COPPER_PAGE);
17296cfb3bccSCharles-Antoine Couret 
17306cfb3bccSCharles-Antoine Couret error:
173152295666SAndrew Lunn 	marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE);
17326cfb3bccSCharles-Antoine Couret 	return err;
17336cfb3bccSCharles-Antoine Couret }
17343758be3dSCharles-Antoine Couret 
17353758be3dSCharles-Antoine Couret /* marvell_suspend
17363758be3dSCharles-Antoine Couret  *
17373758be3dSCharles-Antoine Couret  * Some Marvell's phys have two modes: fiber and copper.
17383758be3dSCharles-Antoine Couret  * Both need to be suspended
17393758be3dSCharles-Antoine Couret  */
marvell_suspend(struct phy_device * phydev)17403758be3dSCharles-Antoine Couret static int marvell_suspend(struct phy_device *phydev)
17413758be3dSCharles-Antoine Couret {
17423758be3dSCharles-Antoine Couret 	int err;
17433758be3dSCharles-Antoine Couret 
17443758be3dSCharles-Antoine Couret 	/* Suspend the fiber mode first */
1745837d9e49SKurt Cancemi 	if (linkmode_test_bit(ETHTOOL_LINK_MODE_FIBRE_BIT,
17463c1bcc86SAndrew Lunn 			      phydev->supported)) {
174752295666SAndrew Lunn 		err = marvell_set_page(phydev, MII_MARVELL_FIBER_PAGE);
17483758be3dSCharles-Antoine Couret 		if (err < 0)
17493758be3dSCharles-Antoine Couret 			goto error;
17503758be3dSCharles-Antoine Couret 
17513758be3dSCharles-Antoine Couret 		/* With the page set, use the generic suspend */
17523758be3dSCharles-Antoine Couret 		err = genphy_suspend(phydev);
17533758be3dSCharles-Antoine Couret 		if (err < 0)
17543758be3dSCharles-Antoine Couret 			goto error;
17553758be3dSCharles-Antoine Couret 
17563758be3dSCharles-Antoine Couret 		/* Then, the copper link */
175752295666SAndrew Lunn 		err = marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE);
17583758be3dSCharles-Antoine Couret 		if (err < 0)
17593758be3dSCharles-Antoine Couret 			goto error;
17603758be3dSCharles-Antoine Couret 	}
17613758be3dSCharles-Antoine Couret 
17623758be3dSCharles-Antoine Couret 	/* With the page set, use the generic suspend */
17633758be3dSCharles-Antoine Couret 	return genphy_suspend(phydev);
17643758be3dSCharles-Antoine Couret 
17653758be3dSCharles-Antoine Couret error:
176652295666SAndrew Lunn 	marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE);
17673758be3dSCharles-Antoine Couret 	return err;
17683758be3dSCharles-Antoine Couret }
17693758be3dSCharles-Antoine Couret 
17703758be3dSCharles-Antoine Couret /* marvell_resume
17713758be3dSCharles-Antoine Couret  *
17723758be3dSCharles-Antoine Couret  * Some Marvell's phys have two modes: fiber and copper.
17733758be3dSCharles-Antoine Couret  * Both need to be resumed
17743758be3dSCharles-Antoine Couret  */
marvell_resume(struct phy_device * phydev)17753758be3dSCharles-Antoine Couret static int marvell_resume(struct phy_device *phydev)
17763758be3dSCharles-Antoine Couret {
17773758be3dSCharles-Antoine Couret 	int err;
17783758be3dSCharles-Antoine Couret 
17793758be3dSCharles-Antoine Couret 	/* Resume the fiber mode first */
1780837d9e49SKurt Cancemi 	if (linkmode_test_bit(ETHTOOL_LINK_MODE_FIBRE_BIT,
17813c1bcc86SAndrew Lunn 			      phydev->supported)) {
178252295666SAndrew Lunn 		err = marvell_set_page(phydev, MII_MARVELL_FIBER_PAGE);
17833758be3dSCharles-Antoine Couret 		if (err < 0)
17843758be3dSCharles-Antoine Couret 			goto error;
17853758be3dSCharles-Antoine Couret 
17863758be3dSCharles-Antoine Couret 		/* With the page set, use the generic resume */
17873758be3dSCharles-Antoine Couret 		err = genphy_resume(phydev);
17883758be3dSCharles-Antoine Couret 		if (err < 0)
17893758be3dSCharles-Antoine Couret 			goto error;
17903758be3dSCharles-Antoine Couret 
17913758be3dSCharles-Antoine Couret 		/* Then, the copper link */
179252295666SAndrew Lunn 		err = marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE);
17933758be3dSCharles-Antoine Couret 		if (err < 0)
17943758be3dSCharles-Antoine Couret 			goto error;
17953758be3dSCharles-Antoine Couret 	}
17963758be3dSCharles-Antoine Couret 
17973758be3dSCharles-Antoine Couret 	/* With the page set, use the generic resume */
17983758be3dSCharles-Antoine Couret 	return genphy_resume(phydev);
17993758be3dSCharles-Antoine Couret 
18003758be3dSCharles-Antoine Couret error:
180152295666SAndrew Lunn 	marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE);
18023758be3dSCharles-Antoine Couret 	return err;
18033758be3dSCharles-Antoine Couret }
18043758be3dSCharles-Antoine Couret 
marvell_aneg_done(struct phy_device * phydev)18056b358aedSSebastian Hesselbarth static int marvell_aneg_done(struct phy_device *phydev)
18066b358aedSSebastian Hesselbarth {
18076b358aedSSebastian Hesselbarth 	int retval = phy_read(phydev, MII_M1011_PHY_STATUS);
1808e69d9ed4SAndrew Lunn 
18096b358aedSSebastian Hesselbarth 	return (retval < 0) ? retval : (retval & MII_M1011_PHY_STATUS_RESOLVED);
18106b358aedSSebastian Hesselbarth }
18116b358aedSSebastian Hesselbarth 
m88e1318_get_wol(struct phy_device * phydev,struct ethtool_wolinfo * wol)181223beb38fSAndrew Lunn static void m88e1318_get_wol(struct phy_device *phydev,
181323beb38fSAndrew Lunn 			     struct ethtool_wolinfo *wol)
18143871c387SMichael Stapelberg {
1815f4f9dcc3SJisheng Zhang 	int ret;
1816424ca4c5SRussell King 
18176164659fSSong Yoong Siang 	wol->supported = WAKE_MAGIC | WAKE_PHY;
18183871c387SMichael Stapelberg 	wol->wolopts = 0;
18193871c387SMichael Stapelberg 
1820f4f9dcc3SJisheng Zhang 	ret = phy_read_paged(phydev, MII_MARVELL_WOL_PAGE,
1821f4f9dcc3SJisheng Zhang 			     MII_88E1318S_PHY_WOL_CTRL);
18226164659fSSong Yoong Siang 	if (ret < 0)
18236164659fSSong Yoong Siang 		return;
18246164659fSSong Yoong Siang 
18256164659fSSong Yoong Siang 	if (ret & MII_88E1318S_PHY_WOL_CTRL_MAGIC_PACKET_MATCH_ENABLE)
18263871c387SMichael Stapelberg 		wol->wolopts |= WAKE_MAGIC;
18276164659fSSong Yoong Siang 
18286164659fSSong Yoong Siang 	if (ret & MII_88E1318S_PHY_WOL_CTRL_LINK_UP_ENABLE)
18296164659fSSong Yoong Siang 		wol->wolopts |= WAKE_PHY;
18303871c387SMichael Stapelberg }
18313871c387SMichael Stapelberg 
m88e1318_set_wol(struct phy_device * phydev,struct ethtool_wolinfo * wol)183223beb38fSAndrew Lunn static int m88e1318_set_wol(struct phy_device *phydev,
183323beb38fSAndrew Lunn 			    struct ethtool_wolinfo *wol)
18343871c387SMichael Stapelberg {
1835424ca4c5SRussell King 	int err = 0, oldpage;
18363871c387SMichael Stapelberg 
1837424ca4c5SRussell King 	oldpage = phy_save_page(phydev);
1838424ca4c5SRussell King 	if (oldpage < 0)
1839424ca4c5SRussell King 		goto error;
18403871c387SMichael Stapelberg 
18416164659fSSong Yoong Siang 	if (wol->wolopts & (WAKE_MAGIC | WAKE_PHY)) {
18423871c387SMichael Stapelberg 		/* Explicitly switch to page 0x00, just to be sure */
1843424ca4c5SRussell King 		err = marvell_write_page(phydev, MII_MARVELL_COPPER_PAGE);
18443871c387SMichael Stapelberg 		if (err < 0)
1845424ca4c5SRussell King 			goto error;
18463871c387SMichael Stapelberg 
1847b6a930faSJingju Hou 		/* If WOL event happened once, the LED[2] interrupt pin
1848b6a930faSJingju Hou 		 * will not be cleared unless we reading the interrupt status
1849b6a930faSJingju Hou 		 * register. If interrupts are in use, the normal interrupt
1850b6a930faSJingju Hou 		 * handling will clear the WOL event. Clear the WOL event
1851b6a930faSJingju Hou 		 * before enabling it if !phy_interrupt_is_valid()
1852b6a930faSJingju Hou 		 */
1853b6a930faSJingju Hou 		if (!phy_interrupt_is_valid(phydev))
1854e0a7328fSAndrew Lunn 			__phy_read(phydev, MII_M1011_IEVENT);
1855b6a930faSJingju Hou 
18563871c387SMichael Stapelberg 		/* Enable the WOL interrupt */
1857832913c3SYejune Deng 		err = __phy_set_bits(phydev, MII_88E1318S_PHY_CSIER,
1858424ca4c5SRussell King 				     MII_88E1318S_PHY_CSIER_WOL_EIE);
18593871c387SMichael Stapelberg 		if (err < 0)
1860424ca4c5SRussell King 			goto error;
18613871c387SMichael Stapelberg 
1862424ca4c5SRussell King 		err = marvell_write_page(phydev, MII_MARVELL_LED_PAGE);
18633871c387SMichael Stapelberg 		if (err < 0)
1864424ca4c5SRussell King 			goto error;
18653871c387SMichael Stapelberg 
18663871c387SMichael Stapelberg 		/* Setup LED[2] as interrupt pin (active low) */
1867424ca4c5SRussell King 		err = __phy_modify(phydev, MII_88E1318S_PHY_LED_TCR,
1868f102852fSRussell King 				   MII_88E1318S_PHY_LED_TCR_FORCE_INT,
1869424ca4c5SRussell King 				   MII_88E1318S_PHY_LED_TCR_INTn_ENABLE |
1870424ca4c5SRussell King 				   MII_88E1318S_PHY_LED_TCR_INT_ACTIVE_LOW);
18713871c387SMichael Stapelberg 		if (err < 0)
1872424ca4c5SRussell King 			goto error;
18736164659fSSong Yoong Siang 	}
18743871c387SMichael Stapelberg 
18756164659fSSong Yoong Siang 	if (wol->wolopts & WAKE_MAGIC) {
1876424ca4c5SRussell King 		err = marvell_write_page(phydev, MII_MARVELL_WOL_PAGE);
18773871c387SMichael Stapelberg 		if (err < 0)
1878424ca4c5SRussell King 			goto error;
18793871c387SMichael Stapelberg 
18803871c387SMichael Stapelberg 		/* Store the device address for the magic packet */
1881424ca4c5SRussell King 		err = __phy_write(phydev, MII_88E1318S_PHY_MAGIC_PACKET_WORD2,
18823871c387SMichael Stapelberg 				((phydev->attached_dev->dev_addr[5] << 8) |
18833871c387SMichael Stapelberg 				 phydev->attached_dev->dev_addr[4]));
18843871c387SMichael Stapelberg 		if (err < 0)
1885424ca4c5SRussell King 			goto error;
1886424ca4c5SRussell King 		err = __phy_write(phydev, MII_88E1318S_PHY_MAGIC_PACKET_WORD1,
18873871c387SMichael Stapelberg 				((phydev->attached_dev->dev_addr[3] << 8) |
18883871c387SMichael Stapelberg 				 phydev->attached_dev->dev_addr[2]));
18893871c387SMichael Stapelberg 		if (err < 0)
1890424ca4c5SRussell King 			goto error;
1891424ca4c5SRussell King 		err = __phy_write(phydev, MII_88E1318S_PHY_MAGIC_PACKET_WORD0,
18923871c387SMichael Stapelberg 				((phydev->attached_dev->dev_addr[1] << 8) |
18933871c387SMichael Stapelberg 				 phydev->attached_dev->dev_addr[0]));
18943871c387SMichael Stapelberg 		if (err < 0)
1895424ca4c5SRussell King 			goto error;
18963871c387SMichael Stapelberg 
18973871c387SMichael Stapelberg 		/* Clear WOL status and enable magic packet matching */
1898832913c3SYejune Deng 		err = __phy_set_bits(phydev, MII_88E1318S_PHY_WOL_CTRL,
1899424ca4c5SRussell King 				     MII_88E1318S_PHY_WOL_CTRL_CLEAR_WOL_STATUS |
1900424ca4c5SRussell King 				     MII_88E1318S_PHY_WOL_CTRL_MAGIC_PACKET_MATCH_ENABLE);
19013871c387SMichael Stapelberg 		if (err < 0)
1902424ca4c5SRussell King 			goto error;
19033871c387SMichael Stapelberg 	} else {
1904424ca4c5SRussell King 		err = marvell_write_page(phydev, MII_MARVELL_WOL_PAGE);
19053871c387SMichael Stapelberg 		if (err < 0)
1906424ca4c5SRussell King 			goto error;
19073871c387SMichael Stapelberg 
19083871c387SMichael Stapelberg 		/* Clear WOL status and disable magic packet matching */
1909424ca4c5SRussell King 		err = __phy_modify(phydev, MII_88E1318S_PHY_WOL_CTRL,
1910f102852fSRussell King 				   MII_88E1318S_PHY_WOL_CTRL_MAGIC_PACKET_MATCH_ENABLE,
1911424ca4c5SRussell King 				   MII_88E1318S_PHY_WOL_CTRL_CLEAR_WOL_STATUS);
19123871c387SMichael Stapelberg 		if (err < 0)
1913424ca4c5SRussell King 			goto error;
19143871c387SMichael Stapelberg 	}
19153871c387SMichael Stapelberg 
19166164659fSSong Yoong Siang 	if (wol->wolopts & WAKE_PHY) {
19176164659fSSong Yoong Siang 		err = marvell_write_page(phydev, MII_MARVELL_WOL_PAGE);
19186164659fSSong Yoong Siang 		if (err < 0)
19196164659fSSong Yoong Siang 			goto error;
19206164659fSSong Yoong Siang 
19216164659fSSong Yoong Siang 		/* Clear WOL status and enable link up event */
19226164659fSSong Yoong Siang 		err = __phy_modify(phydev, MII_88E1318S_PHY_WOL_CTRL, 0,
19236164659fSSong Yoong Siang 				   MII_88E1318S_PHY_WOL_CTRL_CLEAR_WOL_STATUS |
19246164659fSSong Yoong Siang 				   MII_88E1318S_PHY_WOL_CTRL_LINK_UP_ENABLE);
19256164659fSSong Yoong Siang 		if (err < 0)
19266164659fSSong Yoong Siang 			goto error;
19276164659fSSong Yoong Siang 	} else {
19286164659fSSong Yoong Siang 		err = marvell_write_page(phydev, MII_MARVELL_WOL_PAGE);
19296164659fSSong Yoong Siang 		if (err < 0)
19306164659fSSong Yoong Siang 			goto error;
19316164659fSSong Yoong Siang 
19326164659fSSong Yoong Siang 		/* Clear WOL status and disable link up event */
19336164659fSSong Yoong Siang 		err = __phy_modify(phydev, MII_88E1318S_PHY_WOL_CTRL,
19346164659fSSong Yoong Siang 				   MII_88E1318S_PHY_WOL_CTRL_LINK_UP_ENABLE,
19356164659fSSong Yoong Siang 				   MII_88E1318S_PHY_WOL_CTRL_CLEAR_WOL_STATUS);
19366164659fSSong Yoong Siang 		if (err < 0)
19376164659fSSong Yoong Siang 			goto error;
19386164659fSSong Yoong Siang 	}
19396164659fSSong Yoong Siang 
1940424ca4c5SRussell King error:
1941424ca4c5SRussell King 	return phy_restore_page(phydev, oldpage, err);
19423871c387SMichael Stapelberg }
19433871c387SMichael Stapelberg 
marvell_get_sset_count(struct phy_device * phydev)1944d2fa47d9SAndrew Lunn static int marvell_get_sset_count(struct phy_device *phydev)
1945d2fa47d9SAndrew Lunn {
19463c1bcc86SAndrew Lunn 	if (linkmode_test_bit(ETHTOOL_LINK_MODE_FIBRE_BIT,
19473c1bcc86SAndrew Lunn 			      phydev->supported))
1948d2fa47d9SAndrew Lunn 		return ARRAY_SIZE(marvell_hw_stats);
19492170fef7SCharles-Antoine Couret 	else
19502170fef7SCharles-Antoine Couret 		return ARRAY_SIZE(marvell_hw_stats) - NB_FIBER_STATS;
1951d2fa47d9SAndrew Lunn }
1952d2fa47d9SAndrew Lunn 
marvell_get_strings(struct phy_device * phydev,u8 * data)1953d2fa47d9SAndrew Lunn static void marvell_get_strings(struct phy_device *phydev, u8 *data)
1954d2fa47d9SAndrew Lunn {
1955fdfdf867SAndrew Lunn 	int count = marvell_get_sset_count(phydev);
1956d2fa47d9SAndrew Lunn 	int i;
1957d2fa47d9SAndrew Lunn 
1958fdfdf867SAndrew Lunn 	for (i = 0; i < count; i++) {
1959fb3ceec1SWolfram Sang 		strscpy(data + i * ETH_GSTRING_LEN,
1960d2fa47d9SAndrew Lunn 			marvell_hw_stats[i].string, ETH_GSTRING_LEN);
1961d2fa47d9SAndrew Lunn 	}
1962d2fa47d9SAndrew Lunn }
1963d2fa47d9SAndrew Lunn 
marvell_get_stat(struct phy_device * phydev,int i)1964d2fa47d9SAndrew Lunn static u64 marvell_get_stat(struct phy_device *phydev, int i)
1965d2fa47d9SAndrew Lunn {
1966d2fa47d9SAndrew Lunn 	struct marvell_hw_stat stat = marvell_hw_stats[i];
1967d2fa47d9SAndrew Lunn 	struct marvell_priv *priv = phydev->priv;
1968424ca4c5SRussell King 	int val;
1969321b4d4bSAndrew Lunn 	u64 ret;
1970d2fa47d9SAndrew Lunn 
1971424ca4c5SRussell King 	val = phy_read_paged(phydev, stat.page, stat.reg);
1972d2fa47d9SAndrew Lunn 	if (val < 0) {
19736c3442f5SJisheng Zhang 		ret = U64_MAX;
1974d2fa47d9SAndrew Lunn 	} else {
1975d2fa47d9SAndrew Lunn 		val = val & ((1 << stat.bits) - 1);
1976d2fa47d9SAndrew Lunn 		priv->stats[i] += val;
1977321b4d4bSAndrew Lunn 		ret = priv->stats[i];
1978d2fa47d9SAndrew Lunn 	}
1979d2fa47d9SAndrew Lunn 
1980321b4d4bSAndrew Lunn 	return ret;
1981d2fa47d9SAndrew Lunn }
1982d2fa47d9SAndrew Lunn 
marvell_get_stats(struct phy_device * phydev,struct ethtool_stats * stats,u64 * data)1983d2fa47d9SAndrew Lunn static void marvell_get_stats(struct phy_device *phydev,
1984d2fa47d9SAndrew Lunn 			      struct ethtool_stats *stats, u64 *data)
1985d2fa47d9SAndrew Lunn {
1986fdfdf867SAndrew Lunn 	int count = marvell_get_sset_count(phydev);
1987d2fa47d9SAndrew Lunn 	int i;
1988d2fa47d9SAndrew Lunn 
1989fdfdf867SAndrew Lunn 	for (i = 0; i < count; i++)
1990d2fa47d9SAndrew Lunn 		data[i] = marvell_get_stat(phydev, i);
1991d2fa47d9SAndrew Lunn }
1992d2fa47d9SAndrew Lunn 
m88e1510_loopback(struct phy_device * phydev,bool enable)1993020a45afSMohammad Athari Bin Ismail static int m88e1510_loopback(struct phy_device *phydev, bool enable)
1994020a45afSMohammad Athari Bin Ismail {
1995020a45afSMohammad Athari Bin Ismail 	int err;
1996020a45afSMohammad Athari Bin Ismail 
1997020a45afSMohammad Athari Bin Ismail 	if (enable) {
1998e62dbaffSRussell King (Oracle) 		u16 bmcr_ctl, mscr2_ctl = 0;
1999020a45afSMohammad Athari Bin Ismail 
2000e62dbaffSRussell King (Oracle) 		bmcr_ctl = mii_bmcr_encode_fixed(phydev->speed, phydev->duplex);
2001020a45afSMohammad Athari Bin Ismail 
2002020a45afSMohammad Athari Bin Ismail 		err = phy_write(phydev, MII_BMCR, bmcr_ctl);
2003020a45afSMohammad Athari Bin Ismail 		if (err < 0)
2004020a45afSMohammad Athari Bin Ismail 			return err;
2005020a45afSMohammad Athari Bin Ismail 
2006020a45afSMohammad Athari Bin Ismail 		if (phydev->speed == SPEED_1000)
2007020a45afSMohammad Athari Bin Ismail 			mscr2_ctl = BMCR_SPEED1000;
2008020a45afSMohammad Athari Bin Ismail 		else if (phydev->speed == SPEED_100)
2009020a45afSMohammad Athari Bin Ismail 			mscr2_ctl = BMCR_SPEED100;
2010020a45afSMohammad Athari Bin Ismail 
2011020a45afSMohammad Athari Bin Ismail 		err = phy_modify_paged(phydev, MII_MARVELL_MSCR_PAGE,
2012020a45afSMohammad Athari Bin Ismail 				       MII_88E1510_MSCR_2, BMCR_SPEED1000 |
2013020a45afSMohammad Athari Bin Ismail 				       BMCR_SPEED100, mscr2_ctl);
2014020a45afSMohammad Athari Bin Ismail 		if (err < 0)
2015020a45afSMohammad Athari Bin Ismail 			return err;
2016020a45afSMohammad Athari Bin Ismail 
2017020a45afSMohammad Athari Bin Ismail 		/* Need soft reset to have speed configuration takes effect */
2018020a45afSMohammad Athari Bin Ismail 		err = genphy_soft_reset(phydev);
2019020a45afSMohammad Athari Bin Ismail 		if (err < 0)
2020020a45afSMohammad Athari Bin Ismail 			return err;
2021020a45afSMohammad Athari Bin Ismail 
202218c532e4SAminuddin Jamaluddin 		err = phy_modify(phydev, MII_BMCR, BMCR_LOOPBACK,
2023020a45afSMohammad Athari Bin Ismail 				 BMCR_LOOPBACK);
202418c532e4SAminuddin Jamaluddin 
202518c532e4SAminuddin Jamaluddin 		if (!err) {
202618c532e4SAminuddin Jamaluddin 			/* It takes some time for PHY device to switch
202718c532e4SAminuddin Jamaluddin 			 * into/out-of loopback mode.
202818c532e4SAminuddin Jamaluddin 			 */
202918c532e4SAminuddin Jamaluddin 			msleep(1000);
203018c532e4SAminuddin Jamaluddin 		}
203118c532e4SAminuddin Jamaluddin 		return err;
2032020a45afSMohammad Athari Bin Ismail 	} else {
2033020a45afSMohammad Athari Bin Ismail 		err = phy_modify(phydev, MII_BMCR, BMCR_LOOPBACK, 0);
2034020a45afSMohammad Athari Bin Ismail 		if (err < 0)
2035020a45afSMohammad Athari Bin Ismail 			return err;
2036020a45afSMohammad Athari Bin Ismail 
2037020a45afSMohammad Athari Bin Ismail 		return phy_config_aneg(phydev);
2038020a45afSMohammad Athari Bin Ismail 	}
2039020a45afSMohammad Athari Bin Ismail }
2040020a45afSMohammad Athari Bin Ismail 
marvell_vct5_wait_complete(struct phy_device * phydev)20410c9bcc1dSAndrew Lunn static int marvell_vct5_wait_complete(struct phy_device *phydev)
20420c9bcc1dSAndrew Lunn {
20430c9bcc1dSAndrew Lunn 	int i;
20440c9bcc1dSAndrew Lunn 	int val;
20450c9bcc1dSAndrew Lunn 
20460c9bcc1dSAndrew Lunn 	for (i = 0; i < 32; i++) {
2047a618e86dSAndrew Lunn 		val = __phy_read(phydev, MII_VCT5_CTRL);
20480c9bcc1dSAndrew Lunn 		if (val < 0)
20490c9bcc1dSAndrew Lunn 			return val;
20500c9bcc1dSAndrew Lunn 
20510c9bcc1dSAndrew Lunn 		if (val & MII_VCT5_CTRL_COMPLETE)
20520c9bcc1dSAndrew Lunn 			return 0;
20530c9bcc1dSAndrew Lunn 	}
20540c9bcc1dSAndrew Lunn 
20550c9bcc1dSAndrew Lunn 	phydev_err(phydev, "Timeout while waiting for cable test to finish\n");
20560c9bcc1dSAndrew Lunn 	return -ETIMEDOUT;
20570c9bcc1dSAndrew Lunn }
20580c9bcc1dSAndrew Lunn 
marvell_vct5_amplitude(struct phy_device * phydev,int pair)20590c9bcc1dSAndrew Lunn static int marvell_vct5_amplitude(struct phy_device *phydev, int pair)
20600c9bcc1dSAndrew Lunn {
20610c9bcc1dSAndrew Lunn 	int amplitude;
20620c9bcc1dSAndrew Lunn 	int val;
20630c9bcc1dSAndrew Lunn 	int reg;
20640c9bcc1dSAndrew Lunn 
20650c9bcc1dSAndrew Lunn 	reg = MII_VCT5_TX_RX_MDI0_COUPLING + pair;
2066a618e86dSAndrew Lunn 	val = __phy_read(phydev, reg);
20670c9bcc1dSAndrew Lunn 
20680c9bcc1dSAndrew Lunn 	if (val < 0)
20690c9bcc1dSAndrew Lunn 		return 0;
20700c9bcc1dSAndrew Lunn 
20710c9bcc1dSAndrew Lunn 	amplitude = (val & MII_VCT5_TX_RX_AMPLITUDE_MASK) >>
20720c9bcc1dSAndrew Lunn 		MII_VCT5_TX_RX_AMPLITUDE_SHIFT;
20730c9bcc1dSAndrew Lunn 
20740c9bcc1dSAndrew Lunn 	if (!(val & MII_VCT5_TX_RX_COUPLING_POSITIVE_REFLECTION))
20750c9bcc1dSAndrew Lunn 		amplitude = -amplitude;
20760c9bcc1dSAndrew Lunn 
20770c9bcc1dSAndrew Lunn 	return 1000 * amplitude / 128;
20780c9bcc1dSAndrew Lunn }
20790c9bcc1dSAndrew Lunn 
marvell_vct5_distance2cm(int distance)20800c9bcc1dSAndrew Lunn static u32 marvell_vct5_distance2cm(int distance)
20810c9bcc1dSAndrew Lunn {
20820c9bcc1dSAndrew Lunn 	return distance * 805 / 10;
20830c9bcc1dSAndrew Lunn }
20840c9bcc1dSAndrew Lunn 
marvell_vct5_cm2distance(int cm)2085f2bc8ad3SAndrew Lunn static u32 marvell_vct5_cm2distance(int cm)
20860c9bcc1dSAndrew Lunn {
2087f2bc8ad3SAndrew Lunn 	return cm * 10 / 805;
2088f2bc8ad3SAndrew Lunn }
2089f2bc8ad3SAndrew Lunn 
marvell_vct5_amplitude_distance(struct phy_device * phydev,int distance,int pair)2090f2bc8ad3SAndrew Lunn static int marvell_vct5_amplitude_distance(struct phy_device *phydev,
2091f2bc8ad3SAndrew Lunn 					   int distance, int pair)
2092f2bc8ad3SAndrew Lunn {
20930c9bcc1dSAndrew Lunn 	u16 reg;
20940c9bcc1dSAndrew Lunn 	int err;
2095f2bc8ad3SAndrew Lunn 	int mV;
2096f2bc8ad3SAndrew Lunn 	int i;
20970c9bcc1dSAndrew Lunn 
2098a618e86dSAndrew Lunn 	err = __phy_write(phydev, MII_VCT5_SAMPLE_POINT_DISTANCE,
20990c9bcc1dSAndrew Lunn 			  distance);
21000c9bcc1dSAndrew Lunn 	if (err)
21010c9bcc1dSAndrew Lunn 		return err;
21020c9bcc1dSAndrew Lunn 
21030c9bcc1dSAndrew Lunn 	reg = MII_VCT5_CTRL_ENABLE |
21040c9bcc1dSAndrew Lunn 		MII_VCT5_CTRL_TX_SAME_CHANNEL |
21050c9bcc1dSAndrew Lunn 		MII_VCT5_CTRL_SAMPLES_DEFAULT |
21060c9bcc1dSAndrew Lunn 		MII_VCT5_CTRL_SAMPLE_POINT |
21070c9bcc1dSAndrew Lunn 		MII_VCT5_CTRL_PEEK_HYST_DEFAULT;
2108a618e86dSAndrew Lunn 	err = __phy_write(phydev, MII_VCT5_CTRL, reg);
21090c9bcc1dSAndrew Lunn 	if (err)
21100c9bcc1dSAndrew Lunn 		return err;
21110c9bcc1dSAndrew Lunn 
21120c9bcc1dSAndrew Lunn 	err = marvell_vct5_wait_complete(phydev);
21130c9bcc1dSAndrew Lunn 	if (err)
21140c9bcc1dSAndrew Lunn 		return err;
21150c9bcc1dSAndrew Lunn 
2116f2bc8ad3SAndrew Lunn 	for (i = 0; i < 4; i++) {
2117f2bc8ad3SAndrew Lunn 		if (pair != PHY_PAIR_ALL && i != pair)
2118f2bc8ad3SAndrew Lunn 			continue;
21190c9bcc1dSAndrew Lunn 
2120f2bc8ad3SAndrew Lunn 		mV = marvell_vct5_amplitude(phydev, i);
2121f2bc8ad3SAndrew Lunn 		ethnl_cable_test_amplitude(phydev, i, mV);
2122f2bc8ad3SAndrew Lunn 	}
21230c9bcc1dSAndrew Lunn 
21240c9bcc1dSAndrew Lunn 	return 0;
21250c9bcc1dSAndrew Lunn }
21260c9bcc1dSAndrew Lunn 
marvell_vct5_amplitude_graph(struct phy_device * phydev)21270c9bcc1dSAndrew Lunn static int marvell_vct5_amplitude_graph(struct phy_device *phydev)
21280c9bcc1dSAndrew Lunn {
2129f2bc8ad3SAndrew Lunn 	struct marvell_priv *priv = phydev->priv;
21300c9bcc1dSAndrew Lunn 	int distance;
2131db8668a1SAndrew Lunn 	u16 width;
2132a618e86dSAndrew Lunn 	int page;
21330c9bcc1dSAndrew Lunn 	int err;
21340c9bcc1dSAndrew Lunn 	u16 reg;
21350c9bcc1dSAndrew Lunn 
2136db8668a1SAndrew Lunn 	if (priv->first <= TDR_SHORT_CABLE_LENGTH)
2137db8668a1SAndrew Lunn 		width = MII_VCT5_TX_PULSE_CTRL_PULSE_WIDTH_32nS;
2138db8668a1SAndrew Lunn 	else
2139db8668a1SAndrew Lunn 		width = MII_VCT5_TX_PULSE_CTRL_PULSE_WIDTH_128nS;
2140db8668a1SAndrew Lunn 
21410c9bcc1dSAndrew Lunn 	reg = MII_VCT5_TX_PULSE_CTRL_GT_140m_46_86mV |
21420c9bcc1dSAndrew Lunn 		MII_VCT5_TX_PULSE_CTRL_DONT_WAIT_LINK_DOWN |
2143db8668a1SAndrew Lunn 		MII_VCT5_TX_PULSE_CTRL_MAX_AMP | width;
21440c9bcc1dSAndrew Lunn 
21450c9bcc1dSAndrew Lunn 	err = phy_write_paged(phydev, MII_MARVELL_VCT5_PAGE,
21460c9bcc1dSAndrew Lunn 			      MII_VCT5_TX_PULSE_CTRL, reg);
21470c9bcc1dSAndrew Lunn 	if (err)
21480c9bcc1dSAndrew Lunn 		return err;
21490c9bcc1dSAndrew Lunn 
2150a618e86dSAndrew Lunn 	/* Reading the TDR data is very MDIO heavy. We need to optimize
2151a618e86dSAndrew Lunn 	 * access to keep the time to a minimum. So lock the bus once,
2152a618e86dSAndrew Lunn 	 * and don't release it until complete. We can then avoid having
2153a618e86dSAndrew Lunn 	 * to change the page for every access, greatly speeding things
2154a618e86dSAndrew Lunn 	 * up.
2155a618e86dSAndrew Lunn 	 */
2156a618e86dSAndrew Lunn 	page = phy_select_page(phydev, MII_MARVELL_VCT5_PAGE);
2157a618e86dSAndrew Lunn 	if (page < 0)
2158830f5ce2SDan Carpenter 		goto restore_page;
2159a618e86dSAndrew Lunn 
2160f2bc8ad3SAndrew Lunn 	for (distance = priv->first;
2161f2bc8ad3SAndrew Lunn 	     distance <= priv->last;
2162f2bc8ad3SAndrew Lunn 	     distance += priv->step) {
2163f2bc8ad3SAndrew Lunn 		err = marvell_vct5_amplitude_distance(phydev, distance,
2164f2bc8ad3SAndrew Lunn 						      priv->pair);
21650c9bcc1dSAndrew Lunn 		if (err)
2166a618e86dSAndrew Lunn 			goto restore_page;
2167db8668a1SAndrew Lunn 
2168db8668a1SAndrew Lunn 		if (distance > TDR_SHORT_CABLE_LENGTH &&
2169db8668a1SAndrew Lunn 		    width == MII_VCT5_TX_PULSE_CTRL_PULSE_WIDTH_32nS) {
2170db8668a1SAndrew Lunn 			width = MII_VCT5_TX_PULSE_CTRL_PULSE_WIDTH_128nS;
2171db8668a1SAndrew Lunn 			reg = MII_VCT5_TX_PULSE_CTRL_GT_140m_46_86mV |
2172db8668a1SAndrew Lunn 				MII_VCT5_TX_PULSE_CTRL_DONT_WAIT_LINK_DOWN |
2173db8668a1SAndrew Lunn 				MII_VCT5_TX_PULSE_CTRL_MAX_AMP | width;
2174db8668a1SAndrew Lunn 			err = __phy_write(phydev, MII_VCT5_TX_PULSE_CTRL, reg);
2175db8668a1SAndrew Lunn 			if (err)
2176db8668a1SAndrew Lunn 				goto restore_page;
2177db8668a1SAndrew Lunn 		}
21780c9bcc1dSAndrew Lunn 	}
21790c9bcc1dSAndrew Lunn 
2180a618e86dSAndrew Lunn restore_page:
2181a618e86dSAndrew Lunn 	return phy_restore_page(phydev, page, err);
21820c9bcc1dSAndrew Lunn }
21830c9bcc1dSAndrew Lunn 
marvell_cable_test_start_common(struct phy_device * phydev)21840c9bcc1dSAndrew Lunn static int marvell_cable_test_start_common(struct phy_device *phydev)
2185fc879f72SAndrew Lunn {
2186fc879f72SAndrew Lunn 	int bmcr, bmsr, ret;
2187fc879f72SAndrew Lunn 
2188fc879f72SAndrew Lunn 	/* If auto-negotiation is enabled, but not complete, the cable
2189fc879f72SAndrew Lunn 	 * test never completes. So disable auto-neg.
2190fc879f72SAndrew Lunn 	 */
2191fc879f72SAndrew Lunn 	bmcr = phy_read(phydev, MII_BMCR);
2192fc879f72SAndrew Lunn 	if (bmcr < 0)
2193fc879f72SAndrew Lunn 		return bmcr;
2194fc879f72SAndrew Lunn 
2195fc879f72SAndrew Lunn 	bmsr = phy_read(phydev, MII_BMSR);
2196fc879f72SAndrew Lunn 
2197fc879f72SAndrew Lunn 	if (bmsr < 0)
2198fc879f72SAndrew Lunn 		return bmsr;
2199fc879f72SAndrew Lunn 
2200fc879f72SAndrew Lunn 	if (bmcr & BMCR_ANENABLE) {
2201832913c3SYejune Deng 		ret =  phy_clear_bits(phydev, MII_BMCR, BMCR_ANENABLE);
2202fc879f72SAndrew Lunn 		if (ret < 0)
2203fc879f72SAndrew Lunn 			return ret;
2204fc879f72SAndrew Lunn 		ret = genphy_soft_reset(phydev);
2205fc879f72SAndrew Lunn 		if (ret < 0)
2206fc879f72SAndrew Lunn 			return ret;
2207fc879f72SAndrew Lunn 	}
2208fc879f72SAndrew Lunn 
2209fc879f72SAndrew Lunn 	/* If the link is up, allow it some time to go down */
2210fc879f72SAndrew Lunn 	if (bmsr & BMSR_LSTATUS)
2211fc879f72SAndrew Lunn 		msleep(1500);
2212fc879f72SAndrew Lunn 
22130c9bcc1dSAndrew Lunn 	return 0;
22140c9bcc1dSAndrew Lunn }
22150c9bcc1dSAndrew Lunn 
marvell_vct7_cable_test_start(struct phy_device * phydev)22160c9bcc1dSAndrew Lunn static int marvell_vct7_cable_test_start(struct phy_device *phydev)
22170c9bcc1dSAndrew Lunn {
22180c9bcc1dSAndrew Lunn 	struct marvell_priv *priv = phydev->priv;
22190c9bcc1dSAndrew Lunn 	int ret;
22200c9bcc1dSAndrew Lunn 
22210c9bcc1dSAndrew Lunn 	ret = marvell_cable_test_start_common(phydev);
22220c9bcc1dSAndrew Lunn 	if (ret)
22230c9bcc1dSAndrew Lunn 		return ret;
22240c9bcc1dSAndrew Lunn 
22250c9bcc1dSAndrew Lunn 	priv->cable_test_tdr = false;
22260c9bcc1dSAndrew Lunn 
22270c9bcc1dSAndrew Lunn 	/* Reset the VCT5 API control to defaults, otherwise
22280c9bcc1dSAndrew Lunn 	 * VCT7 does not work correctly.
22290c9bcc1dSAndrew Lunn 	 */
22300c9bcc1dSAndrew Lunn 	ret = phy_write_paged(phydev, MII_MARVELL_VCT5_PAGE,
22310c9bcc1dSAndrew Lunn 			      MII_VCT5_CTRL,
22320c9bcc1dSAndrew Lunn 			      MII_VCT5_CTRL_TX_SAME_CHANNEL |
22330c9bcc1dSAndrew Lunn 			      MII_VCT5_CTRL_SAMPLES_DEFAULT |
22340c9bcc1dSAndrew Lunn 			      MII_VCT5_CTRL_MODE_MAXIMUM_PEEK |
22350c9bcc1dSAndrew Lunn 			      MII_VCT5_CTRL_PEEK_HYST_DEFAULT);
22360c9bcc1dSAndrew Lunn 	if (ret)
22370c9bcc1dSAndrew Lunn 		return ret;
22380c9bcc1dSAndrew Lunn 
22390c9bcc1dSAndrew Lunn 	ret = phy_write_paged(phydev, MII_MARVELL_VCT5_PAGE,
22400c9bcc1dSAndrew Lunn 			      MII_VCT5_SAMPLE_POINT_DISTANCE, 0);
22410c9bcc1dSAndrew Lunn 	if (ret)
22420c9bcc1dSAndrew Lunn 		return ret;
22430c9bcc1dSAndrew Lunn 
2244fc879f72SAndrew Lunn 	return phy_write_paged(phydev, MII_MARVELL_VCT7_PAGE,
2245fc879f72SAndrew Lunn 			       MII_VCT7_CTRL,
2246fc879f72SAndrew Lunn 			       MII_VCT7_CTRL_RUN_NOW |
2247fc879f72SAndrew Lunn 			       MII_VCT7_CTRL_CENTIMETERS);
2248fc879f72SAndrew Lunn }
2249fc879f72SAndrew Lunn 
marvell_vct5_cable_test_tdr_start(struct phy_device * phydev,const struct phy_tdr_config * cfg)2250f2bc8ad3SAndrew Lunn static int marvell_vct5_cable_test_tdr_start(struct phy_device *phydev,
2251f2bc8ad3SAndrew Lunn 					     const struct phy_tdr_config *cfg)
22520c9bcc1dSAndrew Lunn {
22530c9bcc1dSAndrew Lunn 	struct marvell_priv *priv = phydev->priv;
22540c9bcc1dSAndrew Lunn 	int ret;
22550c9bcc1dSAndrew Lunn 
2256f2bc8ad3SAndrew Lunn 	priv->cable_test_tdr = true;
2257f2bc8ad3SAndrew Lunn 	priv->first = marvell_vct5_cm2distance(cfg->first);
2258f2bc8ad3SAndrew Lunn 	priv->last = marvell_vct5_cm2distance(cfg->last);
2259f2bc8ad3SAndrew Lunn 	priv->step = marvell_vct5_cm2distance(cfg->step);
2260f2bc8ad3SAndrew Lunn 	priv->pair = cfg->pair;
2261f2bc8ad3SAndrew Lunn 
2262f2bc8ad3SAndrew Lunn 	if (priv->first > MII_VCT5_SAMPLE_POINT_DISTANCE_MAX)
2263f2bc8ad3SAndrew Lunn 		return -EINVAL;
2264f2bc8ad3SAndrew Lunn 
2265f2bc8ad3SAndrew Lunn 	if (priv->last > MII_VCT5_SAMPLE_POINT_DISTANCE_MAX)
2266f2bc8ad3SAndrew Lunn 		return -EINVAL;
2267f2bc8ad3SAndrew Lunn 
22680c9bcc1dSAndrew Lunn 	/* Disable  VCT7 */
22690c9bcc1dSAndrew Lunn 	ret = phy_write_paged(phydev, MII_MARVELL_VCT7_PAGE,
22700c9bcc1dSAndrew Lunn 			      MII_VCT7_CTRL, 0);
22710c9bcc1dSAndrew Lunn 	if (ret)
22720c9bcc1dSAndrew Lunn 		return ret;
22730c9bcc1dSAndrew Lunn 
22740c9bcc1dSAndrew Lunn 	ret = marvell_cable_test_start_common(phydev);
22750c9bcc1dSAndrew Lunn 	if (ret)
22760c9bcc1dSAndrew Lunn 		return ret;
22770c9bcc1dSAndrew Lunn 
22780c9bcc1dSAndrew Lunn 	ret = ethnl_cable_test_pulse(phydev, 1000);
22790c9bcc1dSAndrew Lunn 	if (ret)
22800c9bcc1dSAndrew Lunn 		return ret;
22810c9bcc1dSAndrew Lunn 
22820c9bcc1dSAndrew Lunn 	return ethnl_cable_test_step(phydev,
2283f2bc8ad3SAndrew Lunn 				     marvell_vct5_distance2cm(priv->first),
2284f2bc8ad3SAndrew Lunn 				     marvell_vct5_distance2cm(priv->last),
2285f2bc8ad3SAndrew Lunn 				     marvell_vct5_distance2cm(priv->step));
22860c9bcc1dSAndrew Lunn }
22870c9bcc1dSAndrew Lunn 
marvell_vct7_distance_to_length(int distance,bool meter)2288fc879f72SAndrew Lunn static int marvell_vct7_distance_to_length(int distance, bool meter)
2289fc879f72SAndrew Lunn {
2290fc879f72SAndrew Lunn 	if (meter)
2291fc879f72SAndrew Lunn 		distance *= 100;
2292fc879f72SAndrew Lunn 
2293fc879f72SAndrew Lunn 	return distance;
2294fc879f72SAndrew Lunn }
2295fc879f72SAndrew Lunn 
marvell_vct7_distance_valid(int result)2296fc879f72SAndrew Lunn static bool marvell_vct7_distance_valid(int result)
2297fc879f72SAndrew Lunn {
2298fc879f72SAndrew Lunn 	switch (result) {
2299fc879f72SAndrew Lunn 	case MII_VCT7_RESULTS_OPEN:
2300fc879f72SAndrew Lunn 	case MII_VCT7_RESULTS_SAME_SHORT:
2301fc879f72SAndrew Lunn 	case MII_VCT7_RESULTS_CROSS_SHORT:
2302fc879f72SAndrew Lunn 		return true;
2303fc879f72SAndrew Lunn 	}
2304fc879f72SAndrew Lunn 	return false;
2305fc879f72SAndrew Lunn }
2306fc879f72SAndrew Lunn 
marvell_vct7_report_length(struct phy_device * phydev,int pair,bool meter)2307fc879f72SAndrew Lunn static int marvell_vct7_report_length(struct phy_device *phydev,
2308fc879f72SAndrew Lunn 				      int pair, bool meter)
2309fc879f72SAndrew Lunn {
2310fc879f72SAndrew Lunn 	int length;
2311fc879f72SAndrew Lunn 	int ret;
2312fc879f72SAndrew Lunn 
2313fc879f72SAndrew Lunn 	ret = phy_read_paged(phydev, MII_MARVELL_VCT7_PAGE,
2314fc879f72SAndrew Lunn 			     MII_VCT7_PAIR_0_DISTANCE + pair);
2315fc879f72SAndrew Lunn 	if (ret < 0)
2316fc879f72SAndrew Lunn 		return ret;
2317fc879f72SAndrew Lunn 
2318fc879f72SAndrew Lunn 	length = marvell_vct7_distance_to_length(ret, meter);
2319fc879f72SAndrew Lunn 
2320fc879f72SAndrew Lunn 	ethnl_cable_test_fault_length(phydev, pair, length);
2321fc879f72SAndrew Lunn 
2322fc879f72SAndrew Lunn 	return 0;
2323fc879f72SAndrew Lunn }
2324fc879f72SAndrew Lunn 
marvell_vct7_cable_test_report_trans(int result)2325fc879f72SAndrew Lunn static int marvell_vct7_cable_test_report_trans(int result)
2326fc879f72SAndrew Lunn {
2327fc879f72SAndrew Lunn 	switch (result) {
2328fc879f72SAndrew Lunn 	case MII_VCT7_RESULTS_OK:
2329fc879f72SAndrew Lunn 		return ETHTOOL_A_CABLE_RESULT_CODE_OK;
2330fc879f72SAndrew Lunn 	case MII_VCT7_RESULTS_OPEN:
2331fc879f72SAndrew Lunn 		return ETHTOOL_A_CABLE_RESULT_CODE_OPEN;
2332fc879f72SAndrew Lunn 	case MII_VCT7_RESULTS_SAME_SHORT:
2333fc879f72SAndrew Lunn 		return ETHTOOL_A_CABLE_RESULT_CODE_SAME_SHORT;
2334fc879f72SAndrew Lunn 	case MII_VCT7_RESULTS_CROSS_SHORT:
2335fc879f72SAndrew Lunn 		return ETHTOOL_A_CABLE_RESULT_CODE_CROSS_SHORT;
2336fc879f72SAndrew Lunn 	default:
2337fc879f72SAndrew Lunn 		return ETHTOOL_A_CABLE_RESULT_CODE_UNSPEC;
2338fc879f72SAndrew Lunn 	}
2339fc879f72SAndrew Lunn }
2340fc879f72SAndrew Lunn 
marvell_vct7_cable_test_report(struct phy_device * phydev)2341fc879f72SAndrew Lunn static int marvell_vct7_cable_test_report(struct phy_device *phydev)
2342fc879f72SAndrew Lunn {
2343fc879f72SAndrew Lunn 	int pair0, pair1, pair2, pair3;
2344fc879f72SAndrew Lunn 	bool meter;
2345fc879f72SAndrew Lunn 	int ret;
2346fc879f72SAndrew Lunn 
2347fc879f72SAndrew Lunn 	ret = phy_read_paged(phydev, MII_MARVELL_VCT7_PAGE,
2348fc879f72SAndrew Lunn 			     MII_VCT7_RESULTS);
2349fc879f72SAndrew Lunn 	if (ret < 0)
2350fc879f72SAndrew Lunn 		return ret;
2351fc879f72SAndrew Lunn 
2352fc879f72SAndrew Lunn 	pair3 = (ret & MII_VCT7_RESULTS_PAIR3_MASK) >>
2353fc879f72SAndrew Lunn 		MII_VCT7_RESULTS_PAIR3_SHIFT;
2354fc879f72SAndrew Lunn 	pair2 = (ret & MII_VCT7_RESULTS_PAIR2_MASK) >>
2355fc879f72SAndrew Lunn 		MII_VCT7_RESULTS_PAIR2_SHIFT;
2356fc879f72SAndrew Lunn 	pair1 = (ret & MII_VCT7_RESULTS_PAIR1_MASK) >>
2357fc879f72SAndrew Lunn 		MII_VCT7_RESULTS_PAIR1_SHIFT;
2358fc879f72SAndrew Lunn 	pair0 = (ret & MII_VCT7_RESULTS_PAIR0_MASK) >>
2359fc879f72SAndrew Lunn 		MII_VCT7_RESULTS_PAIR0_SHIFT;
2360fc879f72SAndrew Lunn 
2361fc879f72SAndrew Lunn 	ethnl_cable_test_result(phydev, ETHTOOL_A_CABLE_PAIR_A,
2362fc879f72SAndrew Lunn 				marvell_vct7_cable_test_report_trans(pair0));
2363fc879f72SAndrew Lunn 	ethnl_cable_test_result(phydev, ETHTOOL_A_CABLE_PAIR_B,
2364fc879f72SAndrew Lunn 				marvell_vct7_cable_test_report_trans(pair1));
2365fc879f72SAndrew Lunn 	ethnl_cable_test_result(phydev, ETHTOOL_A_CABLE_PAIR_C,
2366fc879f72SAndrew Lunn 				marvell_vct7_cable_test_report_trans(pair2));
2367fc879f72SAndrew Lunn 	ethnl_cable_test_result(phydev, ETHTOOL_A_CABLE_PAIR_D,
2368fc879f72SAndrew Lunn 				marvell_vct7_cable_test_report_trans(pair3));
2369fc879f72SAndrew Lunn 
2370fc879f72SAndrew Lunn 	ret = phy_read_paged(phydev, MII_MARVELL_VCT7_PAGE, MII_VCT7_CTRL);
2371fc879f72SAndrew Lunn 	if (ret < 0)
2372fc879f72SAndrew Lunn 		return ret;
2373fc879f72SAndrew Lunn 
2374fc879f72SAndrew Lunn 	meter = ret & MII_VCT7_CTRL_METERS;
2375fc879f72SAndrew Lunn 
2376fc879f72SAndrew Lunn 	if (marvell_vct7_distance_valid(pair0))
2377fc879f72SAndrew Lunn 		marvell_vct7_report_length(phydev, 0, meter);
2378fc879f72SAndrew Lunn 	if (marvell_vct7_distance_valid(pair1))
2379fc879f72SAndrew Lunn 		marvell_vct7_report_length(phydev, 1, meter);
2380fc879f72SAndrew Lunn 	if (marvell_vct7_distance_valid(pair2))
2381fc879f72SAndrew Lunn 		marvell_vct7_report_length(phydev, 2, meter);
2382fc879f72SAndrew Lunn 	if (marvell_vct7_distance_valid(pair3))
2383fc879f72SAndrew Lunn 		marvell_vct7_report_length(phydev, 3, meter);
2384fc879f72SAndrew Lunn 
2385fc879f72SAndrew Lunn 	return 0;
2386fc879f72SAndrew Lunn }
2387fc879f72SAndrew Lunn 
marvell_vct7_cable_test_get_status(struct phy_device * phydev,bool * finished)2388fc879f72SAndrew Lunn static int marvell_vct7_cable_test_get_status(struct phy_device *phydev,
2389fc879f72SAndrew Lunn 					      bool *finished)
2390fc879f72SAndrew Lunn {
23910c9bcc1dSAndrew Lunn 	struct marvell_priv *priv = phydev->priv;
2392fc879f72SAndrew Lunn 	int ret;
2393fc879f72SAndrew Lunn 
23940c9bcc1dSAndrew Lunn 	if (priv->cable_test_tdr) {
23950c9bcc1dSAndrew Lunn 		ret = marvell_vct5_amplitude_graph(phydev);
23960c9bcc1dSAndrew Lunn 		*finished = true;
23970c9bcc1dSAndrew Lunn 		return ret;
23980c9bcc1dSAndrew Lunn 	}
23990c9bcc1dSAndrew Lunn 
2400fc879f72SAndrew Lunn 	*finished = false;
2401fc879f72SAndrew Lunn 
2402fc879f72SAndrew Lunn 	ret = phy_read_paged(phydev, MII_MARVELL_VCT7_PAGE,
2403fc879f72SAndrew Lunn 			     MII_VCT7_CTRL);
2404fc879f72SAndrew Lunn 
2405fc879f72SAndrew Lunn 	if (ret < 0)
2406fc879f72SAndrew Lunn 		return ret;
2407fc879f72SAndrew Lunn 
2408fc879f72SAndrew Lunn 	if (!(ret & MII_VCT7_CTRL_IN_PROGRESS)) {
2409fc879f72SAndrew Lunn 		*finished = true;
2410fc879f72SAndrew Lunn 
2411fc879f72SAndrew Lunn 		return marvell_vct7_cable_test_report(phydev);
2412fc879f72SAndrew Lunn 	}
2413fc879f72SAndrew Lunn 
2414fc879f72SAndrew Lunn 	return 0;
2415fc879f72SAndrew Lunn }
2416fc879f72SAndrew Lunn 
24170b04680fSAndrew Lunn #ifdef CONFIG_HWMON
241841d26bf4SMarek Behún struct marvell_hwmon_ops {
2419a978f7c4SMarek Behún 	int (*config)(struct phy_device *phydev);
242041d26bf4SMarek Behún 	int (*get_temp)(struct phy_device *phydev, long *temp);
242141d26bf4SMarek Behún 	int (*get_temp_critical)(struct phy_device *phydev, long *temp);
242241d26bf4SMarek Behún 	int (*set_temp_critical)(struct phy_device *phydev, long temp);
242341d26bf4SMarek Behún 	int (*get_temp_alarm)(struct phy_device *phydev, long *alarm);
242441d26bf4SMarek Behún };
242541d26bf4SMarek Behún 
242641d26bf4SMarek Behún static const struct marvell_hwmon_ops *
to_marvell_hwmon_ops(const struct phy_device * phydev)242741d26bf4SMarek Behún to_marvell_hwmon_ops(const struct phy_device *phydev)
242841d26bf4SMarek Behún {
242941d26bf4SMarek Behún 	return phydev->drv->driver_data;
243041d26bf4SMarek Behún }
243141d26bf4SMarek Behún 
m88e1121_get_temp(struct phy_device * phydev,long * temp)24320b04680fSAndrew Lunn static int m88e1121_get_temp(struct phy_device *phydev, long *temp)
24330b04680fSAndrew Lunn {
2434975b388cSAndrew Lunn 	int oldpage;
2435424ca4c5SRussell King 	int ret = 0;
24360b04680fSAndrew Lunn 	int val;
24370b04680fSAndrew Lunn 
24380b04680fSAndrew Lunn 	*temp = 0;
24390b04680fSAndrew Lunn 
2440424ca4c5SRussell King 	oldpage = phy_select_page(phydev, MII_MARVELL_MISC_TEST_PAGE);
2441424ca4c5SRussell King 	if (oldpage < 0)
2442424ca4c5SRussell King 		goto error;
2443975b388cSAndrew Lunn 
24440b04680fSAndrew Lunn 	/* Enable temperature sensor */
2445424ca4c5SRussell King 	ret = __phy_read(phydev, MII_88E1121_MISC_TEST);
24460b04680fSAndrew Lunn 	if (ret < 0)
24470b04680fSAndrew Lunn 		goto error;
24480b04680fSAndrew Lunn 
2449424ca4c5SRussell King 	ret = __phy_write(phydev, MII_88E1121_MISC_TEST,
24500b04680fSAndrew Lunn 			  ret | MII_88E1121_MISC_TEST_TEMP_SENSOR_EN);
24510b04680fSAndrew Lunn 	if (ret < 0)
24520b04680fSAndrew Lunn 		goto error;
24530b04680fSAndrew Lunn 
24540b04680fSAndrew Lunn 	/* Wait for temperature to stabilize */
24550b04680fSAndrew Lunn 	usleep_range(10000, 12000);
24560b04680fSAndrew Lunn 
2457424ca4c5SRussell King 	val = __phy_read(phydev, MII_88E1121_MISC_TEST);
24580b04680fSAndrew Lunn 	if (val < 0) {
24590b04680fSAndrew Lunn 		ret = val;
24600b04680fSAndrew Lunn 		goto error;
24610b04680fSAndrew Lunn 	}
24620b04680fSAndrew Lunn 
24630b04680fSAndrew Lunn 	/* Disable temperature sensor */
2464424ca4c5SRussell King 	ret = __phy_write(phydev, MII_88E1121_MISC_TEST,
24650b04680fSAndrew Lunn 			  ret & ~MII_88E1121_MISC_TEST_TEMP_SENSOR_EN);
24660b04680fSAndrew Lunn 	if (ret < 0)
24670b04680fSAndrew Lunn 		goto error;
24680b04680fSAndrew Lunn 
24690b04680fSAndrew Lunn 	*temp = ((val & MII_88E1121_MISC_TEST_TEMP_MASK) - 5) * 5000;
24700b04680fSAndrew Lunn 
24710b04680fSAndrew Lunn error:
2472424ca4c5SRussell King 	return phy_restore_page(phydev, oldpage, ret);
24730b04680fSAndrew Lunn }
24740b04680fSAndrew Lunn 
m88e1510_get_temp(struct phy_device * phydev,long * temp)24750b04680fSAndrew Lunn static int m88e1510_get_temp(struct phy_device *phydev, long *temp)
24760b04680fSAndrew Lunn {
24770b04680fSAndrew Lunn 	int ret;
24780b04680fSAndrew Lunn 
24790b04680fSAndrew Lunn 	*temp = 0;
24800b04680fSAndrew Lunn 
2481424ca4c5SRussell King 	ret = phy_read_paged(phydev, MII_MARVELL_MISC_TEST_PAGE,
2482424ca4c5SRussell King 			     MII_88E1510_TEMP_SENSOR);
24830b04680fSAndrew Lunn 	if (ret < 0)
2484424ca4c5SRussell King 		return ret;
24850b04680fSAndrew Lunn 
24860b04680fSAndrew Lunn 	*temp = ((ret & MII_88E1510_TEMP_SENSOR_MASK) - 25) * 1000;
24870b04680fSAndrew Lunn 
2488424ca4c5SRussell King 	return 0;
24890b04680fSAndrew Lunn }
24900b04680fSAndrew Lunn 
m88e1510_get_temp_critical(struct phy_device * phydev,long * temp)2491f0a45816SColin Ian King static int m88e1510_get_temp_critical(struct phy_device *phydev, long *temp)
24920b04680fSAndrew Lunn {
24930b04680fSAndrew Lunn 	int ret;
24940b04680fSAndrew Lunn 
24950b04680fSAndrew Lunn 	*temp = 0;
24960b04680fSAndrew Lunn 
2497424ca4c5SRussell King 	ret = phy_read_paged(phydev, MII_MARVELL_MISC_TEST_PAGE,
2498424ca4c5SRussell King 			     MII_88E1121_MISC_TEST);
24990b04680fSAndrew Lunn 	if (ret < 0)
2500424ca4c5SRussell King 		return ret;
25010b04680fSAndrew Lunn 
25020b04680fSAndrew Lunn 	*temp = (((ret & MII_88E1510_MISC_TEST_TEMP_THRESHOLD_MASK) >>
25030b04680fSAndrew Lunn 		  MII_88E1510_MISC_TEST_TEMP_THRESHOLD_SHIFT) * 5) - 25;
25040b04680fSAndrew Lunn 	/* convert to mC */
25050b04680fSAndrew Lunn 	*temp *= 1000;
25060b04680fSAndrew Lunn 
2507424ca4c5SRussell King 	return 0;
25080b04680fSAndrew Lunn }
25090b04680fSAndrew Lunn 
m88e1510_set_temp_critical(struct phy_device * phydev,long temp)2510f0a45816SColin Ian King static int m88e1510_set_temp_critical(struct phy_device *phydev, long temp)
25110b04680fSAndrew Lunn {
25120b04680fSAndrew Lunn 	temp = temp / 1000;
25130b04680fSAndrew Lunn 	temp = clamp_val(DIV_ROUND_CLOSEST(temp, 5) + 5, 0, 0x1f);
25140b04680fSAndrew Lunn 
2515424ca4c5SRussell King 	return phy_modify_paged(phydev, MII_MARVELL_MISC_TEST_PAGE,
2516424ca4c5SRussell King 				MII_88E1121_MISC_TEST,
2517424ca4c5SRussell King 				MII_88E1510_MISC_TEST_TEMP_THRESHOLD_MASK,
2518424ca4c5SRussell King 				temp << MII_88E1510_MISC_TEST_TEMP_THRESHOLD_SHIFT);
25190b04680fSAndrew Lunn }
25200b04680fSAndrew Lunn 
m88e1510_get_temp_alarm(struct phy_device * phydev,long * alarm)2521f0a45816SColin Ian King static int m88e1510_get_temp_alarm(struct phy_device *phydev, long *alarm)
25220b04680fSAndrew Lunn {
25230b04680fSAndrew Lunn 	int ret;
25240b04680fSAndrew Lunn 
25250b04680fSAndrew Lunn 	*alarm = false;
25260b04680fSAndrew Lunn 
2527424ca4c5SRussell King 	ret = phy_read_paged(phydev, MII_MARVELL_MISC_TEST_PAGE,
2528424ca4c5SRussell King 			     MII_88E1121_MISC_TEST);
25290b04680fSAndrew Lunn 	if (ret < 0)
2530424ca4c5SRussell King 		return ret;
2531424ca4c5SRussell King 
25320b04680fSAndrew Lunn 	*alarm = !!(ret & MII_88E1510_MISC_TEST_TEMP_IRQ);
25330b04680fSAndrew Lunn 
2534424ca4c5SRussell King 	return 0;
25350b04680fSAndrew Lunn }
25360b04680fSAndrew Lunn 
m88e6390_get_temp(struct phy_device * phydev,long * temp)2537fee2d546SAndrew Lunn static int m88e6390_get_temp(struct phy_device *phydev, long *temp)
2538fee2d546SAndrew Lunn {
2539fee2d546SAndrew Lunn 	int sum = 0;
2540fee2d546SAndrew Lunn 	int oldpage;
2541fee2d546SAndrew Lunn 	int ret = 0;
2542fee2d546SAndrew Lunn 	int i;
2543fee2d546SAndrew Lunn 
2544fee2d546SAndrew Lunn 	*temp = 0;
2545fee2d546SAndrew Lunn 
2546fee2d546SAndrew Lunn 	oldpage = phy_select_page(phydev, MII_MARVELL_MISC_TEST_PAGE);
2547fee2d546SAndrew Lunn 	if (oldpage < 0)
2548fee2d546SAndrew Lunn 		goto error;
2549fee2d546SAndrew Lunn 
2550fee2d546SAndrew Lunn 	/* Enable temperature sensor */
2551fee2d546SAndrew Lunn 	ret = __phy_read(phydev, MII_88E6390_MISC_TEST);
2552fee2d546SAndrew Lunn 	if (ret < 0)
2553fee2d546SAndrew Lunn 		goto error;
2554fee2d546SAndrew Lunn 
255500218173SMarek Behún 	ret &= ~MII_88E6390_MISC_TEST_TEMP_SENSOR_MASK;
25564f920c29SMarek Behún 	ret |= MII_88E6390_MISC_TEST_TEMP_SENSOR_ENABLE_SAMPLE_1S;
2557fee2d546SAndrew Lunn 
2558fee2d546SAndrew Lunn 	ret = __phy_write(phydev, MII_88E6390_MISC_TEST, ret);
2559fee2d546SAndrew Lunn 	if (ret < 0)
2560fee2d546SAndrew Lunn 		goto error;
2561fee2d546SAndrew Lunn 
2562fee2d546SAndrew Lunn 	/* Wait for temperature to stabilize */
2563fee2d546SAndrew Lunn 	usleep_range(10000, 12000);
2564fee2d546SAndrew Lunn 
2565fee2d546SAndrew Lunn 	/* Reading the temperature sense has an errata. You need to read
2566fee2d546SAndrew Lunn 	 * a number of times and take an average.
2567fee2d546SAndrew Lunn 	 */
2568fee2d546SAndrew Lunn 	for (i = 0; i < MII_88E6390_TEMP_SENSOR_SAMPLES; i++) {
2569fee2d546SAndrew Lunn 		ret = __phy_read(phydev, MII_88E6390_TEMP_SENSOR);
2570fee2d546SAndrew Lunn 		if (ret < 0)
2571fee2d546SAndrew Lunn 			goto error;
2572fee2d546SAndrew Lunn 		sum += ret & MII_88E6390_TEMP_SENSOR_MASK;
2573fee2d546SAndrew Lunn 	}
2574fee2d546SAndrew Lunn 
2575fee2d546SAndrew Lunn 	sum /= MII_88E6390_TEMP_SENSOR_SAMPLES;
2576fee2d546SAndrew Lunn 	*temp = (sum  - 75) * 1000;
2577fee2d546SAndrew Lunn 
2578fee2d546SAndrew Lunn 	/* Disable temperature sensor */
2579fee2d546SAndrew Lunn 	ret = __phy_read(phydev, MII_88E6390_MISC_TEST);
2580fee2d546SAndrew Lunn 	if (ret < 0)
2581fee2d546SAndrew Lunn 		goto error;
2582fee2d546SAndrew Lunn 
25834f920c29SMarek Behún 	ret = ret & ~MII_88E6390_MISC_TEST_TEMP_SENSOR_MASK;
25844f920c29SMarek Behún 	ret |= MII_88E6390_MISC_TEST_TEMP_SENSOR_DISABLE;
2585fee2d546SAndrew Lunn 
2586fee2d546SAndrew Lunn 	ret = __phy_write(phydev, MII_88E6390_MISC_TEST, ret);
2587fee2d546SAndrew Lunn 
2588fee2d546SAndrew Lunn error:
2589fee2d546SAndrew Lunn 	phy_restore_page(phydev, oldpage, ret);
2590fee2d546SAndrew Lunn 
2591fee2d546SAndrew Lunn 	return ret;
2592fee2d546SAndrew Lunn }
2593fee2d546SAndrew Lunn 
m88e6393_get_temp(struct phy_device * phydev,long * temp)2594a978f7c4SMarek Behún static int m88e6393_get_temp(struct phy_device *phydev, long *temp)
2595a978f7c4SMarek Behún {
2596a978f7c4SMarek Behún 	int err;
2597a978f7c4SMarek Behún 
2598a978f7c4SMarek Behún 	err = m88e1510_get_temp(phydev, temp);
2599a978f7c4SMarek Behún 
2600a978f7c4SMarek Behún 	/* 88E1510 measures T + 25, while the PHY on 88E6393X switch
2601a978f7c4SMarek Behún 	 * T + 75, so we have to subtract another 50
2602a978f7c4SMarek Behún 	 */
2603a978f7c4SMarek Behún 	*temp -= 50000;
2604a978f7c4SMarek Behún 
2605a978f7c4SMarek Behún 	return err;
2606a978f7c4SMarek Behún }
2607a978f7c4SMarek Behún 
m88e6393_get_temp_critical(struct phy_device * phydev,long * temp)2608a978f7c4SMarek Behún static int m88e6393_get_temp_critical(struct phy_device *phydev, long *temp)
2609a978f7c4SMarek Behún {
2610a978f7c4SMarek Behún 	int ret;
2611a978f7c4SMarek Behún 
2612a978f7c4SMarek Behún 	*temp = 0;
2613a978f7c4SMarek Behún 
2614a978f7c4SMarek Behún 	ret = phy_read_paged(phydev, MII_MARVELL_MISC_TEST_PAGE,
2615a978f7c4SMarek Behún 			     MII_88E6390_TEMP_SENSOR);
2616a978f7c4SMarek Behún 	if (ret < 0)
2617a978f7c4SMarek Behún 		return ret;
2618a978f7c4SMarek Behún 
2619a978f7c4SMarek Behún 	*temp = (((ret & MII_88E6393_TEMP_SENSOR_THRESHOLD_MASK) >>
2620a978f7c4SMarek Behún 		  MII_88E6393_TEMP_SENSOR_THRESHOLD_SHIFT) - 75) * 1000;
2621a978f7c4SMarek Behún 
2622a978f7c4SMarek Behún 	return 0;
2623a978f7c4SMarek Behún }
2624a978f7c4SMarek Behún 
m88e6393_set_temp_critical(struct phy_device * phydev,long temp)2625a978f7c4SMarek Behún static int m88e6393_set_temp_critical(struct phy_device *phydev, long temp)
2626a978f7c4SMarek Behún {
2627a978f7c4SMarek Behún 	temp = (temp / 1000) + 75;
2628a978f7c4SMarek Behún 
2629a978f7c4SMarek Behún 	return phy_modify_paged(phydev, MII_MARVELL_MISC_TEST_PAGE,
2630a978f7c4SMarek Behún 				MII_88E6390_TEMP_SENSOR,
2631a978f7c4SMarek Behún 				MII_88E6393_TEMP_SENSOR_THRESHOLD_MASK,
2632a978f7c4SMarek Behún 				temp << MII_88E6393_TEMP_SENSOR_THRESHOLD_SHIFT);
2633a978f7c4SMarek Behún }
2634a978f7c4SMarek Behún 
m88e6393_hwmon_config(struct phy_device * phydev)2635a978f7c4SMarek Behún static int m88e6393_hwmon_config(struct phy_device *phydev)
2636a978f7c4SMarek Behún {
2637a978f7c4SMarek Behún 	int err;
2638a978f7c4SMarek Behún 
2639a978f7c4SMarek Behún 	err = m88e6393_set_temp_critical(phydev, 100000);
2640a978f7c4SMarek Behún 	if (err)
2641a978f7c4SMarek Behún 		return err;
2642a978f7c4SMarek Behún 
2643a978f7c4SMarek Behún 	return phy_modify_paged(phydev, MII_MARVELL_MISC_TEST_PAGE,
2644a978f7c4SMarek Behún 				MII_88E6390_MISC_TEST,
2645a978f7c4SMarek Behún 				MII_88E6390_MISC_TEST_TEMP_SENSOR_MASK |
2646a978f7c4SMarek Behún 				MII_88E6393_MISC_TEST_SAMPLES_MASK |
2647a978f7c4SMarek Behún 				MII_88E6393_MISC_TEST_RATE_MASK,
2648a978f7c4SMarek Behún 				MII_88E6390_MISC_TEST_TEMP_SENSOR_ENABLE |
2649a978f7c4SMarek Behún 				MII_88E6393_MISC_TEST_SAMPLES_2048 |
2650a978f7c4SMarek Behún 				MII_88E6393_MISC_TEST_RATE_2_3MS);
2651a978f7c4SMarek Behún }
2652a978f7c4SMarek Behún 
marvell_hwmon_read(struct device * dev,enum hwmon_sensor_types type,u32 attr,int channel,long * temp)265341d26bf4SMarek Behún static int marvell_hwmon_read(struct device *dev, enum hwmon_sensor_types type,
2654fee2d546SAndrew Lunn 			      u32 attr, int channel, long *temp)
2655fee2d546SAndrew Lunn {
2656fee2d546SAndrew Lunn 	struct phy_device *phydev = dev_get_drvdata(dev);
265741d26bf4SMarek Behún 	const struct marvell_hwmon_ops *ops = to_marvell_hwmon_ops(phydev);
265841d26bf4SMarek Behún 	int err = -EOPNOTSUPP;
2659fee2d546SAndrew Lunn 
2660fee2d546SAndrew Lunn 	switch (attr) {
2661fee2d546SAndrew Lunn 	case hwmon_temp_input:
266241d26bf4SMarek Behún 		if (ops->get_temp)
266341d26bf4SMarek Behún 			err = ops->get_temp(phydev, temp);
2664fee2d546SAndrew Lunn 		break;
266541d26bf4SMarek Behún 	case hwmon_temp_crit:
266641d26bf4SMarek Behún 		if (ops->get_temp_critical)
266741d26bf4SMarek Behún 			err = ops->get_temp_critical(phydev, temp);
266841d26bf4SMarek Behún 		break;
266941d26bf4SMarek Behún 	case hwmon_temp_max_alarm:
267041d26bf4SMarek Behún 		if (ops->get_temp_alarm)
267141d26bf4SMarek Behún 			err = ops->get_temp_alarm(phydev, temp);
267241d26bf4SMarek Behún 		break;
2673fee2d546SAndrew Lunn 	}
2674fee2d546SAndrew Lunn 
2675fee2d546SAndrew Lunn 	return err;
2676fee2d546SAndrew Lunn }
2677fee2d546SAndrew Lunn 
marvell_hwmon_write(struct device * dev,enum hwmon_sensor_types type,u32 attr,int channel,long temp)267841d26bf4SMarek Behún static int marvell_hwmon_write(struct device *dev, enum hwmon_sensor_types type,
267941d26bf4SMarek Behún 			       u32 attr, int channel, long temp)
268041d26bf4SMarek Behún {
268141d26bf4SMarek Behún 	struct phy_device *phydev = dev_get_drvdata(dev);
268241d26bf4SMarek Behún 	const struct marvell_hwmon_ops *ops = to_marvell_hwmon_ops(phydev);
268341d26bf4SMarek Behún 	int err = -EOPNOTSUPP;
268441d26bf4SMarek Behún 
268541d26bf4SMarek Behún 	switch (attr) {
268641d26bf4SMarek Behún 	case hwmon_temp_crit:
268741d26bf4SMarek Behún 		if (ops->set_temp_critical)
268841d26bf4SMarek Behún 			err = ops->set_temp_critical(phydev, temp);
268941d26bf4SMarek Behún 		break;
269041d26bf4SMarek Behún 	}
269141d26bf4SMarek Behún 
269241d26bf4SMarek Behún 	return err;
269341d26bf4SMarek Behún }
269441d26bf4SMarek Behún 
marvell_hwmon_is_visible(const void * data,enum hwmon_sensor_types type,u32 attr,int channel)269541d26bf4SMarek Behún static umode_t marvell_hwmon_is_visible(const void *data,
2696fee2d546SAndrew Lunn 					enum hwmon_sensor_types type,
2697fee2d546SAndrew Lunn 					u32 attr, int channel)
2698fee2d546SAndrew Lunn {
269941d26bf4SMarek Behún 	const struct phy_device *phydev = data;
270041d26bf4SMarek Behún 	const struct marvell_hwmon_ops *ops = to_marvell_hwmon_ops(phydev);
270141d26bf4SMarek Behún 
2702fee2d546SAndrew Lunn 	if (type != hwmon_temp)
2703fee2d546SAndrew Lunn 		return 0;
2704fee2d546SAndrew Lunn 
2705fee2d546SAndrew Lunn 	switch (attr) {
2706fee2d546SAndrew Lunn 	case hwmon_temp_input:
270741d26bf4SMarek Behún 		return ops->get_temp ? 0444 : 0;
270841d26bf4SMarek Behún 	case hwmon_temp_max_alarm:
270941d26bf4SMarek Behún 		return ops->get_temp_alarm ? 0444 : 0;
271041d26bf4SMarek Behún 	case hwmon_temp_crit:
271141d26bf4SMarek Behún 		return (ops->get_temp_critical ? 0444 : 0) |
271241d26bf4SMarek Behún 		       (ops->set_temp_critical ? 0200 : 0);
2713fee2d546SAndrew Lunn 	default:
2714fee2d546SAndrew Lunn 		return 0;
2715fee2d546SAndrew Lunn 	}
2716fee2d546SAndrew Lunn }
2717fee2d546SAndrew Lunn 
271841d26bf4SMarek Behún static u32 marvell_hwmon_chip_config[] = {
271941d26bf4SMarek Behún 	HWMON_C_REGISTER_TZ,
2720fee2d546SAndrew Lunn 	0
2721fee2d546SAndrew Lunn };
2722fee2d546SAndrew Lunn 
272341d26bf4SMarek Behún static const struct hwmon_channel_info marvell_hwmon_chip = {
272441d26bf4SMarek Behún 	.type = hwmon_chip,
272541d26bf4SMarek Behún 	.config = marvell_hwmon_chip_config,
2726fee2d546SAndrew Lunn };
2727fee2d546SAndrew Lunn 
272841d26bf4SMarek Behún /* we can define HWMON_T_CRIT and HWMON_T_MAX_ALARM even though these are not
272941d26bf4SMarek Behún  * defined for all PHYs, because the hwmon code checks whether the attributes
273041d26bf4SMarek Behún  * exists via the .is_visible method
273141d26bf4SMarek Behún  */
273241d26bf4SMarek Behún static u32 marvell_hwmon_temp_config[] = {
273341d26bf4SMarek Behún 	HWMON_T_INPUT | HWMON_T_CRIT | HWMON_T_MAX_ALARM,
273441d26bf4SMarek Behún 	0
273541d26bf4SMarek Behún };
273641d26bf4SMarek Behún 
273741d26bf4SMarek Behún static const struct hwmon_channel_info marvell_hwmon_temp = {
273841d26bf4SMarek Behún 	.type = hwmon_temp,
273941d26bf4SMarek Behún 	.config = marvell_hwmon_temp_config,
274041d26bf4SMarek Behún };
274141d26bf4SMarek Behún 
2742ff0805e2SKrzysztof Kozlowski static const struct hwmon_channel_info * const marvell_hwmon_info[] = {
274341d26bf4SMarek Behún 	&marvell_hwmon_chip,
274441d26bf4SMarek Behún 	&marvell_hwmon_temp,
2745fee2d546SAndrew Lunn 	NULL
2746fee2d546SAndrew Lunn };
2747fee2d546SAndrew Lunn 
274841d26bf4SMarek Behún static const struct hwmon_ops marvell_hwmon_hwmon_ops = {
274941d26bf4SMarek Behún 	.is_visible = marvell_hwmon_is_visible,
275041d26bf4SMarek Behún 	.read = marvell_hwmon_read,
275141d26bf4SMarek Behún 	.write = marvell_hwmon_write,
2752fee2d546SAndrew Lunn };
2753fee2d546SAndrew Lunn 
275441d26bf4SMarek Behún static const struct hwmon_chip_info marvell_hwmon_chip_info = {
275541d26bf4SMarek Behún 	.ops = &marvell_hwmon_hwmon_ops,
275641d26bf4SMarek Behún 	.info = marvell_hwmon_info,
2757fee2d546SAndrew Lunn };
2758fee2d546SAndrew Lunn 
marvell_hwmon_name(struct phy_device * phydev)27590b04680fSAndrew Lunn static int marvell_hwmon_name(struct phy_device *phydev)
27600b04680fSAndrew Lunn {
27610b04680fSAndrew Lunn 	struct marvell_priv *priv = phydev->priv;
27620b04680fSAndrew Lunn 	struct device *dev = &phydev->mdio.dev;
27630b04680fSAndrew Lunn 	const char *devname = dev_name(dev);
27640b04680fSAndrew Lunn 	size_t len = strlen(devname);
27650b04680fSAndrew Lunn 	int i, j;
27660b04680fSAndrew Lunn 
27670b04680fSAndrew Lunn 	priv->hwmon_name = devm_kzalloc(dev, len, GFP_KERNEL);
27680b04680fSAndrew Lunn 	if (!priv->hwmon_name)
27690b04680fSAndrew Lunn 		return -ENOMEM;
27700b04680fSAndrew Lunn 
27710b04680fSAndrew Lunn 	for (i = j = 0; i < len && devname[i]; i++) {
27720b04680fSAndrew Lunn 		if (isalnum(devname[i]))
27730b04680fSAndrew Lunn 			priv->hwmon_name[j++] = devname[i];
27740b04680fSAndrew Lunn 	}
27750b04680fSAndrew Lunn 
27760b04680fSAndrew Lunn 	return 0;
27770b04680fSAndrew Lunn }
27780b04680fSAndrew Lunn 
marvell_hwmon_probe(struct phy_device * phydev)277941d26bf4SMarek Behún static int marvell_hwmon_probe(struct phy_device *phydev)
27800b04680fSAndrew Lunn {
278141d26bf4SMarek Behún 	const struct marvell_hwmon_ops *ops = to_marvell_hwmon_ops(phydev);
27820b04680fSAndrew Lunn 	struct marvell_priv *priv = phydev->priv;
27830b04680fSAndrew Lunn 	struct device *dev = &phydev->mdio.dev;
27840b04680fSAndrew Lunn 	int err;
27850b04680fSAndrew Lunn 
278641d26bf4SMarek Behún 	if (!ops)
278741d26bf4SMarek Behún 		return 0;
278841d26bf4SMarek Behún 
27890b04680fSAndrew Lunn 	err = marvell_hwmon_name(phydev);
27900b04680fSAndrew Lunn 	if (err)
27910b04680fSAndrew Lunn 		return err;
27920b04680fSAndrew Lunn 
27930b04680fSAndrew Lunn 	priv->hwmon_dev = devm_hwmon_device_register_with_info(
279441d26bf4SMarek Behún 		dev, priv->hwmon_name, phydev, &marvell_hwmon_chip_info, NULL);
2795a978f7c4SMarek Behún 	if (IS_ERR(priv->hwmon_dev))
2796a978f7c4SMarek Behún 		return PTR_ERR(priv->hwmon_dev);
27970b04680fSAndrew Lunn 
2798a978f7c4SMarek Behún 	if (ops->config)
2799a978f7c4SMarek Behún 		err = ops->config(phydev);
2800a978f7c4SMarek Behún 
2801a978f7c4SMarek Behún 	return err;
28020b04680fSAndrew Lunn }
28030b04680fSAndrew Lunn 
280441d26bf4SMarek Behún static const struct marvell_hwmon_ops m88e1121_hwmon_ops = {
280541d26bf4SMarek Behún 	.get_temp = m88e1121_get_temp,
280641d26bf4SMarek Behún };
28070b04680fSAndrew Lunn 
280841d26bf4SMarek Behún static const struct marvell_hwmon_ops m88e1510_hwmon_ops = {
280941d26bf4SMarek Behún 	.get_temp = m88e1510_get_temp,
281041d26bf4SMarek Behún 	.get_temp_critical = m88e1510_get_temp_critical,
281141d26bf4SMarek Behún 	.set_temp_critical = m88e1510_set_temp_critical,
281241d26bf4SMarek Behún 	.get_temp_alarm = m88e1510_get_temp_alarm,
281341d26bf4SMarek Behún };
2814fee2d546SAndrew Lunn 
281541d26bf4SMarek Behún static const struct marvell_hwmon_ops m88e6390_hwmon_ops = {
281641d26bf4SMarek Behún 	.get_temp = m88e6390_get_temp,
281741d26bf4SMarek Behún };
281841d26bf4SMarek Behún 
2819a978f7c4SMarek Behún static const struct marvell_hwmon_ops m88e6393_hwmon_ops = {
2820a978f7c4SMarek Behún 	.config = m88e6393_hwmon_config,
2821a978f7c4SMarek Behún 	.get_temp = m88e6393_get_temp,
2822a978f7c4SMarek Behún 	.get_temp_critical = m88e6393_get_temp_critical,
2823a978f7c4SMarek Behún 	.set_temp_critical = m88e6393_set_temp_critical,
2824a978f7c4SMarek Behún 	.get_temp_alarm = m88e1510_get_temp_alarm,
2825a978f7c4SMarek Behún };
2826a978f7c4SMarek Behún 
282741d26bf4SMarek Behún #define DEF_MARVELL_HWMON_OPS(s) (&(s))
282841d26bf4SMarek Behún 
28290b04680fSAndrew Lunn #else
28300b04680fSAndrew Lunn 
283141d26bf4SMarek Behún #define DEF_MARVELL_HWMON_OPS(s) NULL
2832fee2d546SAndrew Lunn 
marvell_hwmon_probe(struct phy_device * phydev)283341d26bf4SMarek Behún static int marvell_hwmon_probe(struct phy_device *phydev)
2834fee2d546SAndrew Lunn {
2835fee2d546SAndrew Lunn 	return 0;
2836fee2d546SAndrew Lunn }
28370b04680fSAndrew Lunn #endif
28380b04680fSAndrew Lunn 
m88e1318_led_brightness_set(struct phy_device * phydev,u8 index,enum led_brightness value)28392d3960e5SAndrew Lunn static int m88e1318_led_brightness_set(struct phy_device *phydev,
28402d3960e5SAndrew Lunn 				       u8 index, enum led_brightness value)
28412d3960e5SAndrew Lunn {
28422d3960e5SAndrew Lunn 	int reg;
28432d3960e5SAndrew Lunn 
28442d3960e5SAndrew Lunn 	reg = phy_read_paged(phydev, MII_MARVELL_LED_PAGE,
28452d3960e5SAndrew Lunn 			     MII_88E1318S_PHY_LED_FUNC);
28462d3960e5SAndrew Lunn 	if (reg < 0)
28472d3960e5SAndrew Lunn 		return reg;
28482d3960e5SAndrew Lunn 
28492d3960e5SAndrew Lunn 	switch (index) {
28502d3960e5SAndrew Lunn 	case 0:
28512d3960e5SAndrew Lunn 	case 1:
28522d3960e5SAndrew Lunn 	case 2:
28532d3960e5SAndrew Lunn 		reg &= ~(0xf << (4 * index));
28542d3960e5SAndrew Lunn 		if (value == LED_OFF)
28552d3960e5SAndrew Lunn 			reg |= MII_88E1318S_PHY_LED_FUNC_OFF << (4 * index);
28562d3960e5SAndrew Lunn 		else
28572d3960e5SAndrew Lunn 			reg |= MII_88E1318S_PHY_LED_FUNC_ON << (4 * index);
28582d3960e5SAndrew Lunn 		break;
28592d3960e5SAndrew Lunn 	default:
28602d3960e5SAndrew Lunn 		return -EINVAL;
28612d3960e5SAndrew Lunn 	}
28622d3960e5SAndrew Lunn 
28632d3960e5SAndrew Lunn 	return phy_write_paged(phydev, MII_MARVELL_LED_PAGE,
28642d3960e5SAndrew Lunn 			       MII_88E1318S_PHY_LED_FUNC, reg);
28652d3960e5SAndrew Lunn }
28662d3960e5SAndrew Lunn 
m88e1318_led_blink_set(struct phy_device * phydev,u8 index,unsigned long * delay_on,unsigned long * delay_off)2867ea9e8648SAndrew Lunn static int m88e1318_led_blink_set(struct phy_device *phydev, u8 index,
2868ea9e8648SAndrew Lunn 				  unsigned long *delay_on,
2869ea9e8648SAndrew Lunn 				  unsigned long *delay_off)
2870ea9e8648SAndrew Lunn {
2871ea9e8648SAndrew Lunn 	int reg;
2872ea9e8648SAndrew Lunn 
2873ea9e8648SAndrew Lunn 	reg = phy_read_paged(phydev, MII_MARVELL_LED_PAGE,
2874ea9e8648SAndrew Lunn 			     MII_88E1318S_PHY_LED_FUNC);
2875ea9e8648SAndrew Lunn 	if (reg < 0)
2876ea9e8648SAndrew Lunn 		return reg;
2877ea9e8648SAndrew Lunn 
2878ea9e8648SAndrew Lunn 	switch (index) {
2879ea9e8648SAndrew Lunn 	case 0:
2880ea9e8648SAndrew Lunn 	case 1:
2881ea9e8648SAndrew Lunn 	case 2:
2882ea9e8648SAndrew Lunn 		reg &= ~(0xf << (4 * index));
2883ea9e8648SAndrew Lunn 		reg |= MII_88E1318S_PHY_LED_FUNC_BLINK << (4 * index);
2884ea9e8648SAndrew Lunn 		/* Reset default is 84ms */
2885ea9e8648SAndrew Lunn 		*delay_on = 84 / 2;
2886ea9e8648SAndrew Lunn 		*delay_off = 84 / 2;
2887ea9e8648SAndrew Lunn 		break;
2888ea9e8648SAndrew Lunn 	default:
2889ea9e8648SAndrew Lunn 		return -EINVAL;
2890ea9e8648SAndrew Lunn 	}
2891ea9e8648SAndrew Lunn 
2892ea9e8648SAndrew Lunn 	return phy_write_paged(phydev, MII_MARVELL_LED_PAGE,
2893ea9e8648SAndrew Lunn 			       MII_88E1318S_PHY_LED_FUNC, reg);
2894ea9e8648SAndrew Lunn }
2895ea9e8648SAndrew Lunn 
2896*460b0b64SAndrew Lunn struct marvell_led_rules {
2897*460b0b64SAndrew Lunn 	int mode;
2898*460b0b64SAndrew Lunn 	unsigned long rules;
2899*460b0b64SAndrew Lunn };
2900*460b0b64SAndrew Lunn 
2901*460b0b64SAndrew Lunn static const struct marvell_led_rules marvell_led0[] = {
2902*460b0b64SAndrew Lunn 	{
2903*460b0b64SAndrew Lunn 		.mode = 0,
2904*460b0b64SAndrew Lunn 		.rules = BIT(TRIGGER_NETDEV_LINK),
2905*460b0b64SAndrew Lunn 	},
2906*460b0b64SAndrew Lunn 	{
2907*460b0b64SAndrew Lunn 		.mode = 1,
2908*460b0b64SAndrew Lunn 		.rules = (BIT(TRIGGER_NETDEV_LINK) |
2909*460b0b64SAndrew Lunn 			  BIT(TRIGGER_NETDEV_RX) |
2910*460b0b64SAndrew Lunn 			  BIT(TRIGGER_NETDEV_TX)),
2911*460b0b64SAndrew Lunn 	},
2912*460b0b64SAndrew Lunn 	{
2913*460b0b64SAndrew Lunn 		.mode = 3,
2914*460b0b64SAndrew Lunn 		.rules = (BIT(TRIGGER_NETDEV_RX) |
2915*460b0b64SAndrew Lunn 			  BIT(TRIGGER_NETDEV_TX)),
2916*460b0b64SAndrew Lunn 	},
2917*460b0b64SAndrew Lunn 	{
2918*460b0b64SAndrew Lunn 		.mode = 4,
2919*460b0b64SAndrew Lunn 		.rules = (BIT(TRIGGER_NETDEV_RX) |
2920*460b0b64SAndrew Lunn 			  BIT(TRIGGER_NETDEV_TX)),
2921*460b0b64SAndrew Lunn 	},
2922*460b0b64SAndrew Lunn 	{
2923*460b0b64SAndrew Lunn 		.mode = 5,
2924*460b0b64SAndrew Lunn 		.rules = BIT(TRIGGER_NETDEV_TX),
2925*460b0b64SAndrew Lunn 	},
2926*460b0b64SAndrew Lunn 	{
2927*460b0b64SAndrew Lunn 		.mode = 6,
2928*460b0b64SAndrew Lunn 		.rules = BIT(TRIGGER_NETDEV_LINK),
2929*460b0b64SAndrew Lunn 	},
2930*460b0b64SAndrew Lunn 	{
2931*460b0b64SAndrew Lunn 		.mode = 7,
2932*460b0b64SAndrew Lunn 		.rules = BIT(TRIGGER_NETDEV_LINK_1000),
2933*460b0b64SAndrew Lunn 	},
2934*460b0b64SAndrew Lunn 	{
2935*460b0b64SAndrew Lunn 		.mode = 8,
2936*460b0b64SAndrew Lunn 		.rules = 0,
2937*460b0b64SAndrew Lunn 	},
2938*460b0b64SAndrew Lunn };
2939*460b0b64SAndrew Lunn 
2940*460b0b64SAndrew Lunn static const struct marvell_led_rules marvell_led1[] = {
2941*460b0b64SAndrew Lunn 	{
2942*460b0b64SAndrew Lunn 		.mode = 1,
2943*460b0b64SAndrew Lunn 		.rules = (BIT(TRIGGER_NETDEV_LINK) |
2944*460b0b64SAndrew Lunn 			  BIT(TRIGGER_NETDEV_RX) |
2945*460b0b64SAndrew Lunn 			  BIT(TRIGGER_NETDEV_TX)),
2946*460b0b64SAndrew Lunn 	},
2947*460b0b64SAndrew Lunn 	{
2948*460b0b64SAndrew Lunn 		.mode = 2,
2949*460b0b64SAndrew Lunn 		.rules = (BIT(TRIGGER_NETDEV_LINK) |
2950*460b0b64SAndrew Lunn 			  BIT(TRIGGER_NETDEV_RX)),
2951*460b0b64SAndrew Lunn 	},
2952*460b0b64SAndrew Lunn 	{
2953*460b0b64SAndrew Lunn 		.mode = 3,
2954*460b0b64SAndrew Lunn 		.rules = (BIT(TRIGGER_NETDEV_RX) |
2955*460b0b64SAndrew Lunn 			  BIT(TRIGGER_NETDEV_TX)),
2956*460b0b64SAndrew Lunn 	},
2957*460b0b64SAndrew Lunn 	{
2958*460b0b64SAndrew Lunn 		.mode = 4,
2959*460b0b64SAndrew Lunn 		.rules = (BIT(TRIGGER_NETDEV_RX) |
2960*460b0b64SAndrew Lunn 			  BIT(TRIGGER_NETDEV_TX)),
2961*460b0b64SAndrew Lunn 	},
2962*460b0b64SAndrew Lunn 	{
2963*460b0b64SAndrew Lunn 		.mode = 6,
2964*460b0b64SAndrew Lunn 		.rules = (BIT(TRIGGER_NETDEV_LINK_100) |
2965*460b0b64SAndrew Lunn 			  BIT(TRIGGER_NETDEV_LINK_1000)),
2966*460b0b64SAndrew Lunn 	},
2967*460b0b64SAndrew Lunn 	{
2968*460b0b64SAndrew Lunn 		.mode = 7,
2969*460b0b64SAndrew Lunn 		.rules = BIT(TRIGGER_NETDEV_LINK_100),
2970*460b0b64SAndrew Lunn 	},
2971*460b0b64SAndrew Lunn 	{
2972*460b0b64SAndrew Lunn 		.mode = 8,
2973*460b0b64SAndrew Lunn 		.rules = 0,
2974*460b0b64SAndrew Lunn 	},
2975*460b0b64SAndrew Lunn };
2976*460b0b64SAndrew Lunn 
2977*460b0b64SAndrew Lunn static const struct marvell_led_rules marvell_led2[] = {
2978*460b0b64SAndrew Lunn 	{
2979*460b0b64SAndrew Lunn 		.mode = 0,
2980*460b0b64SAndrew Lunn 		.rules = BIT(TRIGGER_NETDEV_LINK),
2981*460b0b64SAndrew Lunn 	},
2982*460b0b64SAndrew Lunn 	{
2983*460b0b64SAndrew Lunn 		.mode = 1,
2984*460b0b64SAndrew Lunn 		.rules = (BIT(TRIGGER_NETDEV_LINK) |
2985*460b0b64SAndrew Lunn 			  BIT(TRIGGER_NETDEV_RX) |
2986*460b0b64SAndrew Lunn 			  BIT(TRIGGER_NETDEV_TX)),
2987*460b0b64SAndrew Lunn 	},
2988*460b0b64SAndrew Lunn 	{
2989*460b0b64SAndrew Lunn 		.mode = 3,
2990*460b0b64SAndrew Lunn 		.rules = (BIT(TRIGGER_NETDEV_RX) |
2991*460b0b64SAndrew Lunn 			  BIT(TRIGGER_NETDEV_TX)),
2992*460b0b64SAndrew Lunn 	},
2993*460b0b64SAndrew Lunn 	{
2994*460b0b64SAndrew Lunn 		.mode = 4,
2995*460b0b64SAndrew Lunn 		.rules = (BIT(TRIGGER_NETDEV_RX) |
2996*460b0b64SAndrew Lunn 			  BIT(TRIGGER_NETDEV_TX)),
2997*460b0b64SAndrew Lunn 	},
2998*460b0b64SAndrew Lunn 	{
2999*460b0b64SAndrew Lunn 		.mode = 5,
3000*460b0b64SAndrew Lunn 		.rules = BIT(TRIGGER_NETDEV_TX),
3001*460b0b64SAndrew Lunn 	},
3002*460b0b64SAndrew Lunn 	{
3003*460b0b64SAndrew Lunn 		.mode = 6,
3004*460b0b64SAndrew Lunn 		.rules = (BIT(TRIGGER_NETDEV_LINK_10) |
3005*460b0b64SAndrew Lunn 			  BIT(TRIGGER_NETDEV_LINK_1000)),
3006*460b0b64SAndrew Lunn 	},
3007*460b0b64SAndrew Lunn 	{
3008*460b0b64SAndrew Lunn 		.mode = 7,
3009*460b0b64SAndrew Lunn 		.rules = BIT(TRIGGER_NETDEV_LINK_10),
3010*460b0b64SAndrew Lunn 	},
3011*460b0b64SAndrew Lunn 	{
3012*460b0b64SAndrew Lunn 		.mode = 8,
3013*460b0b64SAndrew Lunn 		.rules = 0,
3014*460b0b64SAndrew Lunn 	},
3015*460b0b64SAndrew Lunn };
3016*460b0b64SAndrew Lunn 
marvell_find_led_mode(unsigned long rules,const struct marvell_led_rules * marvell_rules,int count,int * mode)3017*460b0b64SAndrew Lunn static int marvell_find_led_mode(unsigned long rules,
3018*460b0b64SAndrew Lunn 				 const struct marvell_led_rules *marvell_rules,
3019*460b0b64SAndrew Lunn 				 int count,
3020*460b0b64SAndrew Lunn 				 int *mode)
3021*460b0b64SAndrew Lunn {
3022*460b0b64SAndrew Lunn 	int i;
3023*460b0b64SAndrew Lunn 
3024*460b0b64SAndrew Lunn 	for (i = 0; i < count; i++) {
3025*460b0b64SAndrew Lunn 		if (marvell_rules[i].rules == rules) {
3026*460b0b64SAndrew Lunn 			*mode = marvell_rules[i].mode;
3027*460b0b64SAndrew Lunn 			return 0;
3028*460b0b64SAndrew Lunn 		}
3029*460b0b64SAndrew Lunn 	}
3030*460b0b64SAndrew Lunn 	return -EOPNOTSUPP;
3031*460b0b64SAndrew Lunn }
3032*460b0b64SAndrew Lunn 
marvell_get_led_mode(u8 index,unsigned long rules,int * mode)3033*460b0b64SAndrew Lunn static int marvell_get_led_mode(u8 index, unsigned long rules, int *mode)
3034*460b0b64SAndrew Lunn {
3035*460b0b64SAndrew Lunn 	int ret;
3036*460b0b64SAndrew Lunn 
3037*460b0b64SAndrew Lunn 	switch (index) {
3038*460b0b64SAndrew Lunn 	case 0:
3039*460b0b64SAndrew Lunn 		ret = marvell_find_led_mode(rules, marvell_led0,
3040*460b0b64SAndrew Lunn 					    ARRAY_SIZE(marvell_led0), mode);
3041*460b0b64SAndrew Lunn 		break;
3042*460b0b64SAndrew Lunn 	case 1:
3043*460b0b64SAndrew Lunn 		ret = marvell_find_led_mode(rules, marvell_led1,
3044*460b0b64SAndrew Lunn 					    ARRAY_SIZE(marvell_led1), mode);
3045*460b0b64SAndrew Lunn 		break;
3046*460b0b64SAndrew Lunn 	case 2:
3047*460b0b64SAndrew Lunn 		ret = marvell_find_led_mode(rules, marvell_led2,
3048*460b0b64SAndrew Lunn 					    ARRAY_SIZE(marvell_led2), mode);
3049*460b0b64SAndrew Lunn 		break;
3050*460b0b64SAndrew Lunn 	default:
3051*460b0b64SAndrew Lunn 		ret = -EINVAL;
3052*460b0b64SAndrew Lunn 	}
3053*460b0b64SAndrew Lunn 
3054*460b0b64SAndrew Lunn 	return ret;
3055*460b0b64SAndrew Lunn }
3056*460b0b64SAndrew Lunn 
marvell_find_led_rules(unsigned long * rules,const struct marvell_led_rules * marvell_rules,int count,int mode)3057*460b0b64SAndrew Lunn static int marvell_find_led_rules(unsigned long *rules,
3058*460b0b64SAndrew Lunn 				  const struct marvell_led_rules *marvell_rules,
3059*460b0b64SAndrew Lunn 				  int count,
3060*460b0b64SAndrew Lunn 				  int mode)
3061*460b0b64SAndrew Lunn {
3062*460b0b64SAndrew Lunn 	int i;
3063*460b0b64SAndrew Lunn 
3064*460b0b64SAndrew Lunn 	for (i = 0; i < count; i++) {
3065*460b0b64SAndrew Lunn 		if (marvell_rules[i].mode == mode) {
3066*460b0b64SAndrew Lunn 			*rules = marvell_rules[i].rules;
3067*460b0b64SAndrew Lunn 			return 0;
3068*460b0b64SAndrew Lunn 		}
3069*460b0b64SAndrew Lunn 	}
3070*460b0b64SAndrew Lunn 	return -EOPNOTSUPP;
3071*460b0b64SAndrew Lunn }
3072*460b0b64SAndrew Lunn 
marvell_get_led_rules(u8 index,unsigned long * rules,int mode)3073*460b0b64SAndrew Lunn static int marvell_get_led_rules(u8 index, unsigned long *rules, int mode)
3074*460b0b64SAndrew Lunn {
3075*460b0b64SAndrew Lunn 	int ret;
3076*460b0b64SAndrew Lunn 
3077*460b0b64SAndrew Lunn 	switch (index) {
3078*460b0b64SAndrew Lunn 	case 0:
3079*460b0b64SAndrew Lunn 		ret = marvell_find_led_rules(rules, marvell_led0,
3080*460b0b64SAndrew Lunn 					     ARRAY_SIZE(marvell_led0), mode);
3081*460b0b64SAndrew Lunn 		break;
3082*460b0b64SAndrew Lunn 	case 1:
3083*460b0b64SAndrew Lunn 		ret = marvell_find_led_rules(rules, marvell_led1,
3084*460b0b64SAndrew Lunn 					     ARRAY_SIZE(marvell_led1), mode);
3085*460b0b64SAndrew Lunn 		break;
3086*460b0b64SAndrew Lunn 	case 2:
3087*460b0b64SAndrew Lunn 		ret = marvell_find_led_rules(rules, marvell_led2,
3088*460b0b64SAndrew Lunn 					     ARRAY_SIZE(marvell_led2), mode);
3089*460b0b64SAndrew Lunn 		break;
3090*460b0b64SAndrew Lunn 	default:
3091*460b0b64SAndrew Lunn 		ret = -EOPNOTSUPP;
3092*460b0b64SAndrew Lunn 	}
3093*460b0b64SAndrew Lunn 
3094*460b0b64SAndrew Lunn 	return ret;
3095*460b0b64SAndrew Lunn }
3096*460b0b64SAndrew Lunn 
m88e1318_led_hw_is_supported(struct phy_device * phydev,u8 index,unsigned long rules)3097*460b0b64SAndrew Lunn static int m88e1318_led_hw_is_supported(struct phy_device *phydev, u8 index,
3098*460b0b64SAndrew Lunn 					unsigned long rules)
3099*460b0b64SAndrew Lunn {
3100*460b0b64SAndrew Lunn 	int mode, ret;
3101*460b0b64SAndrew Lunn 
3102*460b0b64SAndrew Lunn 	switch (index) {
3103*460b0b64SAndrew Lunn 	case 0:
3104*460b0b64SAndrew Lunn 	case 1:
3105*460b0b64SAndrew Lunn 	case 2:
3106*460b0b64SAndrew Lunn 		ret = marvell_get_led_mode(index, rules, &mode);
3107*460b0b64SAndrew Lunn 		break;
3108*460b0b64SAndrew Lunn 	default:
3109*460b0b64SAndrew Lunn 		ret = -EINVAL;
3110*460b0b64SAndrew Lunn 	}
3111*460b0b64SAndrew Lunn 
3112*460b0b64SAndrew Lunn 	return ret;
3113*460b0b64SAndrew Lunn }
3114*460b0b64SAndrew Lunn 
m88e1318_led_hw_control_set(struct phy_device * phydev,u8 index,unsigned long rules)3115*460b0b64SAndrew Lunn static int m88e1318_led_hw_control_set(struct phy_device *phydev, u8 index,
3116*460b0b64SAndrew Lunn 				       unsigned long rules)
3117*460b0b64SAndrew Lunn {
3118*460b0b64SAndrew Lunn 	int mode, ret, reg;
3119*460b0b64SAndrew Lunn 
3120*460b0b64SAndrew Lunn 	switch (index) {
3121*460b0b64SAndrew Lunn 	case 0:
3122*460b0b64SAndrew Lunn 	case 1:
3123*460b0b64SAndrew Lunn 	case 2:
3124*460b0b64SAndrew Lunn 		ret = marvell_get_led_mode(index, rules, &mode);
3125*460b0b64SAndrew Lunn 		break;
3126*460b0b64SAndrew Lunn 	default:
3127*460b0b64SAndrew Lunn 		ret = -EINVAL;
3128*460b0b64SAndrew Lunn 	}
3129*460b0b64SAndrew Lunn 
3130*460b0b64SAndrew Lunn 	if (ret < 0)
3131*460b0b64SAndrew Lunn 		return ret;
3132*460b0b64SAndrew Lunn 
3133*460b0b64SAndrew Lunn 	reg = phy_read_paged(phydev, MII_MARVELL_LED_PAGE,
3134*460b0b64SAndrew Lunn 			     MII_88E1318S_PHY_LED_FUNC);
3135*460b0b64SAndrew Lunn 	if (reg < 0)
3136*460b0b64SAndrew Lunn 		return reg;
3137*460b0b64SAndrew Lunn 
3138*460b0b64SAndrew Lunn 	reg &= ~(0xf << (4 * index));
3139*460b0b64SAndrew Lunn 	reg |= mode << (4 * index);
3140*460b0b64SAndrew Lunn 	return phy_write_paged(phydev, MII_MARVELL_LED_PAGE,
3141*460b0b64SAndrew Lunn 			       MII_88E1318S_PHY_LED_FUNC, reg);
3142*460b0b64SAndrew Lunn }
3143*460b0b64SAndrew Lunn 
m88e1318_led_hw_control_get(struct phy_device * phydev,u8 index,unsigned long * rules)3144*460b0b64SAndrew Lunn static int m88e1318_led_hw_control_get(struct phy_device *phydev, u8 index,
3145*460b0b64SAndrew Lunn 				       unsigned long *rules)
3146*460b0b64SAndrew Lunn {
3147*460b0b64SAndrew Lunn 	int mode, reg;
3148*460b0b64SAndrew Lunn 
3149*460b0b64SAndrew Lunn 	if (index > 2)
3150*460b0b64SAndrew Lunn 		return -EINVAL;
3151*460b0b64SAndrew Lunn 
3152*460b0b64SAndrew Lunn 	reg = phy_read_paged(phydev, MII_MARVELL_LED_PAGE,
3153*460b0b64SAndrew Lunn 			     MII_88E1318S_PHY_LED_FUNC);
3154*460b0b64SAndrew Lunn 	if (reg < 0)
3155*460b0b64SAndrew Lunn 		return reg;
3156*460b0b64SAndrew Lunn 
3157*460b0b64SAndrew Lunn 	mode = (reg >> (4 * index)) & 0xf;
3158*460b0b64SAndrew Lunn 
3159*460b0b64SAndrew Lunn 	return marvell_get_led_rules(index, rules, mode);
3160*460b0b64SAndrew Lunn }
3161*460b0b64SAndrew Lunn 
marvell_probe(struct phy_device * phydev)3162d2fa47d9SAndrew Lunn static int marvell_probe(struct phy_device *phydev)
3163d2fa47d9SAndrew Lunn {
3164d2fa47d9SAndrew Lunn 	struct marvell_priv *priv;
3165d2fa47d9SAndrew Lunn 
3166e5a03bfdSAndrew Lunn 	priv = devm_kzalloc(&phydev->mdio.dev, sizeof(*priv), GFP_KERNEL);
3167d2fa47d9SAndrew Lunn 	if (!priv)
3168d2fa47d9SAndrew Lunn 		return -ENOMEM;
3169d2fa47d9SAndrew Lunn 
3170d2fa47d9SAndrew Lunn 	phydev->priv = priv;
3171d2fa47d9SAndrew Lunn 
317241d26bf4SMarek Behún 	return marvell_hwmon_probe(phydev);
3173fee2d546SAndrew Lunn }
3174fee2d546SAndrew Lunn 
m88e1510_sfp_insert(void * upstream,const struct sfp_eeprom_id * id)3175b697d9d3SIvan Bornyakov static int m88e1510_sfp_insert(void *upstream, const struct sfp_eeprom_id *id)
3176b697d9d3SIvan Bornyakov {
3177fd580c98SRussell King 	DECLARE_PHY_INTERFACE_MASK(interfaces);
3178b697d9d3SIvan Bornyakov 	struct phy_device *phydev = upstream;
3179b697d9d3SIvan Bornyakov 	phy_interface_t interface;
3180b697d9d3SIvan Bornyakov 	struct device *dev;
3181b697d9d3SIvan Bornyakov 	int oldpage;
3182b697d9d3SIvan Bornyakov 	int ret = 0;
3183b697d9d3SIvan Bornyakov 	u16 mode;
3184b697d9d3SIvan Bornyakov 
3185b697d9d3SIvan Bornyakov 	__ETHTOOL_DECLARE_LINK_MODE_MASK(supported) = { 0, };
3186b697d9d3SIvan Bornyakov 
3187b697d9d3SIvan Bornyakov 	dev = &phydev->mdio.dev;
3188b697d9d3SIvan Bornyakov 
3189fd580c98SRussell King 	sfp_parse_support(phydev->sfp_bus, id, supported, interfaces);
3190b697d9d3SIvan Bornyakov 	interface = sfp_select_interface(phydev->sfp_bus, supported);
3191b697d9d3SIvan Bornyakov 
3192b697d9d3SIvan Bornyakov 	dev_info(dev, "%s SFP module inserted\n", phy_modes(interface));
3193b697d9d3SIvan Bornyakov 
3194b697d9d3SIvan Bornyakov 	switch (interface) {
3195b697d9d3SIvan Bornyakov 	case PHY_INTERFACE_MODE_1000BASEX:
3196b697d9d3SIvan Bornyakov 		mode = MII_88E1510_GEN_CTRL_REG_1_MODE_RGMII_1000X;
3197b697d9d3SIvan Bornyakov 
3198b697d9d3SIvan Bornyakov 		break;
3199b697d9d3SIvan Bornyakov 	case PHY_INTERFACE_MODE_100BASEX:
3200b697d9d3SIvan Bornyakov 		mode = MII_88E1510_GEN_CTRL_REG_1_MODE_RGMII_100FX;
3201b697d9d3SIvan Bornyakov 
3202b697d9d3SIvan Bornyakov 		break;
3203b697d9d3SIvan Bornyakov 	case PHY_INTERFACE_MODE_SGMII:
3204b697d9d3SIvan Bornyakov 		mode = MII_88E1510_GEN_CTRL_REG_1_MODE_RGMII_SGMII;
3205b697d9d3SIvan Bornyakov 
3206b697d9d3SIvan Bornyakov 		break;
3207b697d9d3SIvan Bornyakov 	default:
3208b697d9d3SIvan Bornyakov 		dev_err(dev, "Incompatible SFP module inserted\n");
3209b697d9d3SIvan Bornyakov 
3210b697d9d3SIvan Bornyakov 		return -EINVAL;
3211b697d9d3SIvan Bornyakov 	}
3212b697d9d3SIvan Bornyakov 
3213b697d9d3SIvan Bornyakov 	oldpage = phy_select_page(phydev, MII_MARVELL_MODE_PAGE);
3214b697d9d3SIvan Bornyakov 	if (oldpage < 0)
3215b697d9d3SIvan Bornyakov 		goto error;
3216b697d9d3SIvan Bornyakov 
3217b697d9d3SIvan Bornyakov 	ret = __phy_modify(phydev, MII_88E1510_GEN_CTRL_REG_1,
3218b697d9d3SIvan Bornyakov 			   MII_88E1510_GEN_CTRL_REG_1_MODE_MASK, mode);
3219b697d9d3SIvan Bornyakov 	if (ret < 0)
3220b697d9d3SIvan Bornyakov 		goto error;
3221b697d9d3SIvan Bornyakov 
3222b697d9d3SIvan Bornyakov 	ret = __phy_set_bits(phydev, MII_88E1510_GEN_CTRL_REG_1,
3223b697d9d3SIvan Bornyakov 			     MII_88E1510_GEN_CTRL_REG_1_RESET);
3224b697d9d3SIvan Bornyakov 
3225b697d9d3SIvan Bornyakov error:
3226b697d9d3SIvan Bornyakov 	return phy_restore_page(phydev, oldpage, ret);
3227b697d9d3SIvan Bornyakov }
3228b697d9d3SIvan Bornyakov 
m88e1510_sfp_remove(void * upstream)3229b697d9d3SIvan Bornyakov static void m88e1510_sfp_remove(void *upstream)
3230b697d9d3SIvan Bornyakov {
3231b697d9d3SIvan Bornyakov 	struct phy_device *phydev = upstream;
3232b697d9d3SIvan Bornyakov 	int oldpage;
3233b697d9d3SIvan Bornyakov 	int ret = 0;
3234b697d9d3SIvan Bornyakov 
3235b697d9d3SIvan Bornyakov 	oldpage = phy_select_page(phydev, MII_MARVELL_MODE_PAGE);
3236b697d9d3SIvan Bornyakov 	if (oldpage < 0)
3237b697d9d3SIvan Bornyakov 		goto error;
3238b697d9d3SIvan Bornyakov 
3239b697d9d3SIvan Bornyakov 	ret = __phy_modify(phydev, MII_88E1510_GEN_CTRL_REG_1,
3240b697d9d3SIvan Bornyakov 			   MII_88E1510_GEN_CTRL_REG_1_MODE_MASK,
3241b697d9d3SIvan Bornyakov 			   MII_88E1510_GEN_CTRL_REG_1_MODE_RGMII);
3242b697d9d3SIvan Bornyakov 	if (ret < 0)
3243b697d9d3SIvan Bornyakov 		goto error;
3244b697d9d3SIvan Bornyakov 
3245b697d9d3SIvan Bornyakov 	ret = __phy_set_bits(phydev, MII_88E1510_GEN_CTRL_REG_1,
3246b697d9d3SIvan Bornyakov 			     MII_88E1510_GEN_CTRL_REG_1_RESET);
3247b697d9d3SIvan Bornyakov 
3248b697d9d3SIvan Bornyakov error:
3249b697d9d3SIvan Bornyakov 	phy_restore_page(phydev, oldpage, ret);
3250b697d9d3SIvan Bornyakov }
3251b697d9d3SIvan Bornyakov 
3252b697d9d3SIvan Bornyakov static const struct sfp_upstream_ops m88e1510_sfp_ops = {
3253b697d9d3SIvan Bornyakov 	.module_insert = m88e1510_sfp_insert,
3254b697d9d3SIvan Bornyakov 	.module_remove = m88e1510_sfp_remove,
3255b697d9d3SIvan Bornyakov 	.attach = phy_sfp_attach,
3256b697d9d3SIvan Bornyakov 	.detach = phy_sfp_detach,
3257b697d9d3SIvan Bornyakov };
3258b697d9d3SIvan Bornyakov 
m88e1510_probe(struct phy_device * phydev)3259b697d9d3SIvan Bornyakov static int m88e1510_probe(struct phy_device *phydev)
3260b697d9d3SIvan Bornyakov {
3261b697d9d3SIvan Bornyakov 	int err;
3262b697d9d3SIvan Bornyakov 
3263b697d9d3SIvan Bornyakov 	err = marvell_probe(phydev);
3264b697d9d3SIvan Bornyakov 	if (err)
3265b697d9d3SIvan Bornyakov 		return err;
3266b697d9d3SIvan Bornyakov 
3267b697d9d3SIvan Bornyakov 	return phy_sfp_probe(phydev, &m88e1510_sfp_ops);
3268b697d9d3SIvan Bornyakov }
3269b697d9d3SIvan Bornyakov 
3270e5479239SOlof Johansson static struct phy_driver marvell_drivers[] = {
3271e5479239SOlof Johansson 	{
32722f495c39SBenjamin Herrenschmidt 		.phy_id = MARVELL_PHY_ID_88E1101,
32732f495c39SBenjamin Herrenschmidt 		.phy_id_mask = MARVELL_PHY_ID_MASK,
327400db8189SAndy Fleming 		.name = "Marvell 88E1101",
3275dcdecdcfSHeiner Kallweit 		/* PHY_GBIT_FEATURES */
327618702414SArnd Bergmann 		.probe = marvell_probe,
3277ef0f9545SMaxim Kochetkov 		.config_init = marvell_config_init,
3278ef0f9545SMaxim Kochetkov 		.config_aneg = m88e1101_config_aneg,
3279ef0f9545SMaxim Kochetkov 		.config_intr = marvell_config_intr,
3280a0723b37SIoana Ciornei 		.handle_interrupt = marvell_handle_interrupt,
3281ef0f9545SMaxim Kochetkov 		.resume = genphy_resume,
3282ef0f9545SMaxim Kochetkov 		.suspend = genphy_suspend,
3283424ca4c5SRussell King 		.read_page = marvell_read_page,
3284424ca4c5SRussell King 		.write_page = marvell_write_page,
3285d2fa47d9SAndrew Lunn 		.get_sset_count = marvell_get_sset_count,
3286d2fa47d9SAndrew Lunn 		.get_strings = marvell_get_strings,
3287d2fa47d9SAndrew Lunn 		.get_stats = marvell_get_stats,
3288e5479239SOlof Johansson 	},
3289e5479239SOlof Johansson 	{
32902f495c39SBenjamin Herrenschmidt 		.phy_id = MARVELL_PHY_ID_88E1112,
32912f495c39SBenjamin Herrenschmidt 		.phy_id_mask = MARVELL_PHY_ID_MASK,
329285cfb534SOlof Johansson 		.name = "Marvell 88E1112",
3293dcdecdcfSHeiner Kallweit 		/* PHY_GBIT_FEATURES */
3294d2fa47d9SAndrew Lunn 		.probe = marvell_probe,
32958385b1f0SMaxim Kochetkov 		.config_init = m88e1112_config_init,
3296ef0f9545SMaxim Kochetkov 		.config_aneg = marvell_config_aneg,
3297ef0f9545SMaxim Kochetkov 		.config_intr = marvell_config_intr,
3298a0723b37SIoana Ciornei 		.handle_interrupt = marvell_handle_interrupt,
3299ef0f9545SMaxim Kochetkov 		.resume = genphy_resume,
3300ef0f9545SMaxim Kochetkov 		.suspend = genphy_suspend,
3301424ca4c5SRussell King 		.read_page = marvell_read_page,
3302424ca4c5SRussell King 		.write_page = marvell_write_page,
3303d2fa47d9SAndrew Lunn 		.get_sset_count = marvell_get_sset_count,
3304d2fa47d9SAndrew Lunn 		.get_strings = marvell_get_strings,
3305d2fa47d9SAndrew Lunn 		.get_stats = marvell_get_stats,
3306262caf47SHeiner Kallweit 		.get_tunable = m88e1011_get_tunable,
3307262caf47SHeiner Kallweit 		.set_tunable = m88e1011_set_tunable,
330885cfb534SOlof Johansson 	},
330985cfb534SOlof Johansson 	{
33102f495c39SBenjamin Herrenschmidt 		.phy_id = MARVELL_PHY_ID_88E1111,
33112f495c39SBenjamin Herrenschmidt 		.phy_id_mask = MARVELL_PHY_ID_MASK,
331276884679SAndy Fleming 		.name = "Marvell 88E1111",
3313dcdecdcfSHeiner Kallweit 		/* PHY_GBIT_FEATURES */
3314d2fa47d9SAndrew Lunn 		.probe = marvell_probe,
33158385b1f0SMaxim Kochetkov 		.config_init = m88e1111gbe_config_init,
33161887023aSRobert Hancock 		.config_aneg = m88e1111_config_aneg,
33171887023aSRobert Hancock 		.read_status = marvell_read_status,
33181887023aSRobert Hancock 		.config_intr = marvell_config_intr,
3319a0723b37SIoana Ciornei 		.handle_interrupt = marvell_handle_interrupt,
33201887023aSRobert Hancock 		.resume = genphy_resume,
33211887023aSRobert Hancock 		.suspend = genphy_suspend,
33221887023aSRobert Hancock 		.read_page = marvell_read_page,
33231887023aSRobert Hancock 		.write_page = marvell_write_page,
33241887023aSRobert Hancock 		.get_sset_count = marvell_get_sset_count,
33251887023aSRobert Hancock 		.get_strings = marvell_get_strings,
33261887023aSRobert Hancock 		.get_stats = marvell_get_stats,
33271887023aSRobert Hancock 		.get_tunable = m88e1111_get_tunable,
33281887023aSRobert Hancock 		.set_tunable = m88e1111_set_tunable,
33291887023aSRobert Hancock 	},
33301887023aSRobert Hancock 	{
33311887023aSRobert Hancock 		.phy_id = MARVELL_PHY_ID_88E1111_FINISAR,
33321887023aSRobert Hancock 		.phy_id_mask = MARVELL_PHY_ID_MASK,
33331887023aSRobert Hancock 		.name = "Marvell 88E1111 (Finisar)",
33341887023aSRobert Hancock 		/* PHY_GBIT_FEATURES */
33351887023aSRobert Hancock 		.probe = marvell_probe,
33368385b1f0SMaxim Kochetkov 		.config_init = m88e1111gbe_config_init,
33371887023aSRobert Hancock 		.config_aneg = m88e1111_config_aneg,
3338ef0f9545SMaxim Kochetkov 		.read_status = marvell_read_status,
3339ef0f9545SMaxim Kochetkov 		.config_intr = marvell_config_intr,
3340a0723b37SIoana Ciornei 		.handle_interrupt = marvell_handle_interrupt,
3341ef0f9545SMaxim Kochetkov 		.resume = genphy_resume,
3342ef0f9545SMaxim Kochetkov 		.suspend = genphy_suspend,
3343424ca4c5SRussell King 		.read_page = marvell_read_page,
3344424ca4c5SRussell King 		.write_page = marvell_write_page,
3345d2fa47d9SAndrew Lunn 		.get_sset_count = marvell_get_sset_count,
3346d2fa47d9SAndrew Lunn 		.get_strings = marvell_get_strings,
3347d2fa47d9SAndrew Lunn 		.get_stats = marvell_get_stats,
33485c6bc519SHeiner Kallweit 		.get_tunable = m88e1111_get_tunable,
33495c6bc519SHeiner Kallweit 		.set_tunable = m88e1111_set_tunable,
3350e5479239SOlof Johansson 	},
3351e5479239SOlof Johansson 	{
33522f495c39SBenjamin Herrenschmidt 		.phy_id = MARVELL_PHY_ID_88E1118,
33532f495c39SBenjamin Herrenschmidt 		.phy_id_mask = MARVELL_PHY_ID_MASK,
3354605f196eSRon Madrid 		.name = "Marvell 88E1118",
3355dcdecdcfSHeiner Kallweit 		/* PHY_GBIT_FEATURES */
3356d2fa47d9SAndrew Lunn 		.probe = marvell_probe,
3357ef0f9545SMaxim Kochetkov 		.config_init = m88e1118_config_init,
3358ef0f9545SMaxim Kochetkov 		.config_aneg = m88e1118_config_aneg,
3359ef0f9545SMaxim Kochetkov 		.config_intr = marvell_config_intr,
3360a0723b37SIoana Ciornei 		.handle_interrupt = marvell_handle_interrupt,
3361ef0f9545SMaxim Kochetkov 		.resume = genphy_resume,
3362ef0f9545SMaxim Kochetkov 		.suspend = genphy_suspend,
3363424ca4c5SRussell King 		.read_page = marvell_read_page,
3364424ca4c5SRussell King 		.write_page = marvell_write_page,
3365d2fa47d9SAndrew Lunn 		.get_sset_count = marvell_get_sset_count,
3366d2fa47d9SAndrew Lunn 		.get_strings = marvell_get_strings,
3367d2fa47d9SAndrew Lunn 		.get_stats = marvell_get_stats,
3368605f196eSRon Madrid 	},
3369605f196eSRon Madrid 	{
33702f495c39SBenjamin Herrenschmidt 		.phy_id = MARVELL_PHY_ID_88E1121R,
33712f495c39SBenjamin Herrenschmidt 		.phy_id_mask = MARVELL_PHY_ID_MASK,
3372140bc929SSergei Poselenov 		.name = "Marvell 88E1121R",
337341d26bf4SMarek Behún 		.driver_data = DEF_MARVELL_HWMON_OPS(m88e1121_hwmon_ops),
3374dcdecdcfSHeiner Kallweit 		/* PHY_GBIT_FEATURES */
337541d26bf4SMarek Behún 		.probe = marvell_probe,
33768385b1f0SMaxim Kochetkov 		.config_init = marvell_1011gbe_config_init,
3377ef0f9545SMaxim Kochetkov 		.config_aneg = m88e1121_config_aneg,
3378ef0f9545SMaxim Kochetkov 		.read_status = marvell_read_status,
3379ef0f9545SMaxim Kochetkov 		.config_intr = marvell_config_intr,
3380a0723b37SIoana Ciornei 		.handle_interrupt = marvell_handle_interrupt,
3381ef0f9545SMaxim Kochetkov 		.resume = genphy_resume,
3382ef0f9545SMaxim Kochetkov 		.suspend = genphy_suspend,
3383424ca4c5SRussell King 		.read_page = marvell_read_page,
3384424ca4c5SRussell King 		.write_page = marvell_write_page,
3385d2fa47d9SAndrew Lunn 		.get_sset_count = marvell_get_sset_count,
3386d2fa47d9SAndrew Lunn 		.get_strings = marvell_get_strings,
3387d2fa47d9SAndrew Lunn 		.get_stats = marvell_get_stats,
3388911af5e1SHeiner Kallweit 		.get_tunable = m88e1011_get_tunable,
3389911af5e1SHeiner Kallweit 		.set_tunable = m88e1011_set_tunable,
3390140bc929SSergei Poselenov 	},
3391140bc929SSergei Poselenov 	{
3392337ac9d5SCyril Chemparathy 		.phy_id = MARVELL_PHY_ID_88E1318S,
33936ba74014SLinus Torvalds 		.phy_id_mask = MARVELL_PHY_ID_MASK,
3394337ac9d5SCyril Chemparathy 		.name = "Marvell 88E1318S",
3395dcdecdcfSHeiner Kallweit 		/* PHY_GBIT_FEATURES */
3396d2fa47d9SAndrew Lunn 		.probe = marvell_probe,
3397ef0f9545SMaxim Kochetkov 		.config_init = m88e1318_config_init,
3398ef0f9545SMaxim Kochetkov 		.config_aneg = m88e1318_config_aneg,
3399ef0f9545SMaxim Kochetkov 		.read_status = marvell_read_status,
3400ef0f9545SMaxim Kochetkov 		.config_intr = marvell_config_intr,
3401a0723b37SIoana Ciornei 		.handle_interrupt = marvell_handle_interrupt,
3402ef0f9545SMaxim Kochetkov 		.get_wol = m88e1318_get_wol,
3403ef0f9545SMaxim Kochetkov 		.set_wol = m88e1318_set_wol,
3404ef0f9545SMaxim Kochetkov 		.resume = genphy_resume,
3405ef0f9545SMaxim Kochetkov 		.suspend = genphy_suspend,
3406424ca4c5SRussell King 		.read_page = marvell_read_page,
3407424ca4c5SRussell King 		.write_page = marvell_write_page,
3408d2fa47d9SAndrew Lunn 		.get_sset_count = marvell_get_sset_count,
3409d2fa47d9SAndrew Lunn 		.get_strings = marvell_get_strings,
3410d2fa47d9SAndrew Lunn 		.get_stats = marvell_get_stats,
34112d3960e5SAndrew Lunn 		.led_brightness_set = m88e1318_led_brightness_set,
3412ea9e8648SAndrew Lunn 		.led_blink_set = m88e1318_led_blink_set,
3413*460b0b64SAndrew Lunn 		.led_hw_is_supported = m88e1318_led_hw_is_supported,
3414*460b0b64SAndrew Lunn 		.led_hw_control_set = m88e1318_led_hw_control_set,
3415*460b0b64SAndrew Lunn 		.led_hw_control_get = m88e1318_led_hw_control_get,
34163ff1c259SCyril Chemparathy 	},
34173ff1c259SCyril Chemparathy 	{
34182f495c39SBenjamin Herrenschmidt 		.phy_id = MARVELL_PHY_ID_88E1145,
34192f495c39SBenjamin Herrenschmidt 		.phy_id_mask = MARVELL_PHY_ID_MASK,
342076884679SAndy Fleming 		.name = "Marvell 88E1145",
3421dcdecdcfSHeiner Kallweit 		/* PHY_GBIT_FEATURES */
3422d2fa47d9SAndrew Lunn 		.probe = marvell_probe,
3423ef0f9545SMaxim Kochetkov 		.config_init = m88e1145_config_init,
3424ef0f9545SMaxim Kochetkov 		.config_aneg = m88e1101_config_aneg,
3425ef0f9545SMaxim Kochetkov 		.config_intr = marvell_config_intr,
3426a0723b37SIoana Ciornei 		.handle_interrupt = marvell_handle_interrupt,
3427ef0f9545SMaxim Kochetkov 		.resume = genphy_resume,
3428ef0f9545SMaxim Kochetkov 		.suspend = genphy_suspend,
3429424ca4c5SRussell King 		.read_page = marvell_read_page,
3430424ca4c5SRussell King 		.write_page = marvell_write_page,
3431d2fa47d9SAndrew Lunn 		.get_sset_count = marvell_get_sset_count,
3432d2fa47d9SAndrew Lunn 		.get_strings = marvell_get_strings,
3433d2fa47d9SAndrew Lunn 		.get_stats = marvell_get_stats,
3434a319fb52SHeiner Kallweit 		.get_tunable = m88e1111_get_tunable,
3435a319fb52SHeiner Kallweit 		.set_tunable = m88e1111_set_tunable,
3436ac8c635aSOlof Johansson 	},
3437ac8c635aSOlof Johansson 	{
343890600732SDavid Daney 		.phy_id = MARVELL_PHY_ID_88E1149R,
343990600732SDavid Daney 		.phy_id_mask = MARVELL_PHY_ID_MASK,
344090600732SDavid Daney 		.name = "Marvell 88E1149R",
3441dcdecdcfSHeiner Kallweit 		/* PHY_GBIT_FEATURES */
3442d2fa47d9SAndrew Lunn 		.probe = marvell_probe,
3443ef0f9545SMaxim Kochetkov 		.config_init = m88e1149_config_init,
3444ef0f9545SMaxim Kochetkov 		.config_aneg = m88e1118_config_aneg,
3445ef0f9545SMaxim Kochetkov 		.config_intr = marvell_config_intr,
3446a0723b37SIoana Ciornei 		.handle_interrupt = marvell_handle_interrupt,
3447ef0f9545SMaxim Kochetkov 		.resume = genphy_resume,
3448ef0f9545SMaxim Kochetkov 		.suspend = genphy_suspend,
3449424ca4c5SRussell King 		.read_page = marvell_read_page,
3450424ca4c5SRussell King 		.write_page = marvell_write_page,
3451d2fa47d9SAndrew Lunn 		.get_sset_count = marvell_get_sset_count,
3452d2fa47d9SAndrew Lunn 		.get_strings = marvell_get_strings,
3453d2fa47d9SAndrew Lunn 		.get_stats = marvell_get_stats,
345490600732SDavid Daney 	},
345590600732SDavid Daney 	{
34562f495c39SBenjamin Herrenschmidt 		.phy_id = MARVELL_PHY_ID_88E1240,
34572f495c39SBenjamin Herrenschmidt 		.phy_id_mask = MARVELL_PHY_ID_MASK,
3458ac8c635aSOlof Johansson 		.name = "Marvell 88E1240",
3459dcdecdcfSHeiner Kallweit 		/* PHY_GBIT_FEATURES */
3460d2fa47d9SAndrew Lunn 		.probe = marvell_probe,
34618385b1f0SMaxim Kochetkov 		.config_init = m88e1112_config_init,
3462ef0f9545SMaxim Kochetkov 		.config_aneg = marvell_config_aneg,
3463ef0f9545SMaxim Kochetkov 		.config_intr = marvell_config_intr,
3464a0723b37SIoana Ciornei 		.handle_interrupt = marvell_handle_interrupt,
3465ef0f9545SMaxim Kochetkov 		.resume = genphy_resume,
3466ef0f9545SMaxim Kochetkov 		.suspend = genphy_suspend,
3467424ca4c5SRussell King 		.read_page = marvell_read_page,
3468424ca4c5SRussell King 		.write_page = marvell_write_page,
3469d2fa47d9SAndrew Lunn 		.get_sset_count = marvell_get_sset_count,
3470d2fa47d9SAndrew Lunn 		.get_strings = marvell_get_strings,
3471d2fa47d9SAndrew Lunn 		.get_stats = marvell_get_stats,
347265ad85f6SMaxim Kochetkov 		.get_tunable = m88e1011_get_tunable,
347365ad85f6SMaxim Kochetkov 		.set_tunable = m88e1011_set_tunable,
3474ac8c635aSOlof Johansson 	},
34753da09a51SMichal Simek 	{
34763da09a51SMichal Simek 		.phy_id = MARVELL_PHY_ID_88E1116R,
34773da09a51SMichal Simek 		.phy_id_mask = MARVELL_PHY_ID_MASK,
34783da09a51SMichal Simek 		.name = "Marvell 88E1116R",
3479dcdecdcfSHeiner Kallweit 		/* PHY_GBIT_FEATURES */
3480d2fa47d9SAndrew Lunn 		.probe = marvell_probe,
3481ef0f9545SMaxim Kochetkov 		.config_init = m88e1116r_config_init,
3482ef0f9545SMaxim Kochetkov 		.config_intr = marvell_config_intr,
3483a0723b37SIoana Ciornei 		.handle_interrupt = marvell_handle_interrupt,
3484ef0f9545SMaxim Kochetkov 		.resume = genphy_resume,
3485ef0f9545SMaxim Kochetkov 		.suspend = genphy_suspend,
3486424ca4c5SRussell King 		.read_page = marvell_read_page,
3487424ca4c5SRussell King 		.write_page = marvell_write_page,
3488d2fa47d9SAndrew Lunn 		.get_sset_count = marvell_get_sset_count,
3489d2fa47d9SAndrew Lunn 		.get_strings = marvell_get_strings,
3490d2fa47d9SAndrew Lunn 		.get_stats = marvell_get_stats,
3491262caf47SHeiner Kallweit 		.get_tunable = m88e1011_get_tunable,
3492262caf47SHeiner Kallweit 		.set_tunable = m88e1011_set_tunable,
34933da09a51SMichal Simek 	},
349410e24caaSMichal Simek 	{
349510e24caaSMichal Simek 		.phy_id = MARVELL_PHY_ID_88E1510,
349610e24caaSMichal Simek 		.phy_id_mask = MARVELL_PHY_ID_MASK,
349710e24caaSMichal Simek 		.name = "Marvell 88E1510",
349841d26bf4SMarek Behún 		.driver_data = DEF_MARVELL_HWMON_OPS(m88e1510_hwmon_ops),
3499719655a1SAndrew Lunn 		.features = PHY_GBIT_FIBRE_FEATURES,
3500fc879f72SAndrew Lunn 		.flags = PHY_POLL_CABLE_TEST,
3501b697d9d3SIvan Bornyakov 		.probe = m88e1510_probe,
3502ef0f9545SMaxim Kochetkov 		.config_init = m88e1510_config_init,
3503ef0f9545SMaxim Kochetkov 		.config_aneg = m88e1510_config_aneg,
3504ef0f9545SMaxim Kochetkov 		.read_status = marvell_read_status,
3505ef0f9545SMaxim Kochetkov 		.config_intr = marvell_config_intr,
3506a0723b37SIoana Ciornei 		.handle_interrupt = marvell_handle_interrupt,
3507ef0f9545SMaxim Kochetkov 		.get_wol = m88e1318_get_wol,
3508ef0f9545SMaxim Kochetkov 		.set_wol = m88e1318_set_wol,
3509ef0f9545SMaxim Kochetkov 		.resume = marvell_resume,
3510ef0f9545SMaxim Kochetkov 		.suspend = marvell_suspend,
3511424ca4c5SRussell King 		.read_page = marvell_read_page,
3512424ca4c5SRussell King 		.write_page = marvell_write_page,
3513d2fa47d9SAndrew Lunn 		.get_sset_count = marvell_get_sset_count,
3514d2fa47d9SAndrew Lunn 		.get_strings = marvell_get_strings,
3515d2fa47d9SAndrew Lunn 		.get_stats = marvell_get_stats,
3516020a45afSMohammad Athari Bin Ismail 		.set_loopback = m88e1510_loopback,
3517262caf47SHeiner Kallweit 		.get_tunable = m88e1011_get_tunable,
3518262caf47SHeiner Kallweit 		.set_tunable = m88e1011_set_tunable,
3519fc879f72SAndrew Lunn 		.cable_test_start = marvell_vct7_cable_test_start,
35200c9bcc1dSAndrew Lunn 		.cable_test_tdr_start = marvell_vct5_cable_test_tdr_start,
3521fc879f72SAndrew Lunn 		.cable_test_get_status = marvell_vct7_cable_test_get_status,
35222d3960e5SAndrew Lunn 		.led_brightness_set = m88e1318_led_brightness_set,
3523ea9e8648SAndrew Lunn 		.led_blink_set = m88e1318_led_blink_set,
3524*460b0b64SAndrew Lunn 		.led_hw_is_supported = m88e1318_led_hw_is_supported,
3525*460b0b64SAndrew Lunn 		.led_hw_control_set = m88e1318_led_hw_control_set,
3526*460b0b64SAndrew Lunn 		.led_hw_control_get = m88e1318_led_hw_control_get,
352710e24caaSMichal Simek 	},
35286b358aedSSebastian Hesselbarth 	{
3529819ec8e1SAndrew Lunn 		.phy_id = MARVELL_PHY_ID_88E1540,
3530819ec8e1SAndrew Lunn 		.phy_id_mask = MARVELL_PHY_ID_MASK,
3531819ec8e1SAndrew Lunn 		.name = "Marvell 88E1540",
353241d26bf4SMarek Behún 		.driver_data = DEF_MARVELL_HWMON_OPS(m88e1510_hwmon_ops),
3533dcdecdcfSHeiner Kallweit 		/* PHY_GBIT_FEATURES */
3534fc879f72SAndrew Lunn 		.flags = PHY_POLL_CABLE_TEST,
353541d26bf4SMarek Behún 		.probe = marvell_probe,
35368385b1f0SMaxim Kochetkov 		.config_init = marvell_1011gbe_config_init,
3537ef0f9545SMaxim Kochetkov 		.config_aneg = m88e1510_config_aneg,
3538ef0f9545SMaxim Kochetkov 		.read_status = marvell_read_status,
3539ef0f9545SMaxim Kochetkov 		.config_intr = marvell_config_intr,
3540a0723b37SIoana Ciornei 		.handle_interrupt = marvell_handle_interrupt,
3541ef0f9545SMaxim Kochetkov 		.resume = genphy_resume,
3542ef0f9545SMaxim Kochetkov 		.suspend = genphy_suspend,
3543424ca4c5SRussell King 		.read_page = marvell_read_page,
3544424ca4c5SRussell King 		.write_page = marvell_write_page,
3545d2fa47d9SAndrew Lunn 		.get_sset_count = marvell_get_sset_count,
3546d2fa47d9SAndrew Lunn 		.get_strings = marvell_get_strings,
3547d2fa47d9SAndrew Lunn 		.get_stats = marvell_get_stats,
354869f42be8SHeiner Kallweit 		.get_tunable = m88e1540_get_tunable,
354969f42be8SHeiner Kallweit 		.set_tunable = m88e1540_set_tunable,
3550fc879f72SAndrew Lunn 		.cable_test_start = marvell_vct7_cable_test_start,
35510c9bcc1dSAndrew Lunn 		.cable_test_tdr_start = marvell_vct5_cable_test_tdr_start,
3552fc879f72SAndrew Lunn 		.cable_test_get_status = marvell_vct7_cable_test_get_status,
35532d3960e5SAndrew Lunn 		.led_brightness_set = m88e1318_led_brightness_set,
3554ea9e8648SAndrew Lunn 		.led_blink_set = m88e1318_led_blink_set,
3555*460b0b64SAndrew Lunn 		.led_hw_is_supported = m88e1318_led_hw_is_supported,
3556*460b0b64SAndrew Lunn 		.led_hw_control_set = m88e1318_led_hw_control_set,
3557*460b0b64SAndrew Lunn 		.led_hw_control_get = m88e1318_led_hw_control_get,
3558819ec8e1SAndrew Lunn 	},
3559819ec8e1SAndrew Lunn 	{
356060f06fdeSAndrew Lunn 		.phy_id = MARVELL_PHY_ID_88E1545,
356160f06fdeSAndrew Lunn 		.phy_id_mask = MARVELL_PHY_ID_MASK,
356260f06fdeSAndrew Lunn 		.name = "Marvell 88E1545",
356341d26bf4SMarek Behún 		.driver_data = DEF_MARVELL_HWMON_OPS(m88e1510_hwmon_ops),
356441d26bf4SMarek Behún 		.probe = marvell_probe,
3565dcdecdcfSHeiner Kallweit 		/* PHY_GBIT_FEATURES */
3566fc879f72SAndrew Lunn 		.flags = PHY_POLL_CABLE_TEST,
35678385b1f0SMaxim Kochetkov 		.config_init = marvell_1011gbe_config_init,
3568ef0f9545SMaxim Kochetkov 		.config_aneg = m88e1510_config_aneg,
3569ef0f9545SMaxim Kochetkov 		.read_status = marvell_read_status,
3570ef0f9545SMaxim Kochetkov 		.config_intr = marvell_config_intr,
3571a0723b37SIoana Ciornei 		.handle_interrupt = marvell_handle_interrupt,
3572ef0f9545SMaxim Kochetkov 		.resume = genphy_resume,
3573ef0f9545SMaxim Kochetkov 		.suspend = genphy_suspend,
3574424ca4c5SRussell King 		.read_page = marvell_read_page,
3575424ca4c5SRussell King 		.write_page = marvell_write_page,
357660f06fdeSAndrew Lunn 		.get_sset_count = marvell_get_sset_count,
357760f06fdeSAndrew Lunn 		.get_strings = marvell_get_strings,
357860f06fdeSAndrew Lunn 		.get_stats = marvell_get_stats,
3579262caf47SHeiner Kallweit 		.get_tunable = m88e1540_get_tunable,
3580262caf47SHeiner Kallweit 		.set_tunable = m88e1540_set_tunable,
3581fc879f72SAndrew Lunn 		.cable_test_start = marvell_vct7_cable_test_start,
35820c9bcc1dSAndrew Lunn 		.cable_test_tdr_start = marvell_vct5_cable_test_tdr_start,
3583fc879f72SAndrew Lunn 		.cable_test_get_status = marvell_vct7_cable_test_get_status,
35842d3960e5SAndrew Lunn 		.led_brightness_set = m88e1318_led_brightness_set,
3585ea9e8648SAndrew Lunn 		.led_blink_set = m88e1318_led_blink_set,
3586*460b0b64SAndrew Lunn 		.led_hw_is_supported = m88e1318_led_hw_is_supported,
3587*460b0b64SAndrew Lunn 		.led_hw_control_set = m88e1318_led_hw_control_set,
3588*460b0b64SAndrew Lunn 		.led_hw_control_get = m88e1318_led_hw_control_get,
358960f06fdeSAndrew Lunn 	},
359060f06fdeSAndrew Lunn 	{
35916b358aedSSebastian Hesselbarth 		.phy_id = MARVELL_PHY_ID_88E3016,
35926b358aedSSebastian Hesselbarth 		.phy_id_mask = MARVELL_PHY_ID_MASK,
35936b358aedSSebastian Hesselbarth 		.name = "Marvell 88E3016",
3594dcdecdcfSHeiner Kallweit 		/* PHY_BASIC_FEATURES */
3595d2fa47d9SAndrew Lunn 		.probe = marvell_probe,
3596ef0f9545SMaxim Kochetkov 		.config_init = m88e3016_config_init,
3597ef0f9545SMaxim Kochetkov 		.aneg_done = marvell_aneg_done,
3598ef0f9545SMaxim Kochetkov 		.read_status = marvell_read_status,
3599ef0f9545SMaxim Kochetkov 		.config_intr = marvell_config_intr,
3600a0723b37SIoana Ciornei 		.handle_interrupt = marvell_handle_interrupt,
3601ef0f9545SMaxim Kochetkov 		.resume = genphy_resume,
3602ef0f9545SMaxim Kochetkov 		.suspend = genphy_suspend,
3603424ca4c5SRussell King 		.read_page = marvell_read_page,
3604424ca4c5SRussell King 		.write_page = marvell_write_page,
3605d2fa47d9SAndrew Lunn 		.get_sset_count = marvell_get_sset_count,
3606d2fa47d9SAndrew Lunn 		.get_strings = marvell_get_strings,
3607d2fa47d9SAndrew Lunn 		.get_stats = marvell_get_stats,
36086b358aedSSebastian Hesselbarth 	},
3609e4cf8a38SAndrew Lunn 	{
36101fe976d3SPali Rohár 		.phy_id = MARVELL_PHY_ID_88E6341_FAMILY,
3611e4cf8a38SAndrew Lunn 		.phy_id_mask = MARVELL_PHY_ID_MASK,
36121fe976d3SPali Rohár 		.name = "Marvell 88E6341 Family",
361341d26bf4SMarek Behún 		.driver_data = DEF_MARVELL_HWMON_OPS(m88e1510_hwmon_ops),
36141fe976d3SPali Rohár 		/* PHY_GBIT_FEATURES */
36151fe976d3SPali Rohár 		.flags = PHY_POLL_CABLE_TEST,
361641d26bf4SMarek Behún 		.probe = marvell_probe,
36178385b1f0SMaxim Kochetkov 		.config_init = marvell_1011gbe_config_init,
36181fe976d3SPali Rohár 		.config_aneg = m88e6390_config_aneg,
36191fe976d3SPali Rohár 		.read_status = marvell_read_status,
36201fe976d3SPali Rohár 		.config_intr = marvell_config_intr,
36211fe976d3SPali Rohár 		.handle_interrupt = marvell_handle_interrupt,
36221fe976d3SPali Rohár 		.resume = genphy_resume,
36231fe976d3SPali Rohár 		.suspend = genphy_suspend,
36241fe976d3SPali Rohár 		.read_page = marvell_read_page,
36251fe976d3SPali Rohár 		.write_page = marvell_write_page,
36261fe976d3SPali Rohár 		.get_sset_count = marvell_get_sset_count,
36271fe976d3SPali Rohár 		.get_strings = marvell_get_strings,
36281fe976d3SPali Rohár 		.get_stats = marvell_get_stats,
36291fe976d3SPali Rohár 		.get_tunable = m88e1540_get_tunable,
36301fe976d3SPali Rohár 		.set_tunable = m88e1540_set_tunable,
36311fe976d3SPali Rohár 		.cable_test_start = marvell_vct7_cable_test_start,
36321fe976d3SPali Rohár 		.cable_test_tdr_start = marvell_vct5_cable_test_tdr_start,
36331fe976d3SPali Rohár 		.cable_test_get_status = marvell_vct7_cable_test_get_status,
36341fe976d3SPali Rohár 	},
36351fe976d3SPali Rohár 	{
36361fe976d3SPali Rohár 		.phy_id = MARVELL_PHY_ID_88E6390_FAMILY,
36371fe976d3SPali Rohár 		.phy_id_mask = MARVELL_PHY_ID_MASK,
36381fe976d3SPali Rohár 		.name = "Marvell 88E6390 Family",
363941d26bf4SMarek Behún 		.driver_data = DEF_MARVELL_HWMON_OPS(m88e6390_hwmon_ops),
3640dcdecdcfSHeiner Kallweit 		/* PHY_GBIT_FEATURES */
3641fc879f72SAndrew Lunn 		.flags = PHY_POLL_CABLE_TEST,
364241d26bf4SMarek Behún 		.probe = marvell_probe,
36438385b1f0SMaxim Kochetkov 		.config_init = marvell_1011gbe_config_init,
3644ef0f9545SMaxim Kochetkov 		.config_aneg = m88e6390_config_aneg,
3645ef0f9545SMaxim Kochetkov 		.read_status = marvell_read_status,
3646ef0f9545SMaxim Kochetkov 		.config_intr = marvell_config_intr,
3647a0723b37SIoana Ciornei 		.handle_interrupt = marvell_handle_interrupt,
3648ef0f9545SMaxim Kochetkov 		.resume = genphy_resume,
3649ef0f9545SMaxim Kochetkov 		.suspend = genphy_suspend,
3650424ca4c5SRussell King 		.read_page = marvell_read_page,
3651424ca4c5SRussell King 		.write_page = marvell_write_page,
3652e4cf8a38SAndrew Lunn 		.get_sset_count = marvell_get_sset_count,
3653e4cf8a38SAndrew Lunn 		.get_strings = marvell_get_strings,
3654e4cf8a38SAndrew Lunn 		.get_stats = marvell_get_stats,
365569f42be8SHeiner Kallweit 		.get_tunable = m88e1540_get_tunable,
365669f42be8SHeiner Kallweit 		.set_tunable = m88e1540_set_tunable,
3657fc879f72SAndrew Lunn 		.cable_test_start = marvell_vct7_cable_test_start,
36580c9bcc1dSAndrew Lunn 		.cable_test_tdr_start = marvell_vct5_cable_test_tdr_start,
3659fc879f72SAndrew Lunn 		.cable_test_get_status = marvell_vct7_cable_test_get_status,
3660e4cf8a38SAndrew Lunn 	},
3661a602ea86SMaxim Kochetkov 	{
3662a978f7c4SMarek Behún 		.phy_id = MARVELL_PHY_ID_88E6393_FAMILY,
3663a978f7c4SMarek Behún 		.phy_id_mask = MARVELL_PHY_ID_MASK,
3664a978f7c4SMarek Behún 		.name = "Marvell 88E6393 Family",
3665a978f7c4SMarek Behún 		.driver_data = DEF_MARVELL_HWMON_OPS(m88e6393_hwmon_ops),
3666a978f7c4SMarek Behún 		/* PHY_GBIT_FEATURES */
3667a978f7c4SMarek Behún 		.flags = PHY_POLL_CABLE_TEST,
3668a978f7c4SMarek Behún 		.probe = marvell_probe,
36698385b1f0SMaxim Kochetkov 		.config_init = marvell_1011gbe_config_init,
3670a978f7c4SMarek Behún 		.config_aneg = m88e1510_config_aneg,
3671a978f7c4SMarek Behún 		.read_status = marvell_read_status,
3672a978f7c4SMarek Behún 		.config_intr = marvell_config_intr,
3673a978f7c4SMarek Behún 		.handle_interrupt = marvell_handle_interrupt,
3674a978f7c4SMarek Behún 		.resume = genphy_resume,
3675a978f7c4SMarek Behún 		.suspend = genphy_suspend,
3676a978f7c4SMarek Behún 		.read_page = marvell_read_page,
3677a978f7c4SMarek Behún 		.write_page = marvell_write_page,
3678a978f7c4SMarek Behún 		.get_sset_count = marvell_get_sset_count,
3679a978f7c4SMarek Behún 		.get_strings = marvell_get_strings,
3680a978f7c4SMarek Behún 		.get_stats = marvell_get_stats,
3681a978f7c4SMarek Behún 		.get_tunable = m88e1540_get_tunable,
3682a978f7c4SMarek Behún 		.set_tunable = m88e1540_set_tunable,
3683a978f7c4SMarek Behún 		.cable_test_start = marvell_vct7_cable_test_start,
3684a978f7c4SMarek Behún 		.cable_test_tdr_start = marvell_vct5_cable_test_tdr_start,
3685a978f7c4SMarek Behún 		.cable_test_get_status = marvell_vct7_cable_test_get_status,
3686a978f7c4SMarek Behún 	},
3687a978f7c4SMarek Behún 	{
3688a602ea86SMaxim Kochetkov 		.phy_id = MARVELL_PHY_ID_88E1340S,
3689a602ea86SMaxim Kochetkov 		.phy_id_mask = MARVELL_PHY_ID_MASK,
3690a602ea86SMaxim Kochetkov 		.name = "Marvell 88E1340S",
369141d26bf4SMarek Behún 		.driver_data = DEF_MARVELL_HWMON_OPS(m88e1510_hwmon_ops),
369241d26bf4SMarek Behún 		.probe = marvell_probe,
3693a602ea86SMaxim Kochetkov 		/* PHY_GBIT_FEATURES */
36948385b1f0SMaxim Kochetkov 		.config_init = marvell_1011gbe_config_init,
3695a602ea86SMaxim Kochetkov 		.config_aneg = m88e1510_config_aneg,
3696a602ea86SMaxim Kochetkov 		.read_status = marvell_read_status,
3697a602ea86SMaxim Kochetkov 		.config_intr = marvell_config_intr,
3698a0723b37SIoana Ciornei 		.handle_interrupt = marvell_handle_interrupt,
3699a602ea86SMaxim Kochetkov 		.resume = genphy_resume,
3700a602ea86SMaxim Kochetkov 		.suspend = genphy_suspend,
3701a602ea86SMaxim Kochetkov 		.read_page = marvell_read_page,
3702a602ea86SMaxim Kochetkov 		.write_page = marvell_write_page,
3703a602ea86SMaxim Kochetkov 		.get_sset_count = marvell_get_sset_count,
3704a602ea86SMaxim Kochetkov 		.get_strings = marvell_get_strings,
3705a602ea86SMaxim Kochetkov 		.get_stats = marvell_get_stats,
3706a602ea86SMaxim Kochetkov 		.get_tunable = m88e1540_get_tunable,
3707a602ea86SMaxim Kochetkov 		.set_tunable = m88e1540_set_tunable,
3708a602ea86SMaxim Kochetkov 	},
3709f59babf9SMaxim Kochetkov 	{
3710f59babf9SMaxim Kochetkov 		.phy_id = MARVELL_PHY_ID_88E1548P,
3711f59babf9SMaxim Kochetkov 		.phy_id_mask = MARVELL_PHY_ID_MASK,
3712f59babf9SMaxim Kochetkov 		.name = "Marvell 88E1548P",
371341d26bf4SMarek Behún 		.driver_data = DEF_MARVELL_HWMON_OPS(m88e1510_hwmon_ops),
371441d26bf4SMarek Behún 		.probe = marvell_probe,
3715f59babf9SMaxim Kochetkov 		.features = PHY_GBIT_FIBRE_FEATURES,
37168385b1f0SMaxim Kochetkov 		.config_init = marvell_1011gbe_config_init,
3717f59babf9SMaxim Kochetkov 		.config_aneg = m88e1510_config_aneg,
3718f59babf9SMaxim Kochetkov 		.read_status = marvell_read_status,
3719f59babf9SMaxim Kochetkov 		.config_intr = marvell_config_intr,
3720a0723b37SIoana Ciornei 		.handle_interrupt = marvell_handle_interrupt,
3721f59babf9SMaxim Kochetkov 		.resume = genphy_resume,
3722f59babf9SMaxim Kochetkov 		.suspend = genphy_suspend,
3723f59babf9SMaxim Kochetkov 		.read_page = marvell_read_page,
3724f59babf9SMaxim Kochetkov 		.write_page = marvell_write_page,
3725f59babf9SMaxim Kochetkov 		.get_sset_count = marvell_get_sset_count,
3726f59babf9SMaxim Kochetkov 		.get_strings = marvell_get_strings,
3727f59babf9SMaxim Kochetkov 		.get_stats = marvell_get_stats,
3728f59babf9SMaxim Kochetkov 		.get_tunable = m88e1540_get_tunable,
3729f59babf9SMaxim Kochetkov 		.set_tunable = m88e1540_set_tunable,
37302d3960e5SAndrew Lunn 		.led_brightness_set = m88e1318_led_brightness_set,
3731ea9e8648SAndrew Lunn 		.led_blink_set = m88e1318_led_blink_set,
3732*460b0b64SAndrew Lunn 		.led_hw_is_supported = m88e1318_led_hw_is_supported,
3733*460b0b64SAndrew Lunn 		.led_hw_control_set = m88e1318_led_hw_control_set,
3734*460b0b64SAndrew Lunn 		.led_hw_control_get = m88e1318_led_hw_control_get,
3735f59babf9SMaxim Kochetkov 	},
373676884679SAndy Fleming };
373776884679SAndy Fleming 
373850fd7150SJohan Hovold module_phy_driver(marvell_drivers);
37394e4f10f6SDavid Woodhouse 
3740cf93c945SUwe Kleine-König static struct mdio_device_id __maybe_unused marvell_tbl[] = {
3741f5e1cabfSMichal Simek 	{ MARVELL_PHY_ID_88E1101, MARVELL_PHY_ID_MASK },
3742f5e1cabfSMichal Simek 	{ MARVELL_PHY_ID_88E1112, MARVELL_PHY_ID_MASK },
3743f5e1cabfSMichal Simek 	{ MARVELL_PHY_ID_88E1111, MARVELL_PHY_ID_MASK },
37441887023aSRobert Hancock 	{ MARVELL_PHY_ID_88E1111_FINISAR, MARVELL_PHY_ID_MASK },
3745f5e1cabfSMichal Simek 	{ MARVELL_PHY_ID_88E1118, MARVELL_PHY_ID_MASK },
3746f5e1cabfSMichal Simek 	{ MARVELL_PHY_ID_88E1121R, MARVELL_PHY_ID_MASK },
3747f5e1cabfSMichal Simek 	{ MARVELL_PHY_ID_88E1145, MARVELL_PHY_ID_MASK },
3748f5e1cabfSMichal Simek 	{ MARVELL_PHY_ID_88E1149R, MARVELL_PHY_ID_MASK },
3749f5e1cabfSMichal Simek 	{ MARVELL_PHY_ID_88E1240, MARVELL_PHY_ID_MASK },
3750f5e1cabfSMichal Simek 	{ MARVELL_PHY_ID_88E1318S, MARVELL_PHY_ID_MASK },
37513da09a51SMichal Simek 	{ MARVELL_PHY_ID_88E1116R, MARVELL_PHY_ID_MASK },
375210e24caaSMichal Simek 	{ MARVELL_PHY_ID_88E1510, MARVELL_PHY_ID_MASK },
3753819ec8e1SAndrew Lunn 	{ MARVELL_PHY_ID_88E1540, MARVELL_PHY_ID_MASK },
375460f06fdeSAndrew Lunn 	{ MARVELL_PHY_ID_88E1545, MARVELL_PHY_ID_MASK },
37556b358aedSSebastian Hesselbarth 	{ MARVELL_PHY_ID_88E3016, MARVELL_PHY_ID_MASK },
37561fe976d3SPali Rohár 	{ MARVELL_PHY_ID_88E6341_FAMILY, MARVELL_PHY_ID_MASK },
37571fe976d3SPali Rohár 	{ MARVELL_PHY_ID_88E6390_FAMILY, MARVELL_PHY_ID_MASK },
3758a978f7c4SMarek Behún 	{ MARVELL_PHY_ID_88E6393_FAMILY, MARVELL_PHY_ID_MASK },
3759a602ea86SMaxim Kochetkov 	{ MARVELL_PHY_ID_88E1340S, MARVELL_PHY_ID_MASK },
3760f59babf9SMaxim Kochetkov 	{ MARVELL_PHY_ID_88E1548P, MARVELL_PHY_ID_MASK },
37614e4f10f6SDavid Woodhouse 	{ }
37624e4f10f6SDavid Woodhouse };
37634e4f10f6SDavid Woodhouse 
37644e4f10f6SDavid Woodhouse MODULE_DEVICE_TABLE(mdio, marvell_tbl);
3765