Home
last modified time | relevance | path

Searched refs:phys_start (Results 1 – 25 of 37) sorted by relevance

12

/openbmc/u-boot/board/freescale/mpc837xerdb/
H A Dpci.c14 phys_start: CONFIG_SYS_PCI_MEM_PHYS,
20 phys_start: CONFIG_SYS_PCI_MMIO_PHYS,
26 phys_start: CONFIG_SYS_PCI_IO_PHYS,
35 .phys_start = CONFIG_SYS_PCIE1_MEM_PHYS,
41 .phys_start = CONFIG_SYS_PCIE1_IO_PHYS,
50 .phys_start = CONFIG_SYS_PCIE2_MEM_PHYS,
56 .phys_start = CONFIG_SYS_PCIE2_IO_PHYS,
/openbmc/u-boot/board/freescale/mpc8349itx/
H A Dpci.c18 phys_start: CONFIG_SYS_PCI1_MEM_PHYS,
24 phys_start: CONFIG_SYS_PCI1_IO_PHYS,
30 phys_start: CONFIG_SYS_PCI1_MMIO_PHYS,
40 phys_start: CONFIG_SYS_PCI2_MEM_PHYS,
46 phys_start: CONFIG_SYS_PCI2_IO_PHYS,
52 phys_start: CONFIG_SYS_PCI2_MMIO_PHYS,
/openbmc/u-boot/board/freescale/mpc837xemds/
H A Dpci.c19 phys_start: CONFIG_SYS_PCI_MEM_PHYS,
25 phys_start: CONFIG_SYS_PCI_MMIO_PHYS,
31 phys_start: CONFIG_SYS_PCI_IO_PHYS,
40 .phys_start = CONFIG_SYS_PCIE1_MEM_PHYS,
46 .phys_start = CONFIG_SYS_PCIE1_IO_PHYS,
55 .phys_start = CONFIG_SYS_PCIE2_MEM_PHYS,
61 .phys_start = CONFIG_SYS_PCIE2_IO_PHYS,
/openbmc/u-boot/board/freescale/mpc832xemds/
H A Dpci.c21 phys_start: CONFIG_SYS_PCI1_MEM_PHYS,
27 phys_start: CONFIG_SYS_PCI1_IO_PHYS,
33 phys_start: CONFIG_SYS_PCI1_MMIO_PHYS,
43 phys_start: CONFIG_SYS_PCI2_MEM_PHYS,
49 phys_start: CONFIG_SYS_PCI2_IO_PHYS,
55 phys_start: CONFIG_SYS_PCI2_MMIO_PHYS,
/openbmc/u-boot/board/freescale/mpc8315erdb/
H A Dmpc8315erdb.c69 phys_start: CONFIG_SYS_PCI_MEM_PHYS,
75 phys_start: CONFIG_SYS_PCI_MMIO_PHYS,
81 phys_start: CONFIG_SYS_PCI_IO_PHYS,
90 .phys_start = CONFIG_SYS_PCIE1_MEM_PHYS,
96 .phys_start = CONFIG_SYS_PCIE1_IO_PHYS,
105 .phys_start = CONFIG_SYS_PCIE2_MEM_PHYS,
111 .phys_start = CONFIG_SYS_PCIE2_IO_PHYS,
/openbmc/u-boot/board/freescale/mpc8349emds/
H A Dpci.c17 phys_start: CONFIG_SYS_PCI1_MEM_PHYS,
23 phys_start: CONFIG_SYS_PCI1_IO_PHYS,
29 phys_start: CONFIG_SYS_PCI1_MMIO_PHYS,
39 phys_start: CONFIG_SYS_PCI2_MEM_PHYS,
45 phys_start: CONFIG_SYS_PCI2_IO_PHYS,
51 phys_start: CONFIG_SYS_PCI2_MMIO_PHYS,
/openbmc/u-boot/arch/x86/lib/fsp/
H A Dfsp_support.c221 phys_addr_t phys_start; in fsp_get_usable_lowmem_top() local
237 phys_start = res_desc->phys_start; in fsp_get_usable_lowmem_top()
239 if (phys_start >= FSP_LOWMEM_BASE && in fsp_get_usable_lowmem_top()
240 phys_start < (phys_addr_t)FSP_HIGHMEM_BASE) in fsp_get_usable_lowmem_top()
283 phys_addr_t phys_start; in fsp_get_usable_highmem_top() local
295 phys_start = res_desc->phys_start; in fsp_get_usable_highmem_top()
297 if (phys_start >= (phys_addr_t)FSP_HIGHMEM_BASE) in fsp_get_usable_highmem_top()
325 return (u64)(res_desc->phys_start); in fsp_get_reserved_mem_from_guid()
H A Dfsp_dram.c76 entries[num_entries].addr = res_desc->phys_start; in install_e820_map()
/openbmc/u-boot/board/sbc8349/
H A Dpci.c21 phys_start: CONFIG_SYS_PCI1_MEM_PHYS,
27 phys_start: CONFIG_SYS_PCI1_IO_PHYS,
33 phys_start: CONFIG_SYS_PCI1_MMIO_PHYS,
/openbmc/u-boot/board/tqc/tqm834x/
H A Dpci.c19 phys_start: CONFIG_SYS_PCI1_MEM_PHYS,
25 phys_start: CONFIG_SYS_PCI1_IO_PHYS,
31 phys_start: CONFIG_SYS_PCI1_MMIO_PHYS,
/openbmc/u-boot/board/esd/vme8349/
H A Dpci.c25 phys_start: CONFIG_SYS_PCI1_MEM_PHYS,
31 phys_start: CONFIG_SYS_PCI1_IO_PHYS,
37 phys_start: CONFIG_SYS_PCI1_MMIO_PHYS,
/openbmc/u-boot/board/freescale/mpc8313erdb/
H A Dmpc8313erdb.c57 .phys_start = CONFIG_SYS_PCI1_MEM_PHYS,
63 .phys_start = CONFIG_SYS_PCI1_MMIO_PHYS,
69 .phys_start = CONFIG_SYS_PCI1_IO_PHYS,
/openbmc/u-boot/drivers/pci/
H A Dfsl_pci_init.c59 out_be32(&pi->pitar, r->phys_start >> 12); in set_inbound_window()
90 phys_addr_t phys_start = CONFIG_SYS_PCI_MEMORY_PHYS; in fsl_pci_setup_inbound_windows() local
113 (u64)bus_start, (u64)phys_start, (u64)sz); in fsl_pci_setup_inbound_windows()
114 pci_set_region(r, bus_start, phys_start, sz, in fsl_pci_setup_inbound_windows()
129 (u64)bus_start, (u64)phys_start, (u64)pci_sz); in fsl_pci_setup_inbound_windows()
130 pci_set_region(r, bus_start, phys_start, pci_sz, in fsl_pci_setup_inbound_windows()
137 phys_start += pci_sz; in fsl_pci_setup_inbound_windows()
142 (u64)bus_start, (u64)phys_start, (u64)pci_sz); in fsl_pci_setup_inbound_windows()
143 pci_set_region(r, bus_start, phys_start, pci_sz, in fsl_pci_setup_inbound_windows()
149 phys_start += pci_sz; in fsl_pci_setup_inbound_windows()
[all …]
H A Dpcie_dw_mvebu.c268 PCIE_ATU_TYPE_IO, pcie->io.phys_start, in pcie_dw_mvebu_read_config()
313 PCIE_ATU_TYPE_IO, pcie->io.phys_start, in pcie_dw_mvebu_write_config()
514 pcie->io.phys_start = hose->regions[0].phys_start; /* IO base */ in pcie_dw_mvebu_probe()
518 pcie->mem.phys_start = hose->regions[1].phys_start; /* MEM base */ in pcie_dw_mvebu_probe()
523 PCIE_ATU_TYPE_MEM, pcie->mem.phys_start, in pcie_dw_mvebu_probe()
H A Dpcie_layerscape.c180 io->phys_start = (io->phys_start & in ls_pcie_setup_atu()
185 mem->phys_start = (mem->phys_start & in ls_pcie_setup_atu()
190 pref->phys_start = (pref->phys_start & in ls_pcie_setup_atu()
200 io->phys_start + offset, in ls_pcie_setup_atu()
208 mem->phys_start + offset, in ls_pcie_setup_atu()
216 pref->phys_start + offset, in ls_pcie_setup_atu()
H A Dpci_auto_common.c76 (unsigned long long)region->phys_start, in pciauto_show_region()
77 (unsigned long long)(region->phys_start + region->size - 1)); in pciauto_show_region()
H A Dpci_common.c163 *pa = (bus_addr - res->bus_start + res->phys_start); in __pci_hose_bus_to_phys()
221 bus_addr = phys_addr - res->phys_start + res->bus_start; in __pci_hose_phys_to_bus()
/openbmc/u-boot/board/mpc8308_p1m/
H A Dmpc8308_p1m.c28 .phys_start = CONFIG_SYS_PCIE1_MEM_PHYS,
34 .phys_start = CONFIG_SYS_PCIE1_IO_PHYS,
/openbmc/u-boot/board/freescale/mpc8323erdb/
H A Dmpc8323erdb.c141 phys_start: CONFIG_SYS_PCI1_MEM_PHYS,
147 phys_start: CONFIG_SYS_PCI1_MMIO_PHYS,
153 phys_start: CONFIG_SYS_PCI1_IO_PHYS,
/openbmc/u-boot/board/ve8313/
H A Dve8313.c154 phys_start: CONFIG_SYS_PCI1_MEM_PHYS,
160 phys_start: CONFIG_SYS_PCI1_MMIO_PHYS,
166 phys_start: CONFIG_SYS_PCI1_IO_PHYS,
/openbmc/u-boot/board/freescale/mpc8308rdb/
H A Dmpc8308rdb.c92 .phys_start = CONFIG_SYS_PCIE1_MEM_PHYS,
98 .phys_start = CONFIG_SYS_PCIE1_IO_PHYS,
/openbmc/u-boot/arch/x86/cpu/tangier/
H A Dsdram.c115 start = mentry->phys_start; in sfi_setup_e820()
161 gd->bd->bi_dram[bank].start = mentry->phys_start; in sfi_get_bank_size()
/openbmc/u-boot/arch/powerpc/cpu/mpc83xx/
H A Dpci.c48 pot->pobar = reg->phys_start >> 12; in pci_init_bus()
73 hose->regions[i].phys_start = 0; in pci_init_bus()
H A Dpcie.c131 hose->regions[i].phys_start = 0; in PCIE_OP()
137 hose->regions[i].phys_start = CONFIG_SYS_IMMR; in PCIE_OP()
214 out_le32(&out_win->bar, reg[i].phys_start); in mpc83xx_pcie_init_bus()
/openbmc/qemu/tests/qtest/
H A Dvirtio-iommu-test.c102 uint64_t phys_start, uint32_t flags) in send_map() argument
118 req.phys_start = cpu_to_le64(phys_start); in send_map()

12