| /openbmc/linux/drivers/gpu/drm/amd/pm/swsmu/smu13/ |
| H A D | smu_v13_0_5_ppt.c | 401 struct pp_smu_wm_range_sets *clock_ranges) in smu_v13_0_5_set_watermarks_table() argument
407 if (!table || !clock_ranges) in smu_v13_0_5_set_watermarks_table()
410 if (clock_ranges) { in smu_v13_0_5_set_watermarks_table()
412 clock_ranges->num_writer_wm_sets > NUM_WM_RANGES) in smu_v13_0_5_set_watermarks_table()
417 clock_ranges->reader_wm_sets[i].min_drain_clk_mhz; in smu_v13_0_5_set_watermarks_table()
421 clock_ranges->reader_wm_sets[i].min_fill_clk_mhz; in smu_v13_0_5_set_watermarks_table()
423 clock_ranges->reader_wm_sets[i].max_fill_clk_mhz; in smu_v13_0_5_set_watermarks_table()
426 clock_ranges->reader_wm_sets[i].wm_inst; in smu_v13_0_5_set_watermarks_table()
431 clock_ranges->writer_wm_sets[i].min_fill_clk_mhz; in smu_v13_0_5_set_watermarks_table()
433 clock_ranges->writer_wm_sets[i].max_fill_clk_mhz; in smu_v13_0_5_set_watermarks_table()
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| H A D | smu_v13_0_4_ppt.c | 658 struct pp_smu_wm_range_sets *clock_ranges) in smu_v13_0_4_set_watermarks_table() argument
664 if (!table || !clock_ranges) in smu_v13_0_4_set_watermarks_table()
668 clock_ranges->num_writer_wm_sets > NUM_WM_RANGES) in smu_v13_0_4_set_watermarks_table()
673 clock_ranges->reader_wm_sets[i].min_drain_clk_mhz; in smu_v13_0_4_set_watermarks_table()
675 clock_ranges->reader_wm_sets[i].max_drain_clk_mhz; in smu_v13_0_4_set_watermarks_table()
677 clock_ranges->reader_wm_sets[i].min_fill_clk_mhz; in smu_v13_0_4_set_watermarks_table()
679 clock_ranges->reader_wm_sets[i].max_fill_clk_mhz; in smu_v13_0_4_set_watermarks_table()
682 clock_ranges->reader_wm_sets[i].wm_inst; in smu_v13_0_4_set_watermarks_table()
687 clock_ranges->writer_wm_sets[i].min_fill_clk_mhz; in smu_v13_0_4_set_watermarks_table()
689 clock_ranges->writer_wm_sets[i].max_fill_clk_mhz; in smu_v13_0_4_set_watermarks_table()
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| H A D | yellow_carp_ppt.c | 492 struct pp_smu_wm_range_sets *clock_ranges) in yellow_carp_set_watermarks_table() argument
498 if (!table || !clock_ranges) in yellow_carp_set_watermarks_table()
501 if (clock_ranges) { in yellow_carp_set_watermarks_table()
503 clock_ranges->num_writer_wm_sets > NUM_WM_RANGES) in yellow_carp_set_watermarks_table()
508 clock_ranges->reader_wm_sets[i].min_drain_clk_mhz; in yellow_carp_set_watermarks_table()
512 clock_ranges->reader_wm_sets[i].min_fill_clk_mhz; in yellow_carp_set_watermarks_table()
514 clock_ranges->reader_wm_sets[i].max_fill_clk_mhz; in yellow_carp_set_watermarks_table()
517 clock_ranges->reader_wm_sets[i].wm_inst; in yellow_carp_set_watermarks_table()
522 clock_ranges->writer_wm_sets[i].min_fill_clk_mhz; in yellow_carp_set_watermarks_table()
524 clock_ranges->writer_wm_sets[i].max_fill_clk_mhz; in yellow_carp_set_watermarks_table()
[all …]
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| /openbmc/linux/drivers/gpu/drm/amd/pm/swsmu/smu12/ |
| H A D | renoir_ppt.c | 1044 struct pp_smu_wm_range_sets *clock_ranges) in renoir_set_watermarks_table() argument
1050 if (clock_ranges) { in renoir_set_watermarks_table()
1058 clock_ranges->reader_wm_sets[i].min_drain_clk_mhz; in renoir_set_watermarks_table()
1062 clock_ranges->reader_wm_sets[i].min_fill_clk_mhz; in renoir_set_watermarks_table()
1064 clock_ranges->reader_wm_sets[i].max_fill_clk_mhz; in renoir_set_watermarks_table()
1067 clock_ranges->reader_wm_sets[i].wm_inst; in renoir_set_watermarks_table()
1069 clock_ranges->reader_wm_sets[i].wm_type; in renoir_set_watermarks_table()
1074 clock_ranges->writer_wm_sets[i].min_fill_clk_mhz; in renoir_set_watermarks_table()
1076 clock_ranges->writer_wm_sets[i].max_fill_clk_mhz; in renoir_set_watermarks_table()
1083 clock_ranges->writer_wm_sets[i].wm_inst; in renoir_set_watermarks_table()
[all …]
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| /openbmc/linux/drivers/gpu/drm/amd/pm/swsmu/smu11/ |
| H A D | vangogh_ppt.c | 1623 struct pp_smu_wm_range_sets *clock_ranges) in vangogh_set_watermarks_table() argument
1629 if (!table || !clock_ranges) in vangogh_set_watermarks_table()
1632 if (clock_ranges) { in vangogh_set_watermarks_table()
1634 clock_ranges->num_writer_wm_sets > NUM_WM_RANGES) in vangogh_set_watermarks_table()
1639 clock_ranges->reader_wm_sets[i].min_drain_clk_mhz; in vangogh_set_watermarks_table()
1643 clock_ranges->reader_wm_sets[i].min_fill_clk_mhz; in vangogh_set_watermarks_table()
1645 clock_ranges->reader_wm_sets[i].max_fill_clk_mhz; in vangogh_set_watermarks_table()
1648 clock_ranges->reader_wm_sets[i].wm_inst; in vangogh_set_watermarks_table()
1653 clock_ranges->writer_wm_sets[i].min_fill_clk_mhz; in vangogh_set_watermarks_table()
1655 clock_ranges->writer_wm_sets[i].max_fill_clk_mhz; in vangogh_set_watermarks_table()
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| H A D | navi10_ppt.c | 2121 struct pp_smu_wm_range_sets *clock_ranges) in navi10_set_watermarks_table() argument
2127 if (clock_ranges) { in navi10_set_watermarks_table()
2134 clock_ranges->reader_wm_sets[i].min_drain_clk_mhz; in navi10_set_watermarks_table()
2136 clock_ranges->reader_wm_sets[i].max_drain_clk_mhz; in navi10_set_watermarks_table()
2138 clock_ranges->reader_wm_sets[i].min_fill_clk_mhz; in navi10_set_watermarks_table()
2140 clock_ranges->reader_wm_sets[i].max_fill_clk_mhz; in navi10_set_watermarks_table()
2143 clock_ranges->reader_wm_sets[i].wm_inst; in navi10_set_watermarks_table()
2148 clock_ranges->writer_wm_sets[i].min_fill_clk_mhz; in navi10_set_watermarks_table()
2150 clock_ranges->writer_wm_sets[i].max_fill_clk_mhz; in navi10_set_watermarks_table()
2152 clock_ranges->writer_wm_sets[i].min_drain_clk_mhz; in navi10_set_watermarks_table()
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| H A D | sienna_cichlid_ppt.c | 1821 struct pp_smu_wm_range_sets *clock_ranges) in sienna_cichlid_set_watermarks_table() argument
1827 if (clock_ranges) { in sienna_cichlid_set_watermarks_table()
1834 clock_ranges->reader_wm_sets[i].min_drain_clk_mhz; in sienna_cichlid_set_watermarks_table()
1836 clock_ranges->reader_wm_sets[i].max_drain_clk_mhz; in sienna_cichlid_set_watermarks_table()
1838 clock_ranges->reader_wm_sets[i].min_fill_clk_mhz; in sienna_cichlid_set_watermarks_table()
1840 clock_ranges->reader_wm_sets[i].max_fill_clk_mhz; in sienna_cichlid_set_watermarks_table()
1843 clock_ranges->reader_wm_sets[i].wm_inst; in sienna_cichlid_set_watermarks_table()
1848 clock_ranges->writer_wm_sets[i].min_fill_clk_mhz; in sienna_cichlid_set_watermarks_table()
1850 clock_ranges->writer_wm_sets[i].max_fill_clk_mhz; in sienna_cichlid_set_watermarks_table()
1852 clock_ranges->writer_wm_sets[i].min_drain_clk_mhz; in sienna_cichlid_set_watermarks_table()
[all …]
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| /openbmc/linux/drivers/gpu/drm/amd/pm/swsmu/ |
| H A D | smu_internal.h | 76 #define smu_set_watermarks_table(smu, clock_ranges) smu_ppt_funcs(set_watermarks_table, 0, smu, c… argument
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| H A D | amdgpu_smu.c | 2160 struct pp_smu_wm_range_sets *clock_ranges) in smu_set_watermarks_for_clock_ranges() argument
2170 return smu_set_watermarks_table(smu, clock_ranges); in smu_set_watermarks_for_clock_ranges()
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| /openbmc/linux/drivers/gpu/drm/amd/pm/powerplay/hwmgr/ |
| H A D | hardwaremanager.c | 467 void *clock_ranges) in phm_set_watermarks_for_clocks_ranges() argument
475 clock_ranges); in phm_set_watermarks_for_clocks_ranges()
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| H A D | smu10_hwmgr.c | 1353 void *clock_ranges) in smu10_set_watermarks_for_clocks_ranges() argument
1356 struct dm_pp_wm_sets_with_clock_ranges_soc15 *wm_with_clock_ranges = clock_ranges; in smu10_set_watermarks_for_clocks_ranges()
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| H A D | vega12_hwmgr.c | 1998 void *clock_ranges) in vega12_set_watermarks_for_clocks_ranges() argument
2002 struct dm_pp_wm_sets_with_clock_ranges_soc15 *wm_with_clock_ranges = clock_ranges; in vega12_set_watermarks_for_clocks_ranges()
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| H A D | vega20_hwmgr.c | 2938 void *clock_ranges) in vega20_set_watermarks_for_clocks_ranges() argument
2942 struct dm_pp_wm_sets_with_clock_ranges_soc15 *wm_with_clock_ranges = clock_ranges; in vega20_set_watermarks_for_clocks_ranges()
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| /openbmc/linux/drivers/gpu/drm/amd/pm/powerplay/inc/ |
| H A D | hardwaremanager.h | 456 void *clock_ranges);
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| H A D | hwmgr.h | 309 int (*set_watermarks_for_clocks_ranges)(struct pp_hwmgr *hwmgr, void *clock_ranges);
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| /openbmc/linux/drivers/gpu/drm/amd/pm/powerplay/ |
| H A D | amd_powerplay.c | 1142 void *clock_ranges) in pp_set_watermarks_for_clocks_ranges() argument
1146 if (!hwmgr || !hwmgr->pm_en || !clock_ranges) in pp_set_watermarks_for_clocks_ranges()
1150 clock_ranges); in pp_set_watermarks_for_clocks_ranges()
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| /openbmc/linux/drivers/gpu/drm/amd/pm/inc/ |
| H A D | amdgpu_dpm.h | 541 void *clock_ranges);
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| /openbmc/linux/drivers/gpu/drm/amd/include/ |
| H A D | kgd_pp_interface.h | 390 void *clock_ranges);
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| /openbmc/linux/drivers/gpu/drm/amd/pm/swsmu/inc/ |
| H A D | amdgpu_smu.h | 777 struct pp_smu_wm_range_sets *clock_ranges);
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| /openbmc/linux/drivers/gpu/drm/amd/pm/ |
| H A D | amdgpu_dpm.c | 1614 void *clock_ranges) in amdgpu_dpm_set_watermarks_for_clocks_ranges() argument
1624 clock_ranges); in amdgpu_dpm_set_watermarks_for_clocks_ranges()
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