Revision tags: v6.6.25, v6.6.24, v6.6.23, v6.6.16, v6.6.15, v6.6.14, v6.6.13, v6.6.12, v6.6.11, v6.6.10, v6.6.9, v6.6.8, v6.6.7, v6.6.6, v6.6.5, v6.6.4, v6.6.3, v6.6.2, v6.5.11, v6.6.1, v6.5.10, v6.6, v6.5.9, v6.5.8, v6.5.7, v6.5.6, v6.5.5, v6.5.4, v6.5.3, v6.5.2, v6.1.51, v6.5.1, v6.1.50, v6.5, v6.1.49, v6.1.48, v6.1.46, v6.1.45 |
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#
9366c2e8 |
| 10-Aug-2023 |
Mario Limonciello <mario.limonciello@amd.com> |
drm/amd: Rename AMDGPU_PP_SENSOR_GPU_POWER
Use the clearer name `AMDGPU_PP_SENSOR_GPU_AVG_POWER` instead.
Signed-off-by: Mario Limonciello <mario.limonciello@amd.com> Reviewed-by: Alex Deucher <ale
drm/amd: Rename AMDGPU_PP_SENSOR_GPU_POWER
Use the clearer name `AMDGPU_PP_SENSOR_GPU_AVG_POWER` instead.
Signed-off-by: Mario Limonciello <mario.limonciello@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
47f1724d |
| 10-Aug-2023 |
Mario Limonciello <mario.limonciello@amd.com> |
drm/amd: Introduce `AMDGPU_PP_SENSOR_GPU_INPUT_POWER`
Some GPUs have been overloading average power values and input power values. To disambiguate these, introduce a new `AMDGPU_PP_SENSOR_GPU_INPUT_
drm/amd: Introduce `AMDGPU_PP_SENSOR_GPU_INPUT_POWER`
Some GPUs have been overloading average power values and input power values. To disambiguate these, introduce a new `AMDGPU_PP_SENSOR_GPU_INPUT_POWER` and the GPUs that share input power update to use this instead of average power.
Link: https://gitlab.freedesktop.org/drm/amd/-/issues/2746 Signed-off-by: Mario Limonciello <mario.limonciello@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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Revision tags: v6.1.44, v6.1.43, v6.1.42, v6.1.41, v6.1.40, v6.1.39, v6.1.38, v6.1.37, v6.1.36, v6.4, v6.1.35, v6.1.34, v6.1.33, v6.1.32 |
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#
41cec40b |
| 30-May-2023 |
Wenyou Yang <WenYou.Yang@amd.com> |
drm/amd/pm: Vangogh: Add new gpu_metrics_v2_4 to acquire gpu_metrics
To acquire the voltage and current info from gpu_metrics interface, but gpu_metrics_v2_3 doesn't contain them, and to be backward
drm/amd/pm: Vangogh: Add new gpu_metrics_v2_4 to acquire gpu_metrics
To acquire the voltage and current info from gpu_metrics interface, but gpu_metrics_v2_3 doesn't contain them, and to be backward compatible, add new gpu_metrics_v2_4 structure.
Reviewed-by: Mario Limonciello <mario.limonciello@amd.com> Acked-by: Evan Quan <evan.quan@amd.com> Signed-off-by: Wenyou Yang <WenYou.Yang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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Revision tags: v6.1.31, v6.1.30, v6.1.29, v6.1.28, v6.1.27, v6.1.26, v6.3, v6.1.25, v6.1.24, v6.1.23, v6.1.22 |
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#
d7001e72 |
| 29-Mar-2023 |
Tong Liu01 <Tong.Liu01@amd.com> |
drm/amd/pm: add sysfs node vclk1 and dclk1
User can check pp_dpm_vclk1 and pp_dpm_dclk1 for DPM frequency of vcn and dcn
Signed-off-by: Tong Liu01 <Tong.Liu01@amd.com> Reviewed-by: Evan Quan <evan.
drm/amd/pm: add sysfs node vclk1 and dclk1
User can check pp_dpm_vclk1 and pp_dpm_dclk1 for DPM frequency of vcn and dcn
Signed-off-by: Tong Liu01 <Tong.Liu01@amd.com> Reviewed-by: Evan Quan <evan.quan@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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Revision tags: v6.1.21, v6.1.20, v6.1.19, v6.1.18, v6.1.17, v6.1.16, v6.1.15, v6.1.14, v6.1.13, v6.2 |
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#
31865e96 |
| 16-Feb-2023 |
Perry Yuan <perry.yuan@amd.com> |
drm/amdgpu/pm: add capped/uncapped power profile modes
Capped and uncapped workload types switching are supported on Vangogh, User can switch the power profile and check current type with below comm
drm/amdgpu/pm: add capped/uncapped power profile modes
Capped and uncapped workload types switching are supported on Vangogh, User can switch the power profile and check current type with below commands.
1) switch to capped mode: `# echo 8 > /sys/class/drm/card0/device/pp_power_profile_mode`
2) switch to uncapped mode: `# echo 9 > /sys/class/drm/card0/device/pp_power_profile_mode`
3) check current mode: $ cat /sys/class/drm/card0/device/pp_power_profile_mode 1 3D_FULL_SCREEN 3 VIDEO 4 VR 5 COMPUTE 6 CUSTOM 8 CAPPED 9 UNCAPPED*
Acked-by: Kenneth Feng <kenneth.feng@amd.com> Reviewed-by: Evan Quan <evan.quan@amd.com> Signed-off-by: Perry Yuan <perry.yuan@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
c3ed0e72 |
| 21-Feb-2023 |
Kun Liu <Kun.Liu2@amd.com> |
drm/amdgpu: added a sysfs interface for thermal throttling
added a sysfs interface for thermal throttling, then userspace can get/update thermal limit
Signed-off-by: Kun Liu <Kun.Liu2@amd.com> Revi
drm/amdgpu: added a sysfs interface for thermal throttling
added a sysfs interface for thermal throttling, then userspace can get/update thermal limit
Signed-off-by: Kun Liu <Kun.Liu2@amd.com> Reviewed-by: Evan Quan <evan.quan@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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Revision tags: v6.1.12 |
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#
230dd6bb |
| 09-Feb-2023 |
Kenneth Feng <kenneth.feng@amd.com> |
drm/amd/amdgpu: implement mode2 reset on smu_v13_0_10
implement mode2 reset on smu_v13_0_10
Signed-off-by: Kenneth Feng <kenneth.feng@amd.com> Reviewed-by: Evan Quan <evan.quan@amd.com> Signed-off-
drm/amd/amdgpu: implement mode2 reset on smu_v13_0_10
implement mode2 reset on smu_v13_0_10
Signed-off-by: Kenneth Feng <kenneth.feng@amd.com> Reviewed-by: Evan Quan <evan.quan@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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Revision tags: v6.1.11, v6.1.10, v6.1.9, v6.1.8, v6.1.7, v6.1.6, v6.1.5, v6.0.19, v6.0.18, v6.1.4, v6.1.3, v6.0.17, v6.1.2, v6.0.16, v6.1.1, v6.0.15, v6.0.14, v6.0.13, v6.1, v6.0.12 |
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#
975b4b1d |
| 04-Dec-2022 |
Evan Quan <evan.quan@amd.com> |
drm/amd/pm: fulfill swsmu peak profiling mode shader/memory clock settings
Enable peak profiling mode shader/memory clocks reporting for swsmu framework.
Signed-off-by: Evan Quan <evan.quan@amd.com
drm/amd/pm: fulfill swsmu peak profiling mode shader/memory clock settings
Enable peak profiling mode shader/memory clocks reporting for swsmu framework.
Signed-off-by: Evan Quan <evan.quan@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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Revision tags: v6.0.11, v6.0.10, v5.15.80, v6.0.9, v5.15.79, v6.0.8, v5.15.78, v6.0.7, v5.15.77 |
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#
e4d0ef75 |
| 02-Nov-2022 |
Nathan Chancellor <nathan@kernel.org> |
drm/amdgpu: Fix type of second parameter in odn_edit_dpm_table() callback
With clang's kernel control flow integrity (kCFI, CONFIG_CFI_CLANG), indirect call targets are validated against the expecte
drm/amdgpu: Fix type of second parameter in odn_edit_dpm_table() callback
With clang's kernel control flow integrity (kCFI, CONFIG_CFI_CLANG), indirect call targets are validated against the expected function pointer prototype to make sure the call target is valid to help mitigate ROP attacks. If they are not identical, there is a failure at run time, which manifests as either a kernel panic or thread getting killed. A proposed warning in clang aims to catch these at compile time, which reveals:
drivers/gpu/drm/amd/amdgpu/../pm/swsmu/amdgpu_smu.c:3008:29: error: incompatible function pointer types initializing 'int (*)(void *, uint32_t, long *, uint32_t)' (aka 'int (*)(void *, unsigned int, long *, unsigned int)') with an expression of type 'int (void *, enum PP_OD_DPM_TABLE_COMMAND, long *, uint32_t)' (aka 'int (void *, enum PP_OD_DPM_TABLE_COMMAND, long *, unsigned int)') [-Werror,-Wincompatible-function-pointer-types-strict] .odn_edit_dpm_table = smu_od_edit_dpm_table, ^~~~~~~~~~~~~~~~~~~~~ 1 error generated.
There are only two implementations of ->odn_edit_dpm_table() in 'struct amd_pm_funcs': smu_od_edit_dpm_table() and pp_odn_edit_dpm_table(). One has a second parameter type of 'enum PP_OD_DPM_TABLE_COMMAND' and the other uses 'u32'. Ultimately, smu_od_edit_dpm_table() calls ->od_edit_dpm_table() from 'struct pptable_funcs' and pp_odn_edit_dpm_table() calls ->odn_edit_dpm_table() from 'struct pp_hwmgr_func', which both have a second parameter type of 'enum PP_OD_DPM_TABLE_COMMAND'.
Update the type parameter in both the prototype in 'struct amd_pm_funcs' and pp_odn_edit_dpm_table() to 'enum PP_OD_DPM_TABLE_COMMAND', which cleans up the warning.
Link: https://github.com/ClangBuiltLinux/linux/issues/1750 Reported-by: Sami Tolvanen <samitolvanen@google.com> Reviewed-by: Kees Cook <keescook@chromium.org> Signed-off-by: Nathan Chancellor <nathan@kernel.org> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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Revision tags: v5.15.76, v6.0.6, v6.0.5, v5.15.75, v6.0.4, v6.0.3, v6.0.2, v5.15.74, v5.15.73, v6.0.1, v5.15.72, v6.0, v5.15.71, v5.15.70, v5.15.69, v5.15.68, v5.15.67, v5.15.66 |
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#
0d6516ef |
| 05-Sep-2022 |
Li Ma <li.ma@amd.com> |
drm/amd/pm:add new gpu_metrics_v2_3 to acquire average temperature info
Add new gpu_metrics_v2_3 to acquire average temperature info from SMU metrics. To acquire average temp info from gpu_metrics i
drm/amd/pm:add new gpu_metrics_v2_3 to acquire average temperature info
Add new gpu_metrics_v2_3 to acquire average temperature info from SMU metrics. To acquire average temp info from gpu_metrics interface, but gpu_metrics_v2_2 only has members to show current temp info. --- v1: Only add average_temperature_gfx in gpu_metrics_v2_3. v2: Add average temp members for soc, core and l3 in gpu_metrics_v2_3 and put these new members at the end of gpu_metrics_v2_3. Add operation to read average temp info from metrics table. v3: Merge v1 and v2 and rename the patch. v4: Merge v3. Add firmware version judgment in vangogh_common_get_gpu_metrics to maintain backward compatibility and rename the patch. "return ret" on error scenario in smu_cmn_get_smc_version.
Signed-off-by: Li Ma <li.ma@amd.com> Reviewed-by: Evan Quan <evan.quan@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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Revision tags: v5.15.65, v5.15.64, v5.15.63, v5.15.62, v5.15.61, v5.15.60, v5.15.59, v5.19, v5.15.58, v5.15.57, v5.15.56, v5.15.55, v5.15.54, v5.15.53, v5.15.52, v5.15.51, v5.15.50, v5.15.49, v5.15.48, v5.15.47, v5.15.46, v5.15.45, v5.15.44, v5.15.43, v5.15.42, v5.18, v5.15.41, v5.15.40, v5.15.39, v5.15.38, v5.15.37, v5.15.36 |
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#
334682ae |
| 21-Apr-2022 |
Kenneth Feng <kenneth.feng@amd.com> |
drm/amd/pm: enable workload type change on smu_v13_0_7
enable workload type change on smu_v13_0_7
v2: squash in out of bounds fix (Alex)
Signed-off-by: Kenneth Feng <kenneth.feng@amd.com> Reviewed
drm/amd/pm: enable workload type change on smu_v13_0_7
enable workload type change on smu_v13_0_7
v2: squash in out of bounds fix (Alex)
Signed-off-by: Kenneth Feng <kenneth.feng@amd.com> Reviewed-by: Yang Wang <kevinyang.wang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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Revision tags: v5.15.35, v5.15.34, v5.15.33, v5.15.32, v5.15.31, v5.17, v5.15.30, v5.15.29, v5.15.28, v5.15.27, v5.15.26, v5.15.25, v5.15.24, v5.15.23, v5.15.22, v5.15.21, v5.15.20, v5.15.19, v5.15.18, v5.15.17, v5.4.173, v5.15.16, v5.15.15, v5.16, v5.15.10, v5.15.9, v5.15.8, v5.15.7 |
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#
5d64f9bb |
| 03-Dec-2021 |
Darren Powell <darren.powell@amd.com> |
amdgpu/pm: Implement new API function "emit" that accepts buffer base and write offset
(v3) Rewrote patchset to order patches as (API, hw impl, usecase)
- added API for new power manag
amdgpu/pm: Implement new API function "emit" that accepts buffer base and write offset
(v3) Rewrote patchset to order patches as (API, hw impl, usecase)
- added API for new power management function emit_clk_levels This function should duplicate the functionality of print_clk_levels, but this solution passes the buffer base and write offset down the stack. - new powerplay function emit_clock_levels, implemented by smu_emit_ppclk_levels() This function parallels the implementation of smu_print_ppclk_levels and calls emit_clk_levels, and allows the returns of errors - new helper function smu_convert_to_smuclk called by smu_print_ppclk_levels and smu_emit_ppclk_levels
Signed-off-by: Darren Powell <darren.powell@amd.com> Reviewed-By: Evan Quan <evan.quan@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
685fae24 |
| 11-Jan-2022 |
Evan Quan <evan.quan@amd.com> |
drm/amd/pm: correct the checks for fan attributes support
On functionality unsupported, -EOPNOTSUPP will be returned. And we rely on that to determine the fan attributes support.
Fixes: 79c65f3fcbb
drm/amd/pm: correct the checks for fan attributes support
On functionality unsupported, -EOPNOTSUPP will be returned. And we rely on that to determine the fan attributes support.
Fixes: 79c65f3fcbb128 ("drm/amd/pm: do not expose power implementation details to amdgpu_pm.c")
Signed-off-by: Evan Quan <evan.quan@amd.com> Reviewed-by: Lijo Lazar <lijo.lazar@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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Revision tags: v5.15.6, v5.15.5 |
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#
ebfc2533 |
| 21-Nov-2021 |
Evan Quan <evan.quan@amd.com> |
drm/amd/pm: do not expose the smu_context structure used internally in power
This can cover the power implementation details. And as what did for powerplay framework, we hook the smu_context to adev
drm/amd/pm: do not expose the smu_context structure used internally in power
This can cover the power implementation details. And as what did for powerplay framework, we hook the smu_context to adev->powerplay.pp_handle.
Signed-off-by: Evan Quan <evan.quan@amd.com> Reviewed-by: Lijo Lazar <lijo.lazar@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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Revision tags: v5.15.4, v5.15.3 |
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#
6ddbd37f |
| 16-Nov-2021 |
Evan Quan <evan.quan@amd.com> |
drm/amd/pm: optimize the amdgpu_pm_compute_clocks() implementations
Drop cross callings and multi-function APIs. Also avoid exposing internal implementations details.
Signed-off-by: Evan Quan <evan
drm/amd/pm: optimize the amdgpu_pm_compute_clocks() implementations
Drop cross callings and multi-function APIs. Also avoid exposing internal implementations details.
Signed-off-by: Evan Quan <evan.quan@amd.com> Reviewed-by: Lijo Lazar <lijo.lazar@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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Revision tags: v5.15.2 |
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#
84176663 |
| 11-Nov-2021 |
Evan Quan <evan.quan@amd.com> |
drm/amd/pm: create a new holder for those APIs used only by legacy ASICs(si/kv)
Those APIs are used only by legacy ASICs(si/kv). They cannot be shared by other ASICs. So, we create a new holder for
drm/amd/pm: create a new holder for those APIs used only by legacy ASICs(si/kv)
Those APIs are used only by legacy ASICs(si/kv). They cannot be shared by other ASICs. So, we create a new holder for them.
Signed-off-by: Evan Quan <evan.quan@amd.com> Reviewed-by: Lijo Lazar <lijo.lazar@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
bc143d8b |
| 21-Nov-2021 |
Evan Quan <evan.quan@amd.com> |
drm/amd/pm: do not expose implementation details to other blocks out of power
Those implementation details(whether swsmu supported, some ppt_funcs supported, accessing internal statistics ...)should
drm/amd/pm: do not expose implementation details to other blocks out of power
Those implementation details(whether swsmu supported, some ppt_funcs supported, accessing internal statistics ...)should be kept internally. It's not a good practice and even error prone to expose implementation details.
Signed-off-by: Evan Quan <evan.quan@amd.com> Reviewed-by: Lijo Lazar <lijo.lazar@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
3867e370 |
| 22-Nov-2021 |
Darren Powell <darren.powell@amd.com> |
amdgpu/pm: Create shared array of power profile name strings
== Description == All the power profile modes use the same strings (or a subset of) Creating a public array of the strings will allow
amdgpu/pm: Create shared array of power profile name strings
== Description == All the power profile modes use the same strings (or a subset of) Creating a public array of the strings will allow sharing rather than duplicating for each chip First patch only implements change for navi10, followup with other chips
== Changes == Create a declaration of the public array in kgd_pp_interface.h Define the public array in amdgpu_pm.c Modify the implementaiton of navi10_get_power_profile_mode to use new array
== Test == LOGFILE=pp_profile_strings.test.log AMDGPU_PCI_ADDR=`lspci -nn | grep "VGA\|Display" | cut -d " " -f 1` AMDGPU_HWMON=`ls -la /sys/class/hwmon | grep $AMDGPU_PCI_ADDR | awk '{print $9}'` HWMON_DIR=/sys/class/hwmon/${AMDGPU_HWMON}
lspci -nn | grep "VGA\|Display" > $LOGFILE FILES="pp_power_profile_mode "
for f in $FILES do echo === $f === >> $LOGFILE cat $HWMON_DIR/device/$f >> $LOGFILE done cat $LOGFILE
Signed-off-by: Darren Powell <darren.powell@amd.com> Reviewed-by: Lijo Lazar <lijo.lazar@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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Revision tags: v5.15.1, v5.15, v5.14.14, v5.14.13, v5.14.12, v5.14.11, v5.14.10, v5.14.9, v5.14.8, v5.14.7, v5.14.6, v5.10.67, v5.10.66, v5.14.5, v5.14.4, v5.10.65, v5.14.3, v5.10.64, v5.14.2, v5.10.63, v5.14.1, v5.10.62, v5.14, v5.10.61, v5.10.60, v5.10.53, v5.10.52, v5.10.51, v5.10.50, v5.10.49, v5.13, v5.10.46, v5.10.43, v5.10.42, v5.10.41, v5.10.40, v5.10.39, v5.4.119, v5.10.36, v5.10.35, v5.10.34, v5.4.116, v5.10.33, v5.12, v5.10.32, v5.10.31, v5.10.30, v5.10.27, v5.10.26, v5.10.25, v5.10.24, v5.10.23, v5.10.22, v5.10.21, v5.10.20, v5.10.19, v5.4.101, v5.10.18, v5.10.17, v5.11, v5.10.16, v5.10.15 |
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#
0d8318e1 |
| 09-Feb-2021 |
Evan Quan <evan.quan@amd.com> |
drm/amd/pm: drop the unnecessary intermediate percent-based transition
Currently, the readout of fan speed pwm is transited into percent-based and then pwm-based. However, the transition into percen
drm/amd/pm: drop the unnecessary intermediate percent-based transition
Currently, the readout of fan speed pwm is transited into percent-based and then pwm-based. However, the transition into percent-based is totally unnecessary and make the final output less accurate.
Signed-off-by: Evan Quan <evan.quan@amd.com> Reviewed-by: Lijo Lazar <lijo.lazar@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
22a7dcf5 |
| 03-Jun-2021 |
Graham Sider <Graham.Sider@amd.com> |
drm/amd/pm: Add u64 throttler status field to gpu_metrics
This patch set adds support for a new ASIC independant u64 throttler status field (indep_throttle_status). Piggybacks off the gpu_metrics_v1
drm/amd/pm: Add u64 throttler status field to gpu_metrics
This patch set adds support for a new ASIC independant u64 throttler status field (indep_throttle_status). Piggybacks off the gpu_metrics_v1_3 bump and similarly bumps gpu_metrics_v2 version (to v2_2) to add field.
Signed-off-by: Graham Sider <Graham.Sider@amd.com> Reviewed-by: Evan Quan <evan.quan@amd.com> Reviewed-by: Lijo Lazar <lijo.lazar@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
90a681c5 |
| 26-May-2021 |
Darren Powell <darren.powell@amd.com> |
amdgpu/pm: add kernel documentation for smu_get_power_limit
added doc tag "amdgpu_pp_power" with description added tags for enums pp_power_limit_level, pp_power_type added tag for function smu_g
amdgpu/pm: add kernel documentation for smu_get_power_limit
added doc tag "amdgpu_pp_power" with description added tags for enums pp_power_limit_level, pp_power_type added tag for function smu_get_power_limit
Test: * Temporary insertion into Documentation/gpu/amdgpu.rst ------------START------------ Power Limit ----------- .. kernel-doc:: drivers/gpu/drm/amd/include/kgd_pp_interface.h :doc: amdgpu_pp_power
.. kernel-doc:: drivers/gpu/drm/amd/include/kgd_pp_interface.h :identifiers: pp_power_limit_level
.. kernel-doc:: drivers/gpu/drm/amd/include/kgd_pp_interface.h :identifiers: pp_power_type
.. kernel-doc:: drivers/gpu/drm/amd/pm/swsmu/amdgpu_smu.c :identifiers: smu_get_power_limit -------------END-------------
Signed-off-by: Darren Powell <darren.powell@amd.com> Reviewed-by: Lijo Lazar <lijo.lazar@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
04bec521 |
| 21-May-2021 |
Darren Powell <darren.powell@amd.com> |
amdgpu/pm: modify Powerplay API get_power_limit to use new pp_power enums
updated {amd_pm_funcs}->get_power_limit() signature rewrote pp_get_power_limit to use new enums pp_get_power_limit now re
amdgpu/pm: modify Powerplay API get_power_limit to use new pp_power enums
updated {amd_pm_funcs}->get_power_limit() signature rewrote pp_get_power_limit to use new enums pp_get_power_limit now returns -EOPNOTSUPP for unknown power limit update calls to {amd_pm_funcs}->get_power_limit()
* Test Notes * testing hardware was NAVI10 (tests SMU path) ** needs testing on VANGOGH ** needs testing on SMU < 11 ** ie, one of TOPAZ, FIJI, TONGA, POLARIS10, POLARIS11, POLARIS12, VEGAM, CARRIZO, STONEY, VEGA10, VEGA12,VEGA20, RAVEN, BONAIRE, HAWAII
* Test AMDGPU_PCI_ADDR=`lspci -nn | grep "VGA\|Display" | cut -d " " -f 1` AMDGPU_HWMON=`ls -la /sys/class/hwmon | grep $AMDGPU_PCI_ADDR | cut -d " " -f 11` HWMON_DIR=/sys/class/hwmon/${AMDGPU_HWMON}
lspci -nn | grep "VGA\|Display" ; \ echo "=== power1 cap ===" ; cat $HWMON_DIR/power1_cap ; \ echo "=== power1 cap max ===" ; cat $HWMON_DIR/power1_cap_max ; \ echo "=== power1 cap def ===" ; cat $HWMON_DIR/power1_cap_default
Signed-off-by: Darren Powell <darren.powell@amd.com> Reviewed-by: Lijo Lazar <lijo.lazar@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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a40a020d |
| 21-May-2021 |
Darren Powell <darren.powell@amd.com> |
amdgpu/pm: clean up smu_get_power_limit function signature
add two new powerplay enums (limit_level, type) add enums to smu_get_power_limit signature remove input bitfield stuffing of output vari
amdgpu/pm: clean up smu_get_power_limit function signature
add two new powerplay enums (limit_level, type) add enums to smu_get_power_limit signature remove input bitfield stuffing of output variable limit update calls to smu_get_power_limit
* Test AMDGPU_PCI_ADDR=`lspci -nn | grep "VGA\|Display" | cut -d " " -f 1` AMDGPU_HWMON=`ls -la /sys/class/hwmon | grep $AMDGPU_PCI_ADDR | cut -d " " -f 11` HWMON_DIR=/sys/class/hwmon/${AMDGPU_HWMON}
lspci -nn | grep "VGA\|Display" ; \ echo "=== power1 cap ===" ; cat $HWMON_DIR/power1_cap ; \ echo "=== power1 cap max ===" ; cat $HWMON_DIR/power1_cap_max ; \ echo "=== power1 cap def ===" ; cat $HWMON_DIR/power1_cap_default
Signed-off-by: Darren Powell <darren.powell@amd.com> Reviewed-by: Lijo Lazar <lijo.lazar@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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a7673a1c |
| 29-May-2021 |
Sathishkumar S <sathishkumar.sundararaju@amd.com> |
drm/amd/pm: sysfs attrs to read ss powershare (v6)
add sysfs attrs to read smartshift APU and DGPU power share. document the sysfs device attributes.
V2: change variable/macro name for stapm power
drm/amd/pm: sysfs attrs to read ss powershare (v6)
add sysfs attrs to read smartshift APU and DGPU power share. document the sysfs device attributes.
V2: change variable/macro name for stapm power limit (Lijo) V3: files to be exposed as sysfs device attributes (Alex) V4: check ret value of sysfs create and remove only if created. V5: add ss attrs in amdgpu_device_attrs and use attr_update (Lijo) V6: all checks for ss support to be in if else if statements. (Lijo)
Signed-off-by: Sathishkumar S <sathishkumar.sundararaju@amd.com> Reviewed-by: Lijo Lazar <lijo.lazar@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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0b7db431 |
| 14-May-2021 |
David M Nieto <david.nieto@amd.com> |
drm/amdgpu/pm: Update metrics table (v2)
v2: removed static dpm and frequency ranges from table
expand metrics table with voltages and frequency ranges
Signed-off-by: David M Nieto <david.nieto@am
drm/amdgpu/pm: Update metrics table (v2)
v2: removed static dpm and frequency ranges from table
expand metrics table with voltages and frequency ranges
Signed-off-by: David M Nieto <david.nieto@amd.com> Reviewed-by: Lijo Lazar <lijo.lazar@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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