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Searched refs:__phy_write (Results 1 – 17 of 17) sorted by relevance

/openbmc/linux/drivers/net/phy/
H A Dmediatek-ge-soc.c322 return __phy_write(phydev, MTK_EXT_PAGE_ACCESS, page); in mtk_socphy_write_page()
718 __phy_write(phydev, 0x11, 0xc71); in mt798x_phy_common_finetune()
719 __phy_write(phydev, 0x12, 0xc); in mt798x_phy_common_finetune()
720 __phy_write(phydev, 0x10, 0x8fae); in mt798x_phy_common_finetune()
723 __phy_write(phydev, 0x11, 0x2f00); in mt798x_phy_common_finetune()
724 __phy_write(phydev, 0x12, 0xe); in mt798x_phy_common_finetune()
725 __phy_write(phydev, 0x10, 0x8fb0); in mt798x_phy_common_finetune()
728 __phy_write(phydev, 0x11, 0x55a0); in mt798x_phy_common_finetune()
729 __phy_write(phydev, 0x12, 0x0); in mt798x_phy_common_finetune()
730 __phy_write(phydev, 0x10, 0x83aa); in mt798x_phy_common_finetune()
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H A Dmediatek-ge.c21 return __phy_write(phydev, MTK_EXT_PAGE_ACCESS, page); in mtk_gephy_write_page()
34 __phy_write(phydev, 0x10, 0xafae); in mtk_gephy_config_init()
35 __phy_write(phydev, 0x12, 0x2f); in mtk_gephy_config_init()
36 __phy_write(phydev, 0x10, 0x8fae); in mtk_gephy_config_init()
H A Dbcm-phy-lib.c25 rc = __phy_write(phydev, MII_BCM54XX_EXP_SEL, reg); in __bcm_phy_write_exp()
29 return __phy_write(phydev, MII_BCM54XX_EXP_DATA, val); in __bcm_phy_write_exp()
49 val = __phy_write(phydev, MII_BCM54XX_EXP_SEL, reg); in __bcm_phy_read_exp()
56 __phy_write(phydev, MII_BCM54XX_EXP_SEL, 0); in __bcm_phy_read_exp()
78 ret = __phy_write(phydev, MII_BCM54XX_EXP_SEL, reg); in __bcm_phy_modify_exp()
90 return __phy_write(phydev, MII_BCM54XX_EXP_DATA, new); in __bcm_phy_modify_exp()
263 val = __phy_write(phydev, MII_BCM54XX_RDB_ADDR, rdb); in __bcm_phy_read_rdb()
287 ret = __phy_write(phydev, MII_BCM54XX_RDB_ADDR, rdb); in __bcm_phy_write_rdb()
291 return __phy_write(phydev, MII_BCM54XX_RDB_DATA, val); in __bcm_phy_write_rdb()
311 ret = __phy_write(phydev, MII_BCM54XX_RDB_ADDR, rdb); in __bcm_phy_modify_rdb()
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H A Dmicrochip.c31 return __phy_write(phydev, LAN88XX_EXT_PAGE_ACCESS, page); in lan88xx_write_page()
102 ret = __phy_write(phydev, LAN88XX_EXT_PAGE_TR_LOW_DATA, in lan88xx_TR_reg_set()
109 ret = __phy_write(phydev, LAN88XX_EXT_PAGE_TR_HIGH_DATA, in lan88xx_TR_reg_set()
120 ret = __phy_write(phydev, LAN88XX_EXT_PAGE_TR_CR, buf); in lan88xx_TR_reg_set()
H A Dbcm7xxx.c235 ret = __phy_write(dev, location, v); in __phy_set_clr_bits()
645 ret = __phy_write(phydev, MII_BCM7XXX_SHD_2_ADDR_CTRL, shd); in bcm7xxx_28nm_ephy_read_mmd()
675 ret = __phy_write(phydev, MII_BCM7XXX_SHD_2_ADDR_CTRL, shd); in bcm7xxx_28nm_ephy_write_mmd()
680 __phy_write(phydev, MII_BCM7XXX_SHD_2_CTRL_STAT, val); in bcm7xxx_28nm_ephy_write_mmd()
H A Dmotorcomm.c310 ret = __phy_write(phydev, YTPHY_PAGE_SELECT, regnum); in ytphy_read_ext()
349 ret = __phy_write(phydev, YTPHY_PAGE_SELECT, regnum); in ytphy_write_ext()
353 return __phy_write(phydev, YTPHY_PAGE_DATA, val); in ytphy_write_ext()
394 ret = __phy_write(phydev, YTPHY_PAGE_SELECT, regnum); in ytphy_modify_ext()
593 return __phy_write(phydev, YT8511_PAGE_SELECT, page); in yt8511_write_page()
638 ret = __phy_write(phydev, YT8511_PAGE_SELECT, YT8511_EXT_DELAY_DRIVE); in yt8511_config_init()
647 ret = __phy_write(phydev, YT8511_PAGE_SELECT, YT8511_EXT_SLEEP_CTRL); in yt8511_config_init()
H A Dmarvell.c322 return __phy_write(phydev, MII_MARVELL_PHY_PAGE, page); in marvell_write_page()
532 ret = __phy_write(phydev, reg, val); in marvell_of_reg_init()
1881 err = __phy_write(phydev, MII_88E1318S_PHY_MAGIC_PACKET_WORD2, in m88e1318_set_wol()
1886 err = __phy_write(phydev, MII_88E1318S_PHY_MAGIC_PACKET_WORD1, in m88e1318_set_wol()
1891 err = __phy_write(phydev, MII_88E1318S_PHY_MAGIC_PACKET_WORD0, in m88e1318_set_wol()
2098 err = __phy_write(phydev, MII_VCT5_SAMPLE_POINT_DISTANCE, in marvell_vct5_amplitude_distance()
2108 err = __phy_write(phydev, MII_VCT5_CTRL, reg); in marvell_vct5_amplitude_distance()
2174 err = __phy_write(phydev, MII_VCT5_TX_PULSE_CTRL, reg); in marvell_vct5_amplitude_graph()
2449 ret = __phy_write(phydev, MII_88E1121_MISC_TEST, in m88e1121_get_temp()
2464 ret = __phy_write(phydev, MII_88E1121_MISC_TEST, in m88e1121_get_temp()
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H A Drealtek.c94 return __phy_write(phydev, RTL821x_PAGE_SELECT, page); in rtl821x_write_page()
501 ret = __phy_write(phydev, RTL821x_EXT_PAGE_SELECT, 0xa4); in rtl8211e_config_init()
620 ret = __phy_write(phydev, 0x10, val); in rtlgen_write_mmd()
663 ret = __phy_write(phydev, 0x12, val); in rtl822x_write_mmd()
H A Dvitesse.c128 return __phy_write(phydev, VSC73XX_EXT_PAGE_ACCESS, page); in vsc73xx_write_page()
H A Dicplus.c478 return __phy_write(phydev, IP101G_PAGE_CONTROL, page); in ip101g_write_page()
H A Dmicrel.c2368 __phy_write(phydev, LAN_EXT_PAGE_ACCESS_CONTROL, page); in lanphy_read_page_reg()
2369 __phy_write(phydev, LAN_EXT_PAGE_ACCESS_ADDRESS_DATA, addr); in lanphy_read_page_reg()
2370 __phy_write(phydev, LAN_EXT_PAGE_ACCESS_CONTROL, in lanphy_read_page_reg()
2382 __phy_write(phydev, LAN_EXT_PAGE_ACCESS_CONTROL, page); in lanphy_write_page_reg()
2383 __phy_write(phydev, LAN_EXT_PAGE_ACCESS_ADDRESS_DATA, addr); in lanphy_write_page_reg()
2384 __phy_write(phydev, LAN_EXT_PAGE_ACCESS_CONTROL, in lanphy_write_page_reg()
2387 val = __phy_write(phydev, LAN_EXT_PAGE_ACCESS_ADDRESS_DATA, val); in lanphy_write_page_reg()
H A Dphy-core.c967 ret = __phy_write(phydev, regnum, val); in phy_write_paged()
/openbmc/linux/drivers/power/reset/
H A Dlinkstation-poweroff.c65 __phy_write(phydev, MII_MARVELL_PHY_PAGE, MII_MARVELL_COPPER_PAGE); in linkstation_mvphy_reg_intn()
72 __phy_write(phydev, MII_MARVELL_PHY_PAGE, MII_MARVELL_WOL_PAGE); in linkstation_mvphy_reg_intn()
103 __phy_write(phydev, MII_MARVELL_PHY_PAGE, MII_MARVELL_WOL_PAGE); in readynas_mvphy_set_reg()
/openbmc/linux/drivers/net/phy/mscc/
H A Dmscc_main.c120 return __phy_write(phydev, MSCC_EXT_PAGE_ACCESS, page); in vsc85xx_phy_write_page()
295 __phy_write(phydev, MSCC_PHY_WOL_LOWER_MAC_ADDR, pwd[0]); in vsc85xx_wol_set()
296 __phy_write(phydev, MSCC_PHY_WOL_MID_MAC_ADDR, pwd[1]); in vsc85xx_wol_set()
297 __phy_write(phydev, MSCC_PHY_WOL_UPPER_MAC_ADDR, pwd[2]); in vsc85xx_wol_set()
299 __phy_write(phydev, MSCC_PHY_WOL_LOWER_MAC_ADDR, 0); in vsc85xx_wol_set()
300 __phy_write(phydev, MSCC_PHY_WOL_MID_MAC_ADDR, 0); in vsc85xx_wol_set()
301 __phy_write(phydev, MSCC_PHY_WOL_UPPER_MAC_ADDR, 0); in vsc85xx_wol_set()
308 __phy_write(phydev, MSCC_PHY_WOL_LOWER_PASSWD, pwd[0]); in vsc85xx_wol_set()
309 __phy_write(phydev, MSCC_PHY_WOL_MID_PASSWD, pwd[1]); in vsc85xx_wol_set()
310 __phy_write(phydev, MSCC_PHY_WOL_UPPER_PASSWD, pwd[2]); in vsc85xx_wol_set()
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H A Dmscc_macsec.c33 __phy_write(phydev, MSCC_EXT_PAGE_MACSEC_20, in vsc8584_macsec_phy_read()
42 __phy_write(phydev, MSCC_EXT_PAGE_MACSEC_19, in vsc8584_macsec_phy_read()
71 __phy_write(phydev, MSCC_EXT_PAGE_MACSEC_20, in vsc8584_macsec_phy_write()
80 __phy_write(phydev, MSCC_EXT_PAGE_MACSEC_17, (u16)val); in vsc8584_macsec_phy_write()
81 __phy_write(phydev, MSCC_EXT_PAGE_MACSEC_18, (u16)(val >> 16)); in vsc8584_macsec_phy_write()
83 __phy_write(phydev, MSCC_EXT_PAGE_MACSEC_19, in vsc8584_macsec_phy_write()
/openbmc/linux/drivers/net/ethernet/realtek/
H A Dr8169_phy_config.c25 __phy_write(phydev, 0x1e, extpage); in r8168d_modify_extpage()
36 __phy_write(phydev, 0x05, parm); in r8168d_phy_param()
47 __phy_write(phydev, 0x13, parm); in r8168g_phy_param()
64 __phy_write(phydev, regs->reg, regs->val); in __rtl_writephy_batch()
/openbmc/linux/include/linux/
H A Dphy.h1293 static inline int __phy_write(struct phy_device *phydev, u32 regnum, u16 val) in __phy_write() function