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/openbmc/linux/Documentation/devicetree/bindings/thermal/
H A Dqoriq-thermal.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/thermal/qoriq-thermal.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Thermal Monitoring Unit (TMU) on Freescale QorIQ SoCs
10 - Anson Huang <Anson.Huang@nxp.com>
15 The version of the device is determined by the TMU IP Block Revision
19 ---------- -----
22 - fsl,qoriq-tmu
23 - fsl,imx8mq-tmu
[all …]
/openbmc/u-boot/drivers/power/
H A Dexynos-tmu.c6 * EXYNOS - Thermal Management Unit
17 * MA 02111-1307 USA
23 #include <tmu.h>
24 #include <asm/arch/tmu.h>
52 /* minimum value in temperature code range */
54 /* maximum value in temperature code range */
64 /* Pre-defined values and thresholds for calibration of current temperature */
66 /* pre-defined temperature thresholds */
68 /* pre-defined efuse range minimum value */
70 /* pre-defined efuse value for temperature calibration */
[all …]
/openbmc/linux/drivers/thermal/
H A Dqoriq_thermal.c1 // SPDX-License-Identifier: GPL-2.0
54 #define REGS_V2_TMSAR(n) (0x304 + 16 * (n)) /* TMU monitoring
57 #define REGS_TTRnCR(n) (0xf10 + 4 * (n)) /* Temperature Range n
85 return container_of(s, struct qoriq_tmu_data, sensor[s->id]); in qoriq_sensor_to_data()
96 * For TMU Rev1: in tmu_get_temp()
101 * within sensor range. TEMP is an 8 bit value representing in tmu_get_temp()
104 * For TMU Rev2: in tmu_get_temp()
109 * within sensor range. TEMP is an 9 bit value representing in tmu_get_temp()
113 regmap_read(qdata->regmap, REGS_TMR, &val); in tmu_get_temp()
115 return -EAGAIN; in tmu_get_temp()
[all …]
H A DKconfig1 # SPDX-License-Identifier: GPL-2.0-only
37 int "Emergency poweroff delay in milli-seconds"
144 bool "Fair-share thermal governor"
146 Enable this to manage platform thermals using fair-share governor.
240 memory-mapped reads to get the temperature. Any HW/System that
241 allows temperature reading by a single memory-mapped reading, be it
284 Support for Thermal Monitoring Unit (TMU) found on Freescale i.MX8MM SoC.
295 - AM654
315 Support for Thermal Monitoring Unit (TMU) found on QorIQ platforms.
341 module will be called sun8i-thermal.
[all …]
/openbmc/linux/arch/powerpc/boot/dts/fsl/
H A Dt1023si-post.dtsi35 #include <dt-bindings/thermal/thermal.h>
38 compatible = "fsl,bman-fbpr";
39 alloc-ranges = <0 0 0x10000 0>;
43 compatible = "fsl,qman-fqd";
44 alloc-ranges = <0 0 0x10000 0>;
48 compatible = "fsl,qman-pfdr";
49 alloc-ranges = <0 0 0x10000 0>;
53 #address-cells = <2>;
54 #size-cells = <1>;
55 compatible = "fsl,ifc", "simple-bus";
[all …]
H A Dt1040si-post.dtsi4 * Copyright 2013 - 2014 Freescale Semiconductor Inc.
35 #include <dt-bindings/thermal/thermal.h>
38 compatible = "fsl,bman-fbpr";
39 alloc-ranges = <0 0 0x10000 0>;
43 compatible = "fsl,qman-fqd";
44 alloc-ranges = <0 0 0x10000 0>;
48 compatible = "fsl,qman-pfdr";
49 alloc-ranges = <0 0 0x10000 0>;
53 #address-cells = <2>;
54 #size-cells = <1>;
[all …]
/openbmc/linux/arch/arm64/boot/dts/freescale/
H A Dfsl-ls1046a.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
3 * Device Tree Include file for NXP Layerscape-1046A family SoC.
11 #include <dt-bindings/clock/fsl,qoriq-clockgen.h>
12 #include <dt-bindings/interrupt-controller/arm-gic.h>
13 #include <dt-bindings/thermal/thermal.h>
14 #include <dt-bindings/gpio/gpio.h>
18 interrupt-parent = <&gic>;
19 #address-cells = <2>;
20 #size-cells = <2>;
37 #address-cells = <1>;
[all …]
H A Dfsl-ls208xa.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
3 * Device Tree Include file for Freescale Layerscape-2080A family SoC.
6 * Copyright 2017-2020 NXP
12 #include <dt-bindings/clock/fsl,qoriq-clockgen.h>
13 #include <dt-bindings/thermal/thermal.h>
14 #include <dt-bindings/interrupt-controller/arm-gic.h>
18 interrupt-parent = <&gic>;
19 #address-cells = <2>;
20 #size-cells = <2>;
32 #address-cells = <1>;
[all …]
H A Dfsl-ls1043a.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
3 * Device Tree Include file for NXP Layerscape-1043A family SoC.
5 * Copyright 2014-2015 Freescale Semiconductor, Inc.
11 #include <dt-bindings/clock/fsl,qoriq-clockgen.h>
12 #include <dt-bindings/thermal/thermal.h>
13 #include <dt-bindings/interrupt-controller/arm-gic.h>
14 #include <dt-bindings/gpio/gpio.h>
18 interrupt-parent = <&gic>;
19 #address-cells = <2>;
20 #size-cells = <2>;
[all …]
H A Dfsl-ls1012a.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
3 * Device Tree Include file for NXP Layerscape-1012A family SoC.
6 * Copyright 2019-2020 NXP
10 #include <dt-bindings/clock/fsl,qoriq-clockgen.h>
11 #include <dt-bindings/interrupt-controller/arm-gic.h>
12 #include <dt-bindings/thermal/thermal.h>
16 interrupt-parent = <&gic>;
17 #address-cells = <2>;
18 #size-cells = <2>;
23 rtic-a = &rtic_a;
[all …]
H A Dfsl-lx2160a.dtsi1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
3 // Device Tree Include file for Layerscape-LX2160A family SoC.
5 // Copyright 2018-2020 NXP
7 #include <dt-bindings/clock/fsl,qoriq-clockgen.h>
8 #include <dt-bindings/gpio/gpio.h>
9 #include <dt-bindings/interrupt-controller/arm-gic.h>
10 #include <dt-bindings/thermal/thermal.h>
16 interrupt-parent = <&gic>;
17 #address-cells = <2>;
18 #size-cells = <2>;
[all …]
H A Dfsl-ls1088a.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
3 * Device Tree Include file for NXP Layerscape-1088A family SoC.
5 * Copyright 2017-2020 NXP
10 #include <dt-bindings/clock/fsl,qoriq-clockgen.h>
11 #include <dt-bindings/interrupt-controller/arm-gic.h>
12 #include <dt-bindings/thermal/thermal.h>
16 interrupt-parent = <&gic>;
17 #address-cells = <2>;
18 #size-cells = <2>;
26 #address-cells = <1>;
[all …]
H A Dfsl-ls1028a.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
3 * Device Tree Include file for NXP Layerscape-1028A family SoC.
5 * Copyright 2018-2020 NXP
11 #include <dt-bindings/clock/fsl,qoriq-clockgen.h>
12 #include <dt-bindings/interrupt-controller/arm-gic.h>
13 #include <dt-bindings/thermal/thermal.h>
17 interrupt-parent = <&gic>;
18 #address-cells = <2>;
19 #size-cells = <2>;
22 #address-cells = <1>;
[all …]
H A Dimx93.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
6 #include <dt-bindings/clock/imx93-clock.h>
7 #include <dt-bindings/gpio/gpio.h>
8 #include <dt-bindings/input/input.h>
9 #include <dt-bindings/interrupt-controller/arm-gic.h>
10 #include <dt-bindings/power/fsl,imx93-power.h>
11 #include <dt-bindings/thermal/thermal.h>
13 #include "imx93-pinfunc.h"
16 interrupt-parent = <&gic>;
17 #address-cells = <2>;
[all …]
H A Dimx8mq.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
4 * Copyright (C) 2017-2018 Pengutronix, Lucas Stach <kernel@pengutronix.de>
7 #include <dt-bindings/clock/imx8mq-clock.h>
8 #include <dt-bindings/power/imx8mq-power.h>
9 #include <dt-bindings/reset/imx8mq-reset.h>
10 #include <dt-bindings/gpio/gpio.h>
11 #include "dt-bindings/input/input.h"
12 #include <dt-bindings/interrupt-controller/arm-gic.h>
13 #include <dt-bindings/thermal/thermal.h>
14 #include <dt-bindings/interconnect/imx8mq.h>
[all …]
/openbmc/linux/drivers/thermal/samsung/
H A Dexynos_tmu.c1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * exynos_tmu.c - Samsung Exynos TMU (Thermal Management Unit)
25 #include <dt-bindings/thermal/thermal_exynos.h>
139 * struct exynos_tmu_data : A structure to hold the private data of the TMU
141 * @id: identifier of the one instance of the TMU controller.
142 * @base: base address of the single instance of the TMU controller.
143 * @base_second: base address of the common registers of the TMU controller.
144 * @irq: irq number of the TMU controller.
150 * @sclk: pointer to the clock structure for accessing the tmu special clk.
157 * @gain: gain of amplifier in the positive-TC generator block
[all …]
/openbmc/u-boot/arch/arm/dts/
H A Dfsl-imx8mq.dtsi16 #include "fsl-imx8-ca53.dtsi"
17 #include <dt-bindings/clock/imx8mq-clock.h>
18 #include <dt-bindings/gpio/gpio.h>
19 #include <dt-bindings/input/input.h>
20 #include <dt-bindings/interrupt-controller/arm-gic.h>
21 #include <dt-bindings/pinctrl/pins-imx8mq.h>
22 #include <dt-bindings/thermal/thermal.h>
26 interrupt-parent = <&gpc>;
27 #address-cells = <2>;
28 #size-cells = <2>;
[all …]
H A Dexynos5420-smdk5420.dts1 // SPDX-License-Identifier: GPL-2.0+
9 /dts-v1/;
17 hwid = "smdk5420 TEST A-A 9382";
25 tmu@10060000 {
26 samsung,min-temp = <25>;
27 samsung,max-temp = <125>;
28 samsung,start-warning = <95>;
29 samsung,start-tripping = <105>;
30 samsung,hw-tripping = <110>;
31 samsung,efuse-min-value = <40>;
[all …]
H A Dexynos5800-peach-pi.dts1 // SPDX-License-Identifier: GPL-2.0+
3 * SAMSUNG/GOOGLE Peach-Pit board device tree source
9 /dts-v1/;
14 cpu-model = "Exynos5800";
16 compatible = "google,pit-rev#", "google,pit",
20 google,bad-wake-gpios = <&gpx0 6 GPIO_ACTIVE_HIGH>;
21 hwid = "PIT TEST A-A 7848";
22 lazy-init = <1>;
33 compatible = "pwm-backlight";
35 brightness-levels = <0 100 500 1000 1500 2000 2500 2800>;
[all …]
H A Dexynos5250-smdk5250.dts12 /dts-v1/;
14 #include <dt-bindings/interrupt-controller/irq.h>
45 srom-timing = <1 9 12 1 6 1 1>;
50 phy-mode = "mii";
55 samsung,codec-type = "wm8994";
65 u-boot,i2c-offset-len = <2>;
67 #sound-dai-cells = <1>;
72 compatible = "google,smdk5250-audio-wm8994";
74 samsung,model = "SMDK5250-I2S-WM8994";
75 samsung,audio-codec = <&wm8994>;
[all …]
/openbmc/linux/arch/arm/boot/dts/nxp/ls/
H A Dls1021a.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
3 * Copyright 2013-2014 Freescale Semiconductor, Inc.
6 #include <dt-bindings/interrupt-controller/arm-gic.h>
7 #include <dt-bindings/thermal/thermal.h>
10 #address-cells = <2>;
11 #size-cells = <2>;
12 interrupt-parent = <&gic>;
30 #address-cells = <1>;
31 #size-cells = <0>;
34 compatible = "arm,cortex-a7";
[all …]
/openbmc/u-boot/drivers/net/pfe_eth/
H A Dpfe_hw.c1 // SPDX-License-Identifier: GPL-2.0+
3 * Copyright 2015-2016 Freescale Semiconductor, Inc.
35 (u32)TMU_DMEM_BASE_ADDR(pfe_pe_id - TMU0_ID); in pfe_lib_init()
37 (u32)TMU_IMEM_BASE_ADDR(pfe_pe_id - TMU0_ID); in pfe_lib_init()
118 - 1)) | PE_MEM_ACCESS_IMEM, src, len); in pe_pmem_memcpy_to32()
134 u32 mask = 0xffffffff >> ((4 - size) << 3); in pe_pmem_read()
137 addr = pe[id].pmem_base_addr | ((addr & ~0x3) & (pe[id].pmem_size - 1)) in pe_pmem_read()
182 u32 mask = 0xffffffff >> ((4 - size) << 3); in pe_dmem_read()
198 * pe-lem) from the host
219 * Reads from CLASS internal bus peripherals (ccu, pe-lem) from the host
[all …]
/openbmc/linux/drivers/clocksource/
H A DKconfig1 # SPDX-License-Identifier: GPL-2.0-only
60 bool "OMAP dual-mode timer driver" if ARCH_K3 || COMPILE_TEST
64 Enables the support for the TI dual-mode timer driver.
180 Enable 24-bit TIMER0 and TIMER1 counters in the NPCM7xx architecture,
203 32-bit free running decrementing counters.
238 bool "Integrator-AP timer driver" if COMPILE_TEST
241 Enables support for the Integrator-AP timer.
266 available on many OMAP-like platforms.
285 bool "Support for 32-bit TIMERn counters in ARC Cores" if COMPILE_TEST
289 These are legacy 32-bit TIMER0 and TIMER1 counters found on all ARC cores
[all …]
/openbmc/linux/arch/arm64/boot/dts/renesas/
H A Dr8a77980.dtsi1 // SPDX-License-Identifier: GPL-2.0
3 * Device Tree Source for the R-Car V3H (R8A77980) SoC
9 #include <dt-bindings/clock/r8a77980-cpg-mssr.h>
10 #include <dt-bindings/interrupt-controller/irq.h>
11 #include <dt-bindings/interrupt-controller/arm-gic.h>
12 #include <dt-bindings/power/r8a77980-sysc.h>
16 #address-cells = <2>;
17 #size-cells = <2>;
19 /* External CAN clock - to be overridden by boards that provide it */
21 compatible = "fixed-clock";
[all …]
/openbmc/linux/arch/arm64/boot/dts/exynos/
H A Dexynos5433.dtsi1 // SPDX-License-Identifier: GPL-2.0
16 #include <dt-bindings/clock/exynos5433.h>
17 #include <dt-bindings/interrupt-controller/arm-gic.h>
21 #address-cells = <2>;
22 #size-cells = <2>;
24 interrupt-parent = <&gic>;
26 arm-a53-pmu {
27 compatible = "arm,cortex-a53-pmu";
32 interrupt-affinity = <&cpu0>, <&cpu1>, <&cpu2>, <&cpu3>;
35 arm-a57-pmu {
[all …]

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