Home
last modified time | relevance | path

Searched +full:max +full:- +full:freq (Results 1 – 25 of 1013) sorted by relevance

12345678910>>...41

/openbmc/linux/drivers/gpu/drm/i915/gt/
H A Dselftest_slpc.c1 // SPDX-License-Identifier: MIT
26 static int slpc_set_min_freq(struct intel_guc_slpc *slpc, u32 freq) in slpc_set_min_freq() argument
30 ret = intel_guc_slpc_set_min_freq(slpc, freq); in slpc_set_min_freq()
32 pr_err("Could not set min frequency to [%u]\n", freq); in slpc_set_min_freq()
39 static int slpc_set_max_freq(struct intel_guc_slpc *slpc, u32 freq) in slpc_set_max_freq() argument
43 ret = intel_guc_slpc_set_max_freq(slpc, freq); in slpc_set_max_freq()
46 freq); in slpc_set_max_freq()
53 static int slpc_set_freq(struct intel_gt *gt, u32 freq) in slpc_set_freq() argument
56 struct intel_guc_slpc *slpc = &gt->uc.guc.slpc; in slpc_set_freq()
58 err = slpc_set_max_freq(slpc, freq); in slpc_set_freq()
[all …]
H A Dselftest_rps.c1 // SPDX-License-Identifier: MIT
26 #define CPU_LATENCY 0 /* -1 to disable pm_qos, 0 to disable cstates */
37 return -1; in cmp_u64()
49 return -1; in cmp_u32()
68 #define CS_GPR(x) GEN8_RING_CS_GPR(engine->mmio_base, x) in create_spin_counter()
76 obj = i915_gem_object_create_internal(vm->i915, 64 << 10); in create_spin_counter()
80 end = obj->base.size / sizeof(u32) - 1; in create_spin_counter()
113 loop = cs - base; in create_spin_counter()
134 GEM_BUG_ON(cs - base > end); in create_spin_counter()
151 static u8 wait_for_freq(struct intel_rps *rps, u8 freq, int timeout_ms) in wait_for_freq() argument
[all …]
H A Dintel_rps.c1 // SPDX-License-Identifier: MIT
43 return rps_to_gt(rps)->i915; in rps_to_i915()
48 return rps_to_gt(rps)->uncore; in rps_to_uncore()
55 return &gt->uc.guc.slpc; in rps_to_slpc()
62 return intel_uc_uses_guc_slpc(&gt->uc); in rps_uses_slpc()
67 return mask & ~rps->pm_intrmsk_mbz; in rps_pm_sanitize_mask()
90 last = engine->stats.rps; in rps_timer()
91 engine->stats.rps = dt; in rps_timer()
99 last = rps->pm_timestamp; in rps_timer()
100 rps->pm_timestamp = timestamp; in rps_timer()
[all …]
/openbmc/linux/drivers/cpufreq/
H A Dfreq_table.c1 // SPDX-License-Identifier: GPL-2.0-only
5 * Copyright (C) 2002 - 2003 Dominik Brodowski
19 struct cpufreq_frequency_table *pos, *table = policy->freq_table; in policy_has_boost_freq()
25 if (pos->flags & CPUFREQ_BOOST_FREQ) in policy_has_boost_freq()
38 unsigned int freq; in cpufreq_frequency_table_cpuinfo() local
41 freq = pos->frequency; in cpufreq_frequency_table_cpuinfo()
43 if ((!cpufreq_boost_enabled() || !policy->boost_enabled) in cpufreq_frequency_table_cpuinfo()
44 && (pos->flags & CPUFREQ_BOOST_FREQ)) in cpufreq_frequency_table_cpuinfo()
47 pr_debug("table entry %u: %u kHz\n", (int)(pos - table), freq); in cpufreq_frequency_table_cpuinfo()
48 if (freq < min_freq) in cpufreq_frequency_table_cpuinfo()
[all …]
H A Dcpufreq_userspace.c1 // SPDX-License-Identifier: GPL-2.0-only
7 * (C) 2002 - 2004 Dominik Brodowski <linux@brodo.de>
22 * cpufreq_set - set the CPU frequency
23 * @policy: pointer to policy struct where freq is being set
24 * @freq: target frequency in kHz
26 * Sets the CPU frequency to freq.
28 static int cpufreq_set(struct cpufreq_policy *policy, unsigned int freq) in cpufreq_set() argument
30 int ret = -EINVAL; in cpufreq_set()
31 unsigned int *setspeed = policy->governor_data; in cpufreq_set()
33 pr_debug("cpufreq_set for cpu %u, freq %u kHz\n", policy->cpu, freq); in cpufreq_set()
[all …]
H A Dsh-cpufreq.c4 * Copyright (C) 2002 - 2012 Paul Mundt
7 * Clock framework bits from arch/avr32/mach-at32ap/cpufreq.c
9 * Copyright (C) 2004-2007 Atmel Corporation
34 unsigned int freq; member
45 struct cpufreq_policy *policy = target->policy; in __sh_cpufreq_target()
46 int cpu = policy->cpu; in __sh_cpufreq_target()
50 long freq; in __sh_cpufreq_target() local
53 return -ENODEV; in __sh_cpufreq_target()
58 freq = clk_round_rate(cpuclk, target->freq * 1000); in __sh_cpufreq_target()
60 if (freq < (policy->min * 1000) || freq > (policy->max * 1000)) in __sh_cpufreq_target()
[all …]
/openbmc/linux/tools/power/cpupower/utils/
H A Dcpufreq-set.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * (C) 2004-2009 Dominik Brodowski <linux@dominikbrodowski.de>
25 {"max", required_argument, NULL, 'u'},
27 {"freq", required_argument, NULL, 'f'},
35 "- Do you have proper administration rights? (super-user?)\n" in print_error()
36 "- Is the governor you requested available and modprobed?\n" in print_error()
37 "- Trying to set an invalid policy?\n" in print_error()
38 "- Trying to set a specific frequency, but userspace governor is not available,\n" in print_error()
49 {"hz", -3},
68 unsigned long freq; in string_to_frequency() local
[all …]
H A Dcpufreq-info.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * (C) 2004-2009 Dominik Brodowski <linux@dominikbrodowski.de>
39 value[LINE_LEN - 1] = '\0'; in count_cpus()
40 if (strlen(value) < (LINE_LEN - 2)) in count_cpus()
62 unsigned long min, max; in proc_cpufreq_output() local
64 printf(_(" minimum CPU frequency - maximum CPU frequency - governor\n")); in proc_cpufreq_output()
72 if (cpufreq_get_hardware_limits(cpu, &min, &max)) { in proc_cpufreq_output()
73 max = 0; in proc_cpufreq_output()
75 min_pctg = (policy->min * 100) / max; in proc_cpufreq_output()
76 max_pctg = (policy->max * 100) / max; in proc_cpufreq_output()
[all …]
/openbmc/linux/Documentation/devicetree/bindings/memory-controllers/ddr/
H A Djedec,lpddr2-timings.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/memory-controllers/ddr/jedec,lpddr2-timings.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: LPDDR2 SDRAM AC timing parameters for a given speed-bin
10 - Krzysztof Kozlowski <krzk@kernel.org>
14 const: jedec,lpddr2-timings
16 max-freq:
19 Maximum DDR clock frequency for the speed-bin, in Hz.
21 min-freq:
[all …]
H A Djedec,lpddr3-timings.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/memory-controllers/ddr/jedec,lpddr3-timings.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: LPDDR3 SDRAM AC timing parameters for a given speed-bin
10 - Krzysztof Kozlowski <krzk@kernel.org>
14 const: jedec,lpddr3-timings
19 Maximum DDR clock frequency for the speed-bin, in Hz.
20 Property is deprecated, use max-freq.
23 max-freq:
[all …]
/openbmc/linux/samples/bpf/
H A Dsampleip_user.c1 // SPDX-License-Identifier: GPL-2.0-only
18 #include "perf-sys.h"
31 printf("USAGE: sampleip [-F freq] [duration]\n"); in usage()
32 printf(" -F freq # sample frequency (Hertz), default 99\n"); in usage()
36 static int sampling_start(int freq, struct bpf_program *prog, in sampling_start() argument
43 .freq = 1, in sampling_start()
44 .sample_period = freq, in sampling_start()
50 pmu_fd = sys_perf_event_open(&pe_sample_attr, -1 /* pid */, i, in sampling_start()
51 -1 /* group_fd */, 0 /* flags */); in sampling_start()
86 return ((struct ipcount *)p1)->count - ((struct ipcount *)p2)->count; in count_cmp()
[all …]
/openbmc/linux/arch/arm/boot/dts/ti/omap/
H A Delpida_ecb240abacn.dtsi1 // SPDX-License-Identifier: GPL-2.0
8 compatible = "elpida,ECB240ABACN","jedec,lpddr2-s4";
10 io-width = <32>;
12 tRPab-min-tck = <3>;
13 tRCD-min-tck = <3>;
14 tWR-min-tck = <3>;
15 tRASmin-min-tck = <3>;
16 tRRD-min-tck = <2>;
17 tWTR-min-tck = <2>;
18 tXP-min-tck = <2>;
[all …]
/openbmc/linux/include/linux/
H A Dcpufreq.h1 /* SPDX-License-Identifier: GPL-2.0-only */
6 * (C) 2002 - 2003 Dominik Brodowski <linux@brodo.de>
30 * Maximum transition latency is in nanoseconds - if it's unknown,
34 #define CPUFREQ_ETERNAL (-1)
51 /* in 10^(-9) s = nanoseconds */
69 unsigned int max; /* in kHz */ member
72 unsigned int suspend_freq; /* freq to set during suspend */
96 * - Any routine that wants to read from the policy structure will
98 * - Any routine that will write to the policy structure and/or may take away
106 * - fast_switch_possible should be set by the driver if it can
[all …]
H A Denergy_model.h1 /* SPDX-License-Identifier: GPL-2.0 */
14 * struct em_perf_state - Performance state of a performance domain
40 * struct em_perf_domain - Performance domain
51 * must have the same micro-architecture. Performance domains often have
52 * a 1-to-1 mapping with CPUFreq policies. In case of other devices the @cpus
65 * EM_PERF_DOMAIN_MICROWATTS: The power values are in micro-Watts or some
78 #define em_span_cpus(em) (to_cpumask((em)->cpus))
79 #define em_is_artificial(em) ((em)->flags & EM_PERF_DOMAIN_ARTIFICIAL)
83 * The max power value in micro-Watts. The limit of 64 Watts is set as
106 * e.g. power ~1.3 Watt at max freq, so the 'cost' value > 1mln micro-Watts.
[all …]
/openbmc/linux/Documentation/admin-guide/pm/
H A Dintel-speed-select.rst1 .. SPDX-License-Identifier: GPL-2.0
14 - https://www.intel.com/content/www/us/en/architecture-and-technology/speed-select-technology-artic…
15 - https://builders.intel.com/docs/networkbuilders/intel-speed-select-technology-base-frequency-enha…
19 dynamically without pre-configuring via BIOS setup options. This dynamic
29 intel-speed-select configuration tool
32 Most Linux distribution packages may include the "intel-speed-select" tool. If not,
38 # cd tools/power/x86/intel-speed-select/
43 ------------
47 # intel-speed-select --help
49 The top-level help describes arguments and features. Notice that there is a
[all …]
/openbmc/linux/Documentation/devicetree/bindings/sound/
H A Datmel,sama5d2-pdmic.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
4 ---
5 $id: http://devicetree.org/schemas/sound/atmel,sama5d2-pdmic.yaml#
6 $schema: http://devicetree.org/meta-schemas/core.yaml#
11 - Claudiu Beznea <claudiu.beznea@microchip.com>
20 const: atmel,sama5d2-pdmic
30 - description: peripheral clock
31 - description: generated clock
33 clock-names:
35 - const: pclk
[all …]
/openbmc/u-boot/drivers/ddr/marvell/axp/
H A Dddr3_hw_training.c1 // SPDX-License-Identifier: GPL-2.0
64 puts("DDR3 Training Sequence - Ver 5.7."); in ddr3_print_version()
83 u32 freq, reg; in ddr3_hw_training() local
90 DEBUG_MAIN_S("DDR3 Training Sequence - DEBUG - 1\n"); in ddr3_hw_training()
104 /* Ignore ECC errors - if ECC is enabled */ in ddr3_hw_training()
152 /* first_loop_flag = 1; skip mid freq at ALP/A375 */ in ddr3_hw_training()
161 freq = dram_info.target_frequency; in ddr3_hw_training()
174 * Xor Bypass - ECC support in AXP is currently available for 1:1 in ddr3_hw_training()
184 DEBUG_MAIN_S("DDR3 Training Sequence - Run with PBS.\n"); in ddr3_hw_training()
186 DEBUG_MAIN_S("DDR3 Training Sequence - Run without PBS.\n"); in ddr3_hw_training()
[all …]
/openbmc/u-boot/drivers/ram/rockchip/
H A Ddmc-rk3368.c1 // SPDX-License-Identifier: GPL-2.0
9 #include <dt-bindings/memory/rk3368-dmc.h>
10 #include <dt-structs.h>
123 ((n <= 8) ? ((n - 4) << 9) : (((n >> 1) & 0x7) << 9))
125 ((((n - 4) & 0x7) << 4) | (((n - 4) & 0x8) >> 2))
133 (((n - 5) & 0x7) << 3)
141 rk_setreg(&grf->ddrc0_con0, NOC_RSP_ERR_STALL); in ddr_set_noc_spr_err_stall()
143 rk_clrreg(&grf->ddrc0_con0, NOC_RSP_ERR_STALL); in ddr_set_noc_spr_err_stall()
149 rk_setreg(&grf->ddrc0_con0, MSCH0_MAINDDR3_DDR3); in ddr_set_ddr3_mode()
151 rk_clrreg(&grf->ddrc0_con0, MSCH0_MAINDDR3_DDR3); in ddr_set_ddr3_mode()
[all …]
/openbmc/linux/drivers/devfreq/
H A Dgovernor_simpleondemand.c1 // SPDX-License-Identifier: GPL-2.0-only
15 /* Default constants for DevFreq-Simple-Ondemand (DFSO) */
19 unsigned long *freq) in devfreq_simple_ondemand_func() argument
26 struct devfreq_simple_ondemand_data *data = df->data; in devfreq_simple_ondemand_func()
32 stat = &df->last_status; in devfreq_simple_ondemand_func()
35 if (data->upthreshold) in devfreq_simple_ondemand_func()
36 dfso_upthreshold = data->upthreshold; in devfreq_simple_ondemand_func()
37 if (data->downdifferential) in devfreq_simple_ondemand_func()
38 dfso_downdifferential = data->downdifferential; in devfreq_simple_ondemand_func()
42 return -EINVAL; in devfreq_simple_ondemand_func()
[all …]
/openbmc/linux/drivers/crypto/intel/qat/qat_common/
H A Dadf_clock.c1 // SPDX-License-Identifier: GPL-2.0-only
57 delta_us = timespec_to_us(&ts2) - timespec_to_us(&ts1); in measure_clock()
58 } while (delta_us > MEASURE_CLOCK_DELTA_THRESHOLD_US && --tries); in measure_clock()
62 return -ETIMEDOUT; in measure_clock()
73 return -EIO; in measure_clock()
76 delta_us = timespec_to_us(&ts4) - timespec_to_us(&ts3); in measure_clock()
77 } while (delta_us > MEASURE_CLOCK_DELTA_THRESHOLD_US && --tries); in measure_clock()
81 return -ETIMEDOUT; in measure_clock()
84 delta_us = timespec_to_us(&ts3) - timespec_to_us(&ts1); in measure_clock()
86 return -EINVAL; in measure_clock()
[all …]
/openbmc/linux/drivers/gpu/drm/amd/pm/swsmu/smu12/
H A Drenoir_ppt.c158 struct smu_table_context *smu_table = &smu->smu_table; in renoir_init_smc_tables()
159 struct smu_table *tables = smu_table->tables; in renoir_init_smc_tables()
168 smu_table->clocks_table = kzalloc(sizeof(DpmClocks_t), GFP_KERNEL); in renoir_init_smc_tables()
169 if (!smu_table->clocks_table) in renoir_init_smc_tables()
172 smu_table->metrics_table = kzalloc(sizeof(SmuMetrics_t), GFP_KERNEL); in renoir_init_smc_tables()
173 if (!smu_table->metrics_table) in renoir_init_smc_tables()
175 smu_table->metrics_time = 0; in renoir_init_smc_tables()
177 smu_table->watermarks_table = kzalloc(sizeof(Watermarks_t), GFP_KERNEL); in renoir_init_smc_tables()
178 if (!smu_table->watermarks_table) in renoir_init_smc_tables()
181 smu_table->gpu_metrics_table_size = sizeof(struct gpu_metrics_v2_2); in renoir_init_smc_tables()
[all …]
/openbmc/linux/arch/arm/boot/dts/samsung/
H A Dexynos5250-spring.dts1 // SPDX-License-Identifier: GPL-2.0
9 /dts-v1/;
10 #include <dt-bindings/clock/samsung,s2mps11.h>
11 #include <dt-bindings/gpio/gpio.h>
12 #include <dt-bindings/interrupt-controller/irq.h>
13 #include <dt-bindings/input/input.h>
19 chassis-type = "laptop";
33 stdout-path = "serial3:115200n8";
36 gpio-keys {
37 compatible = "gpio-keys";
[all …]
/openbmc/linux/drivers/gpu/drm/i915/gt/uc/
H A Dintel_guc_slpc.c1 // SPDX-License-Identifier: MIT
30 return slpc_to_gt(slpc)->i915; in slpc_to_i915()
35 /* GuC SLPC is unavailable for pre-Gen12 */ in __detect_slpc_supported()
36 return guc->submission_supported && in __detect_slpc_supported()
37 GRAPHICS_VER(guc_to_gt(guc)->i915) >= 12; in __detect_slpc_supported()
45 return guc->submission_selected; in __guc_slpc_selected()
52 slpc->supported = __detect_slpc_supported(guc); in intel_guc_slpc_init_early()
53 slpc->selected = __guc_slpc_selected(guc); in intel_guc_slpc_init_early()
64 data->override_params.bits[id >> 5] |= (1 << (id % 32)); in slpc_mem_set_param()
65 data->override_params.values[id] = value; in slpc_mem_set_param()
[all …]
/openbmc/linux/drivers/sh/clk/
H A Dcore.c4 * Copyright (C) 2005 - 2010 Paul Mundt
8 * Copyright (C) 2004 - 2008 Nokia Corporation
46 unsigned long freq; in clk_rate_table_build() local
49 clk->nr_freqs = nr_freqs; in clk_rate_table_build()
55 if (src_table->divisors && i < src_table->nr_divisors) in clk_rate_table_build()
56 div = src_table->divisors[i]; in clk_rate_table_build()
58 if (src_table->multipliers && i < src_table->nr_multipliers) in clk_rate_table_build()
59 mult = src_table->multipliers[i]; in clk_rate_table_build()
62 freq = CPUFREQ_ENTRY_INVALID; in clk_rate_table_build()
64 freq = clk->parent->rate * mult / div; in clk_rate_table_build()
[all …]
/openbmc/u-boot/drivers/mmc/
H A Drockchip_dw_mmc.c1 // SPDX-License-Identifier: GPL-2.0+
9 #include <dt-structs.h>
36 static uint rockchip_dwmmc_get_mmc_clk(struct dwmci_host *host, uint freq) in rockchip_dwmmc_get_mmc_clk() argument
38 struct udevice *dev = host->priv; in rockchip_dwmmc_get_mmc_clk()
42 ret = clk_set_rate(&priv->clk, freq); in rockchip_dwmmc_get_mmc_clk()
48 return freq; in rockchip_dwmmc_get_mmc_clk()
55 struct dwmci_host *host = &priv->host; in rockchip_dwmmc_ofdata_to_platdata()
57 host->name = dev->name; in rockchip_dwmmc_ofdata_to_platdata()
58 host->ioaddr = dev_read_addr_ptr(dev); in rockchip_dwmmc_ofdata_to_platdata()
59 host->buswidth = dev_read_u32_default(dev, "bus-width", 4); in rockchip_dwmmc_ofdata_to_platdata()
[all …]

12345678910>>...41