Lines Matching +full:max +full:- +full:freq
1 // SPDX-License-Identifier: MIT
26 #define CPU_LATENCY 0 /* -1 to disable pm_qos, 0 to disable cstates */
37 return -1; in cmp_u64()
49 return -1; in cmp_u32()
68 #define CS_GPR(x) GEN8_RING_CS_GPR(engine->mmio_base, x) in create_spin_counter()
76 obj = i915_gem_object_create_internal(vm->i915, 64 << 10); in create_spin_counter()
80 end = obj->base.size / sizeof(u32) - 1; in create_spin_counter()
113 loop = cs - base; in create_spin_counter()
134 GEM_BUG_ON(cs - base > end); in create_spin_counter()
151 static u8 wait_for_freq(struct intel_rps *rps, u8 freq, int timeout_ms) in wait_for_freq() argument
158 memset(history, freq, sizeof(history)); in wait_for_freq()
171 if (act == freq) in wait_for_freq()
188 static u8 rps_set_check(struct intel_rps *rps, u8 freq) in rps_set_check() argument
190 mutex_lock(&rps->lock); in rps_set_check()
192 if (wait_for(!intel_rps_set(rps, freq), 50)) { in rps_set_check()
193 mutex_unlock(&rps->lock); in rps_set_check()
196 GEM_BUG_ON(rps->last_freq != freq); in rps_set_check()
197 mutex_unlock(&rps->lock); in rps_set_check()
199 return wait_for_freq(rps, freq, 50); in rps_set_check()
222 struct intel_rps *rps = >->rps; in live_rps_clock_interval()
229 if (!intel_rps_is_enabled(rps) || GRAPHICS_VER(gt->i915) < 6) in live_rps_clock_interval()
233 return -ENOMEM; in live_rps_clock_interval()
236 saved_work = rps->work.func; in live_rps_clock_interval()
237 rps->work.func = dummy_rps_work; in live_rps_clock_interval()
240 intel_rps_disable(>->rps); in live_rps_clock_interval()
255 engine->kernel_context, in live_rps_clock_interval()
267 engine->name); in live_rps_clock_interval()
270 intel_gt_set_wedged(engine->gt); in live_rps_clock_interval()
271 err = -EIO; in live_rps_clock_interval()
275 intel_uncore_forcewake_get(gt->uncore, FORCEWAKE_ALL); in live_rps_clock_interval()
277 intel_uncore_write_fw(gt->uncore, GEN6_RP_CUR_UP_EI, 0); in live_rps_clock_interval()
280 intel_uncore_write_fw(gt->uncore, in live_rps_clock_interval()
282 intel_uncore_write_fw(gt->uncore, in live_rps_clock_interval()
285 intel_uncore_write_fw(gt->uncore, GEN6_RP_CONTROL, in live_rps_clock_interval()
288 if (wait_for(intel_uncore_read_fw(gt->uncore, in live_rps_clock_interval()
293 engine->name); in live_rps_clock_interval()
294 err = -ENODEV; in live_rps_clock_interval()
303 cycles_[i] = -intel_uncore_read_fw(gt->uncore, GEN6_RP_CUR_UP_EI); in live_rps_clock_interval()
308 cycles_[i] += intel_uncore_read_fw(gt->uncore, GEN6_RP_CUR_UP_EI); in live_rps_clock_interval()
321 intel_uncore_write_fw(gt->uncore, GEN6_RP_CONTROL, 0); in live_rps_clock_interval()
322 intel_uncore_forcewake_put(gt->uncore, FORCEWAKE_ALL); in live_rps_clock_interval()
333 engine->name, cycles, time, dt, expected, in live_rps_clock_interval()
334 gt->clock_frequency / 1000); in live_rps_clock_interval()
339 engine->name); in live_rps_clock_interval()
340 err = -EINVAL; in live_rps_clock_interval()
346 engine->name); in live_rps_clock_interval()
347 err = -EINVAL; in live_rps_clock_interval()
351 if (igt_flush_test(gt->i915)) in live_rps_clock_interval()
352 err = -EIO; in live_rps_clock_interval()
357 intel_rps_enable(>->rps); in live_rps_clock_interval()
363 rps->work.func = saved_work; in live_rps_clock_interval()
365 if (err == -ENODEV) /* skipped, don't report a fail */ in live_rps_clock_interval()
374 struct intel_rps *rps = >->rps; in live_rps_control()
391 if (IS_CHERRYVIEW(gt->i915)) /* XXX fragile PCU */ in live_rps_control()
395 return -ENOMEM; in live_rps_control()
398 saved_work = rps->work.func; in live_rps_control()
399 rps->work.func = dummy_rps_work; in live_rps_control()
406 int min, max; in live_rps_control() local
414 engine->kernel_context, in live_rps_control()
425 engine->name); in live_rps_control()
428 intel_gt_set_wedged(engine->gt); in live_rps_control()
429 err = -EIO; in live_rps_control()
433 if (rps_set_check(rps, rps->min_freq) != rps->min_freq) { in live_rps_control()
435 engine->name, rps->min_freq, read_cagf(rps)); in live_rps_control()
439 err = -EINVAL; in live_rps_control()
443 for (f = rps->min_freq + 1; f < rps->max_freq; f++) { in live_rps_control()
450 if (rps_set_check(rps, rps->min_freq) != rps->min_freq) { in live_rps_control()
452 engine->name, rps->min_freq, read_cagf(rps)); in live_rps_control()
456 err = -EINVAL; in live_rps_control()
461 max = rps_set_check(rps, limit); in live_rps_control()
465 min = rps_set_check(rps, rps->min_freq); in live_rps_control()
472 engine->name, in live_rps_control()
473 rps->min_freq, intel_gpu_freq(rps, rps->min_freq), in live_rps_control()
474 rps->max_freq, intel_gpu_freq(rps, rps->max_freq), in live_rps_control()
476 min, max, ktime_to_ns(min_dt), ktime_to_ns(max_dt)); in live_rps_control()
478 if (limit == rps->min_freq) { in live_rps_control()
480 engine->name); in live_rps_control()
482 err = -ENODEV; in live_rps_control()
486 if (igt_flush_test(gt->i915)) { in live_rps_control()
487 err = -EIO; in live_rps_control()
496 rps->work.func = saved_work; in live_rps_control()
511 min_gpu_freq = rps->min_freq; in show_pcu_config()
512 max_gpu_freq = rps->max_freq; in show_pcu_config()
519 wakeref = intel_runtime_pm_get(rps_to_uncore(rps)->rpm); in show_pcu_config()
525 snb_pcode_read(rps_to_gt(rps)->uncore, GEN6_PCODE_READ_MIN_FREQ_TABLE, in show_pcu_config()
534 intel_runtime_pm_put(rps_to_uncore(rps)->rpm, wakeref); in show_pcu_config()
544 dc = READ_ONCE(*cntr) - dc; in __measure_frequency()
545 dt = ktime_get() - dt; in __measure_frequency()
550 static u64 measure_frequency_at(struct intel_rps *rps, u32 *cntr, int *freq) in measure_frequency_at() argument
555 *freq = rps_set_check(rps, *freq); in measure_frequency_at()
558 *freq = (*freq + read_cagf(rps)) / 2; in measure_frequency_at()
570 dc = intel_uncore_read_fw(engine->uncore, CS_GPR(0)); in __measure_cs_frequency()
573 dc = intel_uncore_read_fw(engine->uncore, CS_GPR(0)) - dc; in __measure_cs_frequency()
574 dt = ktime_get() - dt; in __measure_cs_frequency()
581 int *freq) in measure_cs_frequency_at() argument
586 *freq = rps_set_check(rps, *freq); in measure_cs_frequency_at()
589 *freq = (*freq + read_cagf(rps)) / 2; in measure_cs_frequency_at()
605 struct intel_rps *rps = >->rps; in live_rps_frequency_cs()
620 if (GRAPHICS_VER(gt->i915) < 8) /* for CS simplicity */ in live_rps_frequency_cs()
627 saved_work = rps->work.func; in live_rps_frequency_cs()
628 rps->work.func = dummy_rps_work; in live_rps_frequency_cs()
636 int freq; in live_rps_frequency_cs() member
637 } min, max; in live_rps_frequency_cs() local
642 engine->kernel_context->vm, false, in live_rps_frequency_cs()
658 err = rq->engine->emit_bb_start(rq, in live_rps_frequency_cs()
665 if (wait_for(intel_uncore_read(engine->uncore, CS_GPR(0)), in live_rps_frequency_cs()
668 engine->name); in live_rps_frequency_cs()
672 min.freq = rps->min_freq; in live_rps_frequency_cs()
673 min.count = measure_cs_frequency_at(rps, engine, &min.freq); in live_rps_frequency_cs()
675 max.freq = rps->max_freq; in live_rps_frequency_cs()
676 max.count = measure_cs_frequency_at(rps, engine, &max.freq); in live_rps_frequency_cs()
678 pr_info("%s: min:%lluKHz @ %uMHz, max:%lluKHz @ %uMHz [%d%%]\n", in live_rps_frequency_cs()
679 engine->name, in live_rps_frequency_cs()
680 min.count, intel_gpu_freq(rps, min.freq), in live_rps_frequency_cs()
681 max.count, intel_gpu_freq(rps, max.freq), in live_rps_frequency_cs()
682 (int)DIV64_U64_ROUND_CLOSEST(100 * min.freq * max.count, in live_rps_frequency_cs()
683 max.freq * min.count)); in live_rps_frequency_cs()
685 if (!scaled_within(max.freq * min.count, in live_rps_frequency_cs()
686 min.freq * max.count, in live_rps_frequency_cs()
690 pr_err("%s: CS did not scale with frequency! scaled min:%llu, max:%llu\n", in live_rps_frequency_cs()
691 engine->name, in live_rps_frequency_cs()
692 max.freq * min.count, in live_rps_frequency_cs()
693 min.freq * max.count); in live_rps_frequency_cs()
696 for (f = min.freq + 1; f <= rps->max_freq; f++) { in live_rps_frequency_cs()
705 engine->name, in live_rps_frequency_cs()
707 (int)DIV64_U64_ROUND_CLOSEST(100 * min.freq * count, in live_rps_frequency_cs()
713 err = -EINTR; /* ignore error, continue on with test */ in live_rps_frequency_cs()
718 i915_gem_object_flush_map(vma->obj); in live_rps_frequency_cs()
719 i915_gem_object_unpin_map(vma->obj); in live_rps_frequency_cs()
725 if (igt_flush_test(gt->i915)) in live_rps_frequency_cs()
726 err = -EIO; in live_rps_frequency_cs()
732 rps->work.func = saved_work; in live_rps_frequency_cs()
744 struct intel_rps *rps = >->rps; in live_rps_frequency_srm()
759 if (GRAPHICS_VER(gt->i915) < 8) /* for CS simplicity */ in live_rps_frequency_srm()
766 saved_work = rps->work.func; in live_rps_frequency_srm()
767 rps->work.func = dummy_rps_work; in live_rps_frequency_srm()
775 int freq; in live_rps_frequency_srm() member
776 } min, max; in live_rps_frequency_srm() local
781 engine->kernel_context->vm, true, in live_rps_frequency_srm()
797 err = rq->engine->emit_bb_start(rq, in live_rps_frequency_srm()
806 engine->name); in live_rps_frequency_srm()
810 min.freq = rps->min_freq; in live_rps_frequency_srm()
811 min.count = measure_frequency_at(rps, cntr, &min.freq); in live_rps_frequency_srm()
813 max.freq = rps->max_freq; in live_rps_frequency_srm()
814 max.count = measure_frequency_at(rps, cntr, &max.freq); in live_rps_frequency_srm()
816 pr_info("%s: min:%lluKHz @ %uMHz, max:%lluKHz @ %uMHz [%d%%]\n", in live_rps_frequency_srm()
817 engine->name, in live_rps_frequency_srm()
818 min.count, intel_gpu_freq(rps, min.freq), in live_rps_frequency_srm()
819 max.count, intel_gpu_freq(rps, max.freq), in live_rps_frequency_srm()
820 (int)DIV64_U64_ROUND_CLOSEST(100 * min.freq * max.count, in live_rps_frequency_srm()
821 max.freq * min.count)); in live_rps_frequency_srm()
823 if (!scaled_within(max.freq * min.count, in live_rps_frequency_srm()
824 min.freq * max.count, in live_rps_frequency_srm()
828 pr_err("%s: CS did not scale with frequency! scaled min:%llu, max:%llu\n", in live_rps_frequency_srm()
829 engine->name, in live_rps_frequency_srm()
830 max.freq * min.count, in live_rps_frequency_srm()
831 min.freq * max.count); in live_rps_frequency_srm()
834 for (f = min.freq + 1; f <= rps->max_freq; f++) { in live_rps_frequency_srm()
843 engine->name, in live_rps_frequency_srm()
845 (int)DIV64_U64_ROUND_CLOSEST(100 * min.freq * count, in live_rps_frequency_srm()
851 err = -EINTR; /* ignore error, continue on with test */ in live_rps_frequency_srm()
856 i915_gem_object_flush_map(vma->obj); in live_rps_frequency_srm()
857 i915_gem_object_unpin_map(vma->obj); in live_rps_frequency_srm()
863 if (igt_flush_test(gt->i915)) in live_rps_frequency_srm()
864 err = -EIO; in live_rps_frequency_srm()
870 rps->work.func = saved_work; in live_rps_frequency_srm()
885 GEM_BUG_ON(rps->pm_iir); in sleep_for_ei()
896 struct intel_uncore *uncore = engine->uncore; in __rps_up_interrupt()
903 rps_set_check(rps, rps->min_freq); in __rps_up_interrupt()
905 rq = igt_spinner_create_request(spin, engine->kernel_context, MI_NOOP); in __rps_up_interrupt()
914 engine->name); in __rps_up_interrupt()
916 intel_gt_set_wedged(engine->gt); in __rps_up_interrupt()
917 return -EIO; in __rps_up_interrupt()
922 engine->name); in __rps_up_interrupt()
925 return -EINVAL; in __rps_up_interrupt()
928 if (!(rps->pm_events & GEN6_PM_RP_UP_THRESHOLD)) { in __rps_up_interrupt()
930 engine->name); in __rps_up_interrupt()
932 return -EINVAL; in __rps_up_interrupt()
935 if (rps->last_freq != rps->min_freq) { in __rps_up_interrupt()
937 engine->name); in __rps_up_interrupt()
939 return -EINVAL; in __rps_up_interrupt()
943 timeout = intel_gt_pm_interval_to_ns(engine->gt, timeout); in __rps_up_interrupt()
952 if (rps->cur_freq != rps->min_freq) { in __rps_up_interrupt()
954 engine->name, intel_rps_read_actual_frequency(rps)); in __rps_up_interrupt()
955 return -EINVAL; in __rps_up_interrupt()
958 if (!(rps->pm_iir & GEN6_PM_RP_UP_THRESHOLD)) { in __rps_up_interrupt()
960 engine->name, rps->pm_iir, in __rps_up_interrupt()
964 return -EINVAL; in __rps_up_interrupt()
973 struct intel_uncore *uncore = engine->uncore; in __rps_down_interrupt()
976 rps_set_check(rps, rps->max_freq); in __rps_down_interrupt()
978 if (!(rps->pm_events & GEN6_PM_RP_DOWN_THRESHOLD)) { in __rps_down_interrupt()
980 engine->name); in __rps_down_interrupt()
981 return -EINVAL; in __rps_down_interrupt()
984 if (rps->last_freq != rps->max_freq) { in __rps_down_interrupt()
985 pr_err("%s: RPS did not program max frequency\n", in __rps_down_interrupt()
986 engine->name); in __rps_down_interrupt()
987 return -EINVAL; in __rps_down_interrupt()
991 timeout = intel_gt_pm_interval_to_ns(engine->gt, timeout); in __rps_down_interrupt()
996 if (rps->cur_freq != rps->max_freq) { in __rps_down_interrupt()
998 engine->name, in __rps_down_interrupt()
1000 return -EINVAL; in __rps_down_interrupt()
1003 if (!(rps->pm_iir & (GEN6_PM_RP_DOWN_THRESHOLD | GEN6_PM_RP_DOWN_TIMEOUT))) { in __rps_down_interrupt()
1005 engine->name, rps->pm_iir, in __rps_down_interrupt()
1012 return -EINVAL; in __rps_down_interrupt()
1021 struct intel_rps *rps = >->rps; in live_rps_interrupt()
1033 if (!intel_rps_has_interrupts(rps) || GRAPHICS_VER(gt->i915) < 6) in live_rps_interrupt()
1037 pm_events = rps->pm_events; in live_rps_interrupt()
1041 return -ENODEV; in live_rps_interrupt()
1045 return -ENOMEM; in live_rps_interrupt()
1048 saved_work = rps->work.func; in live_rps_interrupt()
1049 rps->work.func = dummy_rps_work; in live_rps_interrupt()
1054 intel_gt_pm_wait_for_idle(engine->gt); in live_rps_interrupt()
1065 intel_gt_pm_wait_for_idle(engine->gt); in live_rps_interrupt()
1071 intel_rc6_disable(>->rc6); in live_rps_interrupt()
1075 intel_rc6_enable(>->rc6); in live_rps_interrupt()
1083 if (igt_flush_test(gt->i915)) in live_rps_interrupt()
1084 err = -EIO; in live_rps_interrupt()
1089 rps->work.func = saved_work; in live_rps_interrupt()
1101 dE = librapl_energy_uJ() - dE; in __measure_power()
1102 dt = ktime_get() - dt; in __measure_power()
1107 static u64 measure_power(struct intel_rps *rps, int *freq) in measure_power() argument
1115 *freq = (*freq + intel_rps_read_actual_frequency(rps)) / 2; in measure_power()
1122 static u64 measure_power_at(struct intel_rps *rps, int *freq) in measure_power_at() argument
1124 *freq = rps_set_check(rps, *freq); in measure_power_at()
1125 return measure_power(rps, freq); in measure_power_at()
1131 struct intel_rps *rps = >->rps; in live_rps_power()
1144 if (!intel_rps_is_enabled(rps) || GRAPHICS_VER(gt->i915) < 6) in live_rps_power()
1147 if (!librapl_supported(gt->i915)) in live_rps_power()
1151 return -ENOMEM; in live_rps_power()
1154 saved_work = rps->work.func; in live_rps_power()
1155 rps->work.func = dummy_rps_work; in live_rps_power()
1161 int freq; in live_rps_power() member
1162 } min, max; in live_rps_power() local
1170 engine->kernel_context, in live_rps_power()
1182 engine->name); in live_rps_power()
1185 intel_gt_set_wedged(engine->gt); in live_rps_power()
1186 err = -EIO; in live_rps_power()
1190 max.freq = rps->max_freq; in live_rps_power()
1191 max.power = measure_power_at(rps, &max.freq); in live_rps_power()
1193 min.freq = rps->min_freq; in live_rps_power()
1194 min.power = measure_power_at(rps, &min.freq); in live_rps_power()
1199 pr_info("%s: min:%llumW @ %uMHz, max:%llumW @ %uMHz\n", in live_rps_power()
1200 engine->name, in live_rps_power()
1201 min.power, intel_gpu_freq(rps, min.freq), in live_rps_power()
1202 max.power, intel_gpu_freq(rps, max.freq)); in live_rps_power()
1204 if (10 * min.freq >= 9 * max.freq) { in live_rps_power()
1206 min.freq, intel_gpu_freq(rps, min.freq), in live_rps_power()
1207 max.freq, intel_gpu_freq(rps, max.freq)); in live_rps_power()
1211 if (11 * min.power > 10 * max.power) { in live_rps_power()
1213 engine->name); in live_rps_power()
1214 err = -EINVAL; in live_rps_power()
1218 if (igt_flush_test(gt->i915)) { in live_rps_power()
1219 err = -EIO; in live_rps_power()
1227 rps->work.func = saved_work; in live_rps_power()
1235 struct intel_rps *rps = >->rps; in live_rps_dynamic()
1248 if (!intel_rps_is_enabled(rps) || GRAPHICS_VER(gt->i915) < 6) in live_rps_dynamic()
1252 return -ENOMEM; in live_rps_dynamic()
1263 u8 freq; in live_rps_dynamic() member
1264 } min, max; in live_rps_dynamic() local
1271 rps->cur_freq = rps->min_freq; in live_rps_dynamic()
1274 intel_rc6_disable(>->rc6); in live_rps_dynamic()
1275 GEM_BUG_ON(rps->last_freq != rps->min_freq); in live_rps_dynamic()
1278 engine->kernel_context, in live_rps_dynamic()
1287 max.dt = ktime_get(); in live_rps_dynamic()
1288 max.freq = wait_for_freq(rps, rps->max_freq, 500); in live_rps_dynamic()
1289 max.dt = ktime_sub(ktime_get(), max.dt); in live_rps_dynamic()
1294 min.freq = wait_for_freq(rps, rps->min_freq, 2000); in live_rps_dynamic()
1298 engine->name, in live_rps_dynamic()
1299 max.freq, intel_gpu_freq(rps, max.freq), in live_rps_dynamic()
1300 ktime_to_ns(max.dt), in live_rps_dynamic()
1301 min.freq, intel_gpu_freq(rps, min.freq), in live_rps_dynamic()
1303 if (min.freq >= max.freq) { in live_rps_dynamic()
1305 engine->name); in live_rps_dynamic()
1306 err = -EINVAL; in live_rps_dynamic()
1310 intel_rc6_enable(>->rc6); in live_rps_dynamic()
1313 if (igt_flush_test(gt->i915)) in live_rps_dynamic()
1314 err = -EIO; in live_rps_dynamic()