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12

/openbmc/linux/Documentation/devicetree/bindings/mmc/
H A Dmtk-sd.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/mmc/mtk-sd.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Chaotian Jing <chaotian.jing@mediatek.com>
11 - Wenbin Mei <wenbin.mei@mediatek.com>
16 - enum:
17 - mediatek,mt2701-mmc
18 - mediatek,mt2712-mmc
19 - mediatek,mt6779-mmc
[all …]
/openbmc/linux/arch/arm64/boot/dts/mediatek/
H A Dmt6795-sony-xperia-m5.dts1 // SPDX-License-Identifier: GPL-2.0-only
7 /dts-v1/;
8 #include <dt-bindings/gpio/gpio.h>
14 compatible = "sony,xperia-m5", "mediatek,mt6795";
15 chassis-type = "handset";
30 reserved_memory: reserved-memory {
31 #address-cells = <2>;
32 #size-cells = <2>;
38 no-map;
42 preloader-region@44800000 {
[all …]
H A Dmt8173-evb.dts1 // SPDX-License-Identifier: GPL-2.0-only
7 /dts-v1/;
8 #include <dt-bindings/gpio/gpio.h>
13 chassis-type = "embedded";
14 compatible = "mediatek,mt8173-evb", "mediatek,mt8173";
31 compatible = "hdmi-connector";
37 remote-endpoint = <&hdmi0_out>;
43 compatible = "linux,extcon-usb-gpio";
44 id-gpio = <&pio 16 GPIO_ACTIVE_HIGH>;
47 usb_p1_vbus: regulator-usb-p1 {
[all …]
H A Dmt8173-elm.dtsi1 // SPDX-License-Identifier: GPL-2.0-only
6 #include <dt-bindings/input/input.h>
7 #include <dt-bindings/input/linux-event-codes.h>
8 #include <dt-bindings/regulator/dlg,da9211-regulator.h>
9 #include <dt-bindings/gpio/gpio.h>
25 compatible = "pwm-backlight";
27 power-supply = <&bl_fixed_reg>;
28 enable-gpios = <&pio 95 GPIO_ACTIVE_HIGH>;
30 pinctrl-names = "default";
31 pinctrl-0 = <&panel_backlight_en_pins>;
[all …]
H A Dmt8195-cherry.dtsi1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
6 #include <dt-bindings/gpio/gpio.h>
7 #include <dt-bindings/spmi/spmi.h>
25 backlight_lcd0: backlight-lcd0 {
26 compatible = "pwm-backlight";
27 brightness-levels = <0 1023>;
28 default-brightness-level = <576>;
29 enable-gpios = <&pio 82 GPIO_ACTIVE_HIGH>;
30 num-interpolated-steps = <1023>;
32 power-supply = <&ppvar_sys>;
[all …]
H A Dmt8192-asurada.dtsi1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
6 /dts-v1/;
9 #include <dt-bindings/gpio/gpio.h>
10 #include <dt-bindings/spmi/spmi.h>
25 stdout-path = "serial0:115200n8";
33 backlight_lcd0: backlight-lcd0 {
34 compatible = "pwm-backlight";
36 power-supply = <&ppvar_sys>;
37 enable-gpios = <&pio 152 0>;
38 brightness-levels = <0 1023>;
[all …]
H A Dmt8183-kukui.dtsi1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
8 #include <dt-bindings/gpio/gpio.h>
9 #include <dt-bindings/input/input.h>
21 stdout-path = "serial0:115200n8";
25 compatible = "pwm-backlight";
27 power-supply = <&bl_pp5000>;
28 enable-gpios = <&pio 176 0>;
29 brightness-levels = <0 1023>;
30 num-interpolated-steps = <1023>;
31 default-brightness-level = <576>;
[all …]
/openbmc/linux/drivers/mmc/host/
H A Dmtk-sd.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * Copyright (c) 2014-2015, 2022 MediaTek Inc.
10 #include <linux/delay.h>
11 #include <linux/dma-mapping.h>
34 #include <linux/mmc/slot-gpio.h>
41 /*--
347 u32 cmd; global() member
426 struct mmc_command *cmd; global() member
999 msdc_cmd_find_resp(struct msdc_host * host,struct mmc_command * cmd) msdc_cmd_find_resp() argument
1027 msdc_cmd_prepare_raw_cmd(struct msdc_host * host,struct mmc_request * mrq,struct mmc_command * cmd) msdc_cmd_prepare_raw_cmd() argument
1081 msdc_start_data(struct msdc_host * host,struct mmc_command * cmd,struct mmc_data * data) msdc_start_data() argument
1100 msdc_auto_cmd_done(struct msdc_host * host,int events,struct mmc_command * cmd) msdc_auto_cmd_done() argument
1150 msdc_track_cmd_data(struct msdc_host * host,struct mmc_command * cmd) msdc_track_cmd_data() argument
1183 msdc_cmd_done(struct msdc_host * host,int events,struct mmc_request * mrq,struct mmc_command * cmd) msdc_cmd_done() argument
1256 msdc_cmd_is_ready(struct msdc_host * host,struct mmc_request * mrq,struct mmc_command * cmd) msdc_cmd_is_ready() argument
1286 msdc_start_command(struct msdc_host * host,struct mmc_request * mrq,struct mmc_command * cmd) msdc_start_command() argument
1316 msdc_cmd_next(struct msdc_host * host,struct mmc_request * mrq,struct mmc_command * cmd) msdc_cmd_next() argument
1632 struct mmc_command *cmd; msdc_irq() local
1928 test_delay_bit(u32 delay,u32 bit) test_delay_bit() argument
1934 get_delay_len(u32 delay,u32 start_bit) get_delay_len() argument
1945 get_best_delay(struct msdc_host * host,u32 delay) get_best_delay() argument
[all...]
H A Dsdhci-esdhc-imx.c1 // SPDX-License-Identifier: GPL-2.0
5 * derived from the OF-version.
14 #include <linux/delay.h>
23 #include <linux/mmc/slot-gpio.h>
28 #include "sdhci-cqhci.h"
29 #include "sdhci-pltfm.h"
30 #include "sdhci-esdhc.h"
82 #define ESDHC_TUNE_CTRL_MAX ((1 << 7) - 1)
127 * There is an INT DMA ERR mismatch between eSDHC and STD SDHC SPEC:
129 * but bit28 is used as the INT DMA ERR in fsl eSDHC design.
[all …]
H A Dsdhci-xenon-phy.c1 // SPDX-License-Identifier: GPL-2.0-only
8 * Date: 2016-8-24
12 #include <linux/delay.h>
17 #include "sdhci-pltfm.h"
18 #include "sdhci-xenon.h"
203 static int xenon_alloc_emmc_phy(struct sdhci_host *host) in xenon_alloc_emmc_phy()
209 params = devm_kzalloc(mmc_dev(host->mmc), sizeof(*params), GFP_KERNEL); in xenon_alloc_emmc_phy()
211 return -ENOMEM; in xenon_alloc_emmc_phy()
213 priv->phy_params = params; in xenon_alloc_emmc_phy()
214 if (priv->phy_type == EMMC_5_0_PHY) in xenon_alloc_emmc_phy()
[all …]
H A Ddw_mmc-exynos.c1 // SPDX-License-Identifier: GPL-2.0-or-later
19 #include "dw_mmc-pltfm.h"
20 #include "dw_mmc-exynos.h"
22 /* Variations in Exynos specific dw-mshc controller */
53 .compatible = "samsung,exynos4210-dw-mshc",
56 .compatible = "samsung,exynos4412-dw-mshc",
59 .compatible = "samsung,exynos5250-dw-mshc",
62 .compatible = "samsung,exynos5420-dw-mshc",
65 .compatible = "samsung,exynos5420-dw-mshc-smu",
68 .compatible = "samsung,exynos7-dw-mshc",
[all …]
H A Dsunxi-mmc.c1 // SPDX-License-Identifier: GPL-2.0-or-later
4 * (C) Copyright 2007-2011 Reuuimlla Technology Co., Ltd.
5 * (C) Copyright 2007-2011 Aaron Maoye <leafy.myeh@reuuimllatech.com>
6 * (C) Copyright 2013-2014 O2S GmbH <www.o2s.ch>
7 * (C) Copyright 2013-2014 David Lanzendörfer <david.lanzendoerfer@o2s.ch>
8 * (C) Copyright 2013-2014 Hans de Goede <hdegoede@redhat.com>
13 #include <linux/clk/sunxi-ng.h>
14 #include <linux/delay.h>
16 #include <linux/dma-mapping.h>
27 #include <linux/mmc/slot-gpio.h>
[all …]
H A Dsdhci-of-dwcmshc.c1 // SPDX-License-Identifier: GPL-2.0
12 #include <linux/dma-mapping.h>
22 #include "sdhci-pltfm.h"
76 ((addr | (SZ_128M - 1)) == ((addr + len - 1) | (SZ_128M - 1)))
93 int vendor_specific_area1; /* P_VENDOR_SPECIFIC_AREA reg */
102 dma_addr_t addr, int len, unsigned int cmd) in dwcmshc_adma_write_desc() argument
104 int tmplen, offset; in dwcmshc_adma_write_desc()
107 sdhci_adma_write_desc(host, desc, addr, len, cmd); in dwcmshc_adma_write_desc()
111 offset = addr & (SZ_128M - 1); in dwcmshc_adma_write_desc()
112 tmplen = SZ_128M - offset; in dwcmshc_adma_write_desc()
[all …]
H A Dsdhci-msm.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * drivers/mmc/host/sdhci-msm.c - Qualcomm SDHCI Platform driver
5 * Copyright (c) 2013-2014, The Linux Foundation. All rights reserved.
9 #include <linux/delay.h>
23 #include "sdhci-cqhci.h"
24 #include "sdhci-pltfm.h"
123 #define INVALID_TUNING_PHASE -1
137 /* Max load for eMMC Vdd-io supply */
141 msm_host->var_ops->msm_readl_relaxed(host, offset)
144 msm_host->var_ops->msm_writel_relaxed(val, host, offset)
[all …]
H A Dsdhci-xenon.c1 // SPDX-License-Identifier: GPL-2.0-only
8 * Date: 2016-8-24
15 #include <linux/delay.h>
22 #include "sdhci-pltfm.h"
23 #include "sdhci-xenon.h"
25 static int xenon_enable_internal_clk(struct sdhci_host *host) in xenon_enable_internal_clk()
42 dev_err(mmc_dev(host->mmc), "Internal clock never stabilised.\n"); in xenon_enable_internal_clk()
43 return -ETIMEDOUT; in xenon_enable_internal_clk()
51 /* Set SDCLK-off-while-idle */
92 host->mmc->caps |= MMC_CAP_WAIT_WHILE_BUSY; in xenon_enable_sdhc()
[all …]
H A Dsdhci.h1 /* SPDX-License-Identifier: GPL-2.0-or-later */
3 * linux/drivers/mmc/host/sdhci.h - Secure Digital Host Controller Interface driver
7 * Copyright (C) 2005-2008 Pierre Ossman, All Rights Reserved.
103 * VDD2 - UHS2 or PCIe/NVMe
174 #define SDHCI_INT_ALL_MASK ((unsigned int)-1)
196 #define SDHCI_CTRL_HS400 0x0005 /* Non-standard */
243 #define SDHCI_SUPPORT_HS400 0x80000000 /* Non-standard */
252 /* 4C-4F reserved for more max current */
259 /* 55-57 reserved */
264 /* 60-FB reserved */
[all …]
H A Drenesas_sdhi_core.c1 // SPDX-License-Identifier: GPL-2.0
5 * Copyright (C) 2015-19 Renesas Electronics Corporation
6 * Copyright (C) 2016-19 Sang Engineering, Wolfram Sang
7 * Copyright (C) 2016-17 Horms Solutions, Simon Horman
13 * Copyright 2004-2005 Phil Blundell
14 * Copyright 2007-2008 OpenedHand Ltd.
22 #include <linux/delay.h>
28 #include <linux/mmc/slot-gpio.h>
31 #include <linux/pinctrl/pinctrl-state.h>
61 static void renesas_sdhi_sdbuf_width(struct tmio_mmc_host *host, int width) in renesas_sdhi_sdbuf_width()
[all …]
H A Dsdhci-of-esdhc.c1 // SPDX-License-Identifier: GPL-2.0-or-later
17 #include <linux/delay.h>
22 #include <linux/dma-mapping.h>
26 #include "sdhci-pltfm.h"
27 #include "sdhci-esdhc.h"
35 const unsigned int sd_dflt_max_clk;
36 const unsigned int max_clk[MMC_TIMING_NUM];
71 { .compatible = "fsl,ls1021a-esdhc", .data = &ls1021a_esdhc_clk},
72 { .compatible = "fsl,ls1043a-esdhc", .data = &ls1043a_esdhc_clk},
73 { .compatible = "fsl,ls1046a-esdhc", .data = &ls1046a_esdhc_clk},
[all …]
/openbmc/u-boot/drivers/mmc/
H A Dmtk-sd.c1 // SPDX-License-Identifier: GPL-2.0
268 /* whether to use gpio detection or built-in hw detection */
290 setbits_le32(&host->base->msdc_cfg, MSDC_CFG_RST); in msdc_reset_hw()
292 readl_poll_timeout(&host->base->msdc_cfg, reg, in msdc_reset_hw()
300 setbits_le32(&host->base->msdc_fifocs, MSDC_FIFOCS_CLR); in msdc_fifo_clr()
302 readl_poll_timeout(&host->base->msdc_fifocs, reg, in msdc_fifo_clr()
308 return (readl(&host->base->msdc_fifocs) & in msdc_fifo_rx_bytes()
314 return (readl(&host->base->msdc_fifocs) & in msdc_fifo_tx_bytes()
318 static u32 msdc_cmd_find_resp(struct msdc_host *host, struct mmc_cmd *cmd) in msdc_cmd_find_resp() argument
322 switch (cmd->resp_type) { in msdc_cmd_find_resp()
[all …]
H A Dsunxi_mmc.c1 // SPDX-License-Identifier: GPL-2.0+
3 * (C) Copyright 2007-2011
22 #include <asm-generic/gpio.h>
40 int cd_inverted; /* Inverted Card Detect */
52 static int sunxi_mmc_getcd_gpio(int sdc_no) in sunxi_mmc_getcd_gpio()
60 return -EINVAL; in sunxi_mmc_getcd_gpio()
63 static int mmc_resource_init(int sdc_no) in mmc_resource_init()
67 int cd_pin, ret = 0; in mmc_resource_init()
73 priv->reg = (struct sunxi_mmc *)SUNXI_MMC0_BASE; in mmc_resource_init()
74 priv->mclkreg = &ccm->sd0_clk_cfg; in mmc_resource_init()
[all …]
H A Dfsl_esdhc.c1 // SPDX-License-Identifier: GPL-2.0+
3 * Copyright 2007, 2010-2011 Freescale Semiconductor, Inc
8 * Kyle Harris, Nexus Technologies, Inc. kharris@nexus-tech.net
25 #include <asm-generic/gpio.h>
54 uint autoc12err; /* Auto CMD error status register */
110 * @non_removable: 0: removable; 1: non-removable
124 unsigned int sdhc_clk;
126 unsigned int clock;
127 unsigned int mode;
128 unsigned int bus_width;
[all …]
H A Dmmc.c1 // SPDX-License-Identifier: GPL-2.0+
13 #include <dm/device-internal.h>
24 static int mmc_set_signal_voltage(struct mmc *mmc, uint signal_voltage);
25 static int mmc_power_cycle(struct mmc *mmc);
27 static int mmc_select_mode_and_width(struct mmc *mmc, uint card_caps);
33 static int mmc_wait_dat0(struct mmc *mmc, int state, int timeout) in mmc_wait_dat0()
35 return -ENOSYS; in mmc_wait_dat0()
39 __weak int board_mmc_getwp(struct mmc *mmc) in board_mmc_getwp()
41 return -1; in board_mmc_getwp()
44 int mmc_getwp(struct mmc *mmc) in mmc_getwp()
[all …]
/openbmc/linux/include/linux/mmc/
H A Dhost.h1 /* SPDX-License-Identifier: GPL-2.0-only */
12 #include <linux/fault-inject.h>
17 #include <linux/dma-direction.h>
18 #include <linux/blk-crypto-profile.h>
21 unsigned int clock; /* clock rate */
23 unsigned int power_delay_ms; /* waiting for stable power */
125 int err);
129 int (*request_atomic)(struct mmc_host *host,
141 * ios->clock might be 0. For some controllers, setting 0Hz
151 * 1 for a read-only card
[all …]
/openbmc/u-boot/arch/arm/dts/
H A Drk3399-rock960.dtsi1 // SPDX-License-Identifier: GPL-2.0+
6 #include <dt-bindings/pwm/pwm.h>
7 #include <dt-bindings/pinctrl/rockchip.h>
11 vcc1v8_s0: vcc1v8-s0 {
12 compatible = "regulator-fixed";
13 regulator-name = "vcc1v8_s0";
14 regulator-min-microvolt = <1800000>;
15 regulator-max-microvolt = <1800000>;
16 regulator-always-on;
19 vcc_sys: vcc-sys {
[all …]
/openbmc/linux/arch/arm64/boot/dts/rockchip/
H A Drk3399-rock960.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
9 #include "rk3399-opp.dtsi"
10 #include <dt-bindings/interrupt-controller/irq.h>
19 sdio_pwrseq: sdio-pwrseq {
20 compatible = "mmc-pwrseq-simple";
22 clock-names = "ext_clock";
23 pinctrl-names = "default";
24 pinctrl-0 = <&wifi_enable_h>;
25 reset-gpios = <&gpio0 RK_PB2 GPIO_ACTIVE_LOW>;
28 vcc12v_dcin: vcc12v-dcin {
[all …]

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