| /openbmc/skeleton/pysystemmgr/obmc/system/ |
| H A D | __init__.py | 17 GPIO_BASE = find_gpio_base() variable
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| /openbmc/u-boot/drivers/pch/ |
| H A D | pch7.c | 10 #define GPIO_BASE 0x44 macro
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| H A D | pch9.c | 10 #define GPIO_BASE 0x48 macro
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| /openbmc/openbmc-test-automation/data/ |
| H A D | Palmetto.py | 6 GPIO_BASE = 320 variable
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| /openbmc/linux/drivers/staging/media/atomisp/pci/ |
| H A D | system_local.c | 102 const hrt_address GPIO_BASE[N_GPIO_ID] = { variable
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| /openbmc/u-boot/arch/arm/include/asm/arch-lpc32xx/ |
| H A D | cpu.h | 28 #define GPIO_BASE 0x40028000 /* GPIO registers base */ macro
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| /openbmc/u-boot/arch/x86/cpu/quark/ |
| H A D | Kconfig | 103 config GPIO_BASE config
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| /openbmc/u-boot/board/aspeed/evb_ast2600/ |
| H A D | evb_ast2600.c | 15 #define GPIO_BASE 0x1e780000 macro
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| /openbmc/u-boot/board/aspeed/ast2600_dcscm/ |
| H A D | ast2600_dcscm.c | 15 #define GPIO_BASE 0x1e780000 macro
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| /openbmc/linux/drivers/mfd/ |
| H A D | lpc_sch.c | 25 #define GPIO_BASE 0x44 macro
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| /openbmc/u-boot/arch/arm/mach-aspeed/ast2600/ |
| H A D | platform.S | 64 #define GPIO_BASE 0x1e780000 macro
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| /openbmc/u-boot/arch/x86/cpu/ivybridge/ |
| H A D | bd82x6x.c | 23 #define GPIO_BASE 0x48 macro
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| /openbmc/u-boot/cmd/aspeed/nettest/ |
| H A D | mem_io.h | 24 #define GPIO_BASE 0x1e780000 macro
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| /openbmc/u-boot/drivers/gpio/ |
| H A D | kona_gpio.c | 10 #define GPIO_BASE (void *)GPIO2_BASE_ADDR macro
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| /openbmc/u-boot/board/aspeed/ast2600_intel/ |
| H A D | intel.c | 52 #define GPIO_BASE 0x1e780000 macro
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| /openbmc/u-boot/arch/mips/mach-jz47xx/include/mach/ |
| H A D | jz4780.h | 23 #define GPIO_BASE 0xb0010000 macro
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| /openbmc/u-boot/arch/x86/include/asm/arch-broadwell/ |
| H A D | pch.h | 16 #define GPIO_BASE 0x48 /* LPC GPIO Base Address Register */ macro
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| /openbmc/linux/drivers/leds/ |
| H A D | leds-ss4200.c | 30 #define GPIO_BASE 0x048 macro
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| /openbmc/u-boot/arch/x86/include/asm/arch-ivybridge/ |
| H A D | pch.h | 72 #define GPIO_BASE 0x48 /* LPC GPIO Base Address Register */ macro
95 #define GPIO_BASE 0x48 /* LPC GPIO Base Address Register */ macro
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| /openbmc/linux/drivers/pinctrl/mediatek/ |
| H A D | pinctrl-mt7986.c | 61 GPIO_BASE, enumerator
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| /openbmc/u-boot/board/renesas/sh7785lcr/ |
| H A D | lowlevel_init.S | 188 #define GPIO_BASE 0xffe70000 macro
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| /openbmc/u-boot/arch/sh/include/asm/ |
| H A D | cpu_sh7753.h | 193 #define GPIO_BASE ((struct gpio_regs *)0xffec0000) macro
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| H A D | cpu_sh7752.h | 193 #define GPIO_BASE ((struct gpio_regs *)0xffec0000) macro
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| /openbmc/u-boot/arch/arm/mach-rmobile/include/mach/ |
| H A D | r8a7740.h | 18 #define GPIO_BASE 0xE6050000 macro
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| /openbmc/linux/drivers/pinctrl/ |
| H A D | pinctrl-xway.c | 42 #define GPIO_BASE(p) (REG_OFF * PORT(p)) macro
|