#
301b94d4 |
| 05-Sep-2019 |
Jerome Brunet <jbrunet@baylibre.com> |
arm64: dts: meson: axg: fix audio fifo reg size The register region size initially is too small to access all the fifo registers. Fixes: f2b8f6a93357 ("arm64: dts: meson-axg: ad
arm64: dts: meson: axg: fix audio fifo reg size The register region size initially is too small to access all the fifo registers. Fixes: f2b8f6a93357 ("arm64: dts: meson-axg: add audio fifos") Signed-off-by: Jerome Brunet <jbrunet@baylibre.com> Signed-off-by: Kevin Hilman <khilman@baylibre.com>
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#
01efc19c |
| 23-Aug-2019 |
Neil Armstrong <narmstrong@baylibre.com> |
arm64: dts: meson-axg: fix MHU compatible This fixes the following DT schemas check errors: meson-axg-s400.dt.yaml: mailbox@ff63c404: compatible:0: 'amlogic,meson-gx-mhu' is not one of [
arm64: dts: meson-axg: fix MHU compatible This fixes the following DT schemas check errors: meson-axg-s400.dt.yaml: mailbox@ff63c404: compatible:0: 'amlogic,meson-gx-mhu' is not one of ['amlogic,meson-gxbb-mhu'] Signed-off-by: Neil Armstrong <narmstrong@baylibre.com> Signed-off-by: Kevin Hilman <khilman@baylibre.com>
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#
3ad6c9e3 |
| 23-Aug-2019 |
Neil Armstrong <narmstrong@baylibre.com> |
arm64: dts: meson: fix ethernet mac reg format This fixes the following DT schemas check errors: meson-axg-s400.dt.yaml: soc: ethernet@ff3f0000:reg:0: [0, 4282318848, 0, 65536, 0, 428469
arm64: dts: meson: fix ethernet mac reg format This fixes the following DT schemas check errors: meson-axg-s400.dt.yaml: soc: ethernet@ff3f0000:reg:0: [0, 4282318848, 0, 65536, 0, 4284695872, 0, 8] is too long meson-axg-s400.dt.yaml: ethernet@ff3f0000: reg: [[0, 4282318848, 0, 65536, 0, 4284695872, 0, 8]] is too short meson-g12a-u200.dt.yaml: soc: ethernet@ff3f0000:reg:0: [0, 4282318848, 0, 65536, 0, 4284695872, 0, 8] is too long meson-g12a-u200.dt.yaml: ethernet@ff3f0000: reg: [[0, 4282318848, 0, 65536, 0, 4284695872, 0, 8]] is too short meson-gxbb-nanopi-k2.dt.yaml: soc: ethernet@c9410000:reg:0: [0, 3376480256, 0, 65536, 0, 3364046144, 0, 4] is too long meson-gxl-s805x-libretech-ac.dt.yaml: soc: ethernet@c9410000:reg:0: [0, 3376480256, 0, 65536, 0, 3364046144, 0, 4] is too lon while here, also drop the redundant reg property from meson-gxl.dtsi because it had the same value as meson-gx.dtsi from which it inherits. Signed-off-by: Neil Armstrong <narmstrong@baylibre.com> Reviewed-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com> Signed-off-by: Kevin Hilman <khilman@baylibre.com>
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Revision tags: v5.2.5, v5.2.4, v5.2.3, v5.2.2 |
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#
ef68984e |
| 18-Jul-2019 |
Jerome Brunet <jbrunet@baylibre.com> |
arm64: dts: meson: add ethernet fifo sizes If unspecified in DT, the fifo sizes are not automatically detected by the dwmac1000 dma driver and the reported fifo sizes default to 0. B
arm64: dts: meson: add ethernet fifo sizes If unspecified in DT, the fifo sizes are not automatically detected by the dwmac1000 dma driver and the reported fifo sizes default to 0. Because of this, flow control will be turned off on the device. Add the fifo sizes provided by the datasheets in the SoC in DT so flow control may be enabled if necessary. Signed-off-by: Jerome Brunet <jbrunet@baylibre.com> Reviewed-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com> Reviewed-by: Kevin Hilman <khilman@baylibre.com> Signed-off-by: Kevin Hilman <khilman@baylibre.com>
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Revision tags: v5.2.1, v5.2, v5.1.16, v5.1.15, v5.1.14, v5.1.13, v5.1.12, v5.1.11, v5.1.10, v5.1.9, v5.1.8, v5.1.7, v5.1.6, v5.1.5 |
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#
9d63f5d1 |
| 24-May-2019 |
Jerome Brunet <jbrunet@baylibre.com> |
arm64: dts: meson: add dwmac-3.70a to ethmac compatible list After discussing with Amlogic, the Synopsys GMAC version used by the gx and axg family is the 3.70a. Set this is in DT
arm64: dts: meson: add dwmac-3.70a to ethmac compatible list After discussing with Amlogic, the Synopsys GMAC version used by the gx and axg family is the 3.70a. Set this is in DT Signed-off-by: Jerome Brunet <jbrunet@baylibre.com> Reviewed-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com> Signed-off-by: Kevin Hilman <khilman@baylibre.com>
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Revision tags: v5.1.4, v5.1.3, v5.1.2, v5.1.1, v5.0.14, v5.1, v5.0.13, v5.0.12, v5.0.11, v5.0.10, v5.0.9 |
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#
b43033b1 |
| 18-Apr-2019 |
Jerome Brunet <jbrunet@baylibre.com> |
arm64: dts: meson: fix mmc pin bias Clk pin does not require bias, data strobe should be pulled low. The rest of the pin (data and cmd) are pulled up. Signed-off-by: Jerome Brun
arm64: dts: meson: fix mmc pin bias Clk pin does not require bias, data strobe should be pulled low. The rest of the pin (data and cmd) are pulled up. Signed-off-by: Jerome Brunet <jbrunet@baylibre.com> Signed-off-by: Kevin Hilman <khilman@baylibre.com>
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#
e7b98491 |
| 15-Feb-2019 |
Arnd Bergmann <arnd@arndb.de> |
Merge tag 'amlogic-dt64' of git://git.kernel.org/pub/scm/linux/kernel/git/khilman/linux-amlogic into arm/dt arm64: dts: Amlogic updates for v5.1 - new board: G12a-based x96 max - G12
Merge tag 'amlogic-dt64' of git://git.kernel.org/pub/scm/linux/kernel/git/khilman/linux-amlogic into arm/dt arm64: dts: Amlogic updates for v5.1 - new board: G12a-based x96 max - G12a: add peripheral clock controller and clock measure support - s400: fix SD/eMMC max rate issues - s400: audio: add sp/dif in support - GX: support simplefb * tag 'amlogic-dt64' of git://git.kernel.org/pub/scm/linux/kernel/git/khilman/linux-amlogic: arm64: dts: meson: add g12a x96 max board dt-bindings: arm: amlogic: add amediatech x96-max bindings arm64: dts: meson: g12a: add peripheral clock controller arm64: dts: meson: g12a: add clk measure support arm64: dts: meson: axg: add clk measure support arm64: dts: meson: fix g12a buses arm64: dts: meson-axg: add efuse device arm64: dts: meson: s400: fix emmc maximum rate arm64: dts: meson: s400: enable sdr104 on sdio arm64: dts: meson-gx: add support for simplefb dt-bindings: meson: add specific simplefb bindings arm64: dts: meson-gx: Add canvas provider node to the vpu arm64: dts: meson-axg: s400: add spdifin to the sound card arm64: dts: meson-axg: s400: add spdif-dir codec arm64: dts: meson-axg: add spdifin Signed-off-by: Arnd Bergmann <arnd@arndb.de>
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Revision tags: v5.0.8, v5.0.7, v5.0.6, v5.0.5, v5.0.4, v5.0.3, v4.19.29, v5.0.2, v4.19.28, v5.0.1, v4.19.27, v5.0, v4.19.26, v4.19.25, v4.19.24, v4.19.23, v4.19.22, v4.19.21, v4.19.20, v4.19.19, v4.19.18, v4.19.17 |
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#
fea888bd |
| 18-Jan-2019 |
Jerome Brunet <jbrunet@baylibre.com> |
arm64: dts: meson: axg: add clk measure support Add the clock measure device to the axg SoC family Signed-off-by: Jerome Brunet <jbrunet@baylibre.com> Reviewed-by: Martin Blumen
arm64: dts: meson: axg: add clk measure support Add the clock measure device to the axg SoC family Signed-off-by: Jerome Brunet <jbrunet@baylibre.com> Reviewed-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com> Signed-off-by: Kevin Hilman <khilman@baylibre.com>
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Revision tags: v4.19.16 |
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#
31af04cd |
| 14-Jan-2019 |
Rob Herring <robh@kernel.org> |
arm64: dts: Remove inconsistent use of 'arm,armv8' compatible string The 'arm,armv8' compatible string is only for software models. It adds little value otherwise and is inconsistently u
arm64: dts: Remove inconsistent use of 'arm,armv8' compatible string The 'arm,armv8' compatible string is only for software models. It adds little value otherwise and is inconsistently used as a fallback on some platforms. Remove it from those platforms. This fixes warnings generated by the DT schema. Reported-by: Michal Simek <michal.simek@xilinx.com> Cc: Mark Rutland <mark.rutland@arm.com> Cc: Will Deacon <will.deacon@arm.com> Acked-by: Antoine Tenart <antoine.tenart@bootlin.com> Acked-by: Nishanth Menon <nm@ti.com> Acked-by: Maxime Ripard <maxime.ripard@bootlin.com> Acked-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> Acked-by: Chanho Min <chanho.min@lge.com> Acked-by: Krzysztof Kozlowski <krzk@kernel.org> Acked-by: Masahiro Yamada <yamada.masahiro@socionext.com> Acked-by: Gregory CLEMENT <gregory.clement@bootlin.com> Acked-by: Thierry Reding <treding@nvidia.com> Acked-by: Heiko Stuebner <heiko@sntech.de> Acked-by: Simon Horman <horms+renesas@verge.net.au> Acked-by: Tero Kristo <t-kristo@ti.com> Acked-by: Wei Xu <xuwei5@hisilicon.com> Acked-by: Liviu Dudau <liviu.dudau@arm.com> Acked-by: Matthias Brugger <matthias.bgg@gmail.com> Acked-by: Michal Simek <michal.simek@xilinx.com> Acked-by: Scott Branden <scott.branden@broadcom.com> Acked-by: Kevin Hilman <khilman@baylibre.com> Acked-by: Chunyan Zhang <zhang.lyra@gmail.com> Acked-by: Robert Richter <rrichter@cavium.com> Acked-by: Jisheng Zhang <Jisheng.Zhang@synaptics.com> Acked-by: Dinh Nguyen <dinguyen@kernel.org> Signed-off-by: Rob Herring <robh@kernel.org> Signed-off-by: Arnd Bergmann <arnd@arndb.de>
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#
9ab2d15c |
| 17-Jan-2019 |
Jerome Brunet <jbrunet@baylibre.com> |
arm64: dts: meson-axg: add efuse device Add efuse to the AXG family Signed-off-by: Jerome Brunet <jbrunet@baylibre.com> Signed-off-by: Kevin Hilman <khilman@baylibre.com>
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Revision tags: v4.19.15, v4.19.14, v4.19.13, v4.19.12, v4.19.11, v4.19.10 |
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#
5e6a18ac |
| 13-Dec-2018 |
Jerome Brunet <jbrunet@baylibre.com> |
arm64: dts: meson-axg: add spdifin Add the SPDIF input device of the axg audio subsystem Signed-off-by: Jerome Brunet <jbrunet@baylibre.com> Signed-off-by: Kevin Hilman <khilman
arm64: dts: meson-axg: add spdifin Add the SPDIF input device of the axg audio subsystem Signed-off-by: Jerome Brunet <jbrunet@baylibre.com> Signed-off-by: Kevin Hilman <khilman@baylibre.com>
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Revision tags: v4.19.9, v4.19.8 |
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#
8b3e6f89 |
| 07-Dec-2018 |
Carlo Caione <ccaione@baylibre.com> |
arm64: dts: meson: Fix IRQ trigger type for macirq A long running stress test on a custom board shipping an AXG SoCs and a Realtek RTL8211F PHY revealed that after a few hours the connec
arm64: dts: meson: Fix IRQ trigger type for macirq A long running stress test on a custom board shipping an AXG SoCs and a Realtek RTL8211F PHY revealed that after a few hours the connection speed would drop drastically, from ~1000Mbps to ~3Mbps. At the same time the 'macirq' (eth0) IRQ would stop being triggered at all and as consequence the GMAC IRQs never ACKed. After a painful investigation the problem seemed to be due to a wrong defined IRQ type for the GMAC IRQ that should be LEVEL_HIGH instead of EDGE_RISING. The change in the macirq IRQ type also solved another long standing issue affecting this SoC/PHY where EEE was causing the network connection to die after stressing it with iperf3 (even though much sooner). It's now possible to remove the 'eee-broken-1000t' quirk as well. Fixes: feb3cbea0946 ("ARM64: dts: meson-gxbb-odroidc2: fix GbE tx link breakage") Fixes: 6d28d577510f ("ARM64: dts: meson-axg: fix ethernet stability issue") Reviewed-by: Jerome Brunet <jbrunet@baylibre.com> Tested-by: Jerome Brunet <jbrunet@baylibre.com> Acked-by: Neil Armstrong <narmstrong@baylibre.com> Signed-off-by: Carlo Caione <ccaione@baylibre.com> Signed-off-by: Kevin Hilman <khilman@baylibre.com>
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Revision tags: v4.19.7 |
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#
cbddb02e |
| 01-Dec-2018 |
Carlo Caione <ccaione@baylibre.com> |
arm64: dts: meson-axg: Enable GPIO interrupt controller Enable the GPIO interrupt controller for the AXG SoCs. Signed-off-by: Carlo Caione <ccaione@baylibre.com> Reviewed-by: Je
arm64: dts: meson-axg: Enable GPIO interrupt controller Enable the GPIO interrupt controller for the AXG SoCs. Signed-off-by: Carlo Caione <ccaione@baylibre.com> Reviewed-by: Jerome Brunet <jbrunet@baylibre.com> Tested-by: Jerome Brunet <jbrunet@baylibre.com> Signed-off-by: Kevin Hilman <khilman@baylibre.com>
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#
16361ff2 |
| 03-Dec-2018 |
Jerome Brunet <jbrunet@baylibre.com> |
arm64: dts: meson: add clock controller clock inputs Add the clock inputs of the clock controllers Signed-off-by: Jerome Brunet <jbrunet@baylibre.com> Signed-off-by: Kevin Hilma
arm64: dts: meson: add clock controller clock inputs Add the clock inputs of the clock controllers Signed-off-by: Jerome Brunet <jbrunet@baylibre.com> Signed-off-by: Kevin Hilman <khilman@baylibre.com>
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Revision tags: v4.19.6 |
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#
ed85b343 |
| 29-Nov-2018 |
Jerome Brunet <jbrunet@baylibre.com> |
arm64: dts: meson-axg: remove alternate xtal There is actually no alternate xtal on any of the axg board I have seen so far. The 32k is actually generated internally, deriving from t
arm64: dts: meson-axg: remove alternate xtal There is actually no alternate xtal on any of the axg board I have seen so far. The 32k is actually generated internally, deriving from the 24MHz main xtal. Amlogic SoC also have the option to provide the 32k reference externally, through one of the AO pads, but no platform is using this ATM. Fixes: 5e395e146667 ("ARM64: dts: meson-axg: add an 32K alt aoclk") Signed-off-by: Jerome Brunet <jbrunet@baylibre.com> Signed-off-by: Kevin Hilman <khilman@baylibre.com>
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Revision tags: v4.19.5 |
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#
6f31ba17 |
| 23-Nov-2018 |
Carlo Caione <ccaione@baylibre.com> |
arm64: dts: meson-axg: Enable watchdog on Meson AXG SoCs Add the watchdog node also on the AXG platforms. Signed-off-by: Carlo Caione <ccaione@baylibre.com> Reviewed-by: Neil Ar
arm64: dts: meson-axg: Enable watchdog on Meson AXG SoCs Add the watchdog node also on the AXG platforms. Signed-off-by: Carlo Caione <ccaione@baylibre.com> Reviewed-by: Neil Armstrong <narmstrong@baylibre.com> Signed-off-by: Kevin Hilman <khilman@baylibre.com>
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Revision tags: v4.19.4, v4.18.20, v4.19.3, v4.18.19, v4.19.2, v4.18.18 |
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#
1c5cc1c8 |
| 09-Nov-2018 |
Jerome Brunet <jbrunet@baylibre.com> |
arm64: dts: meson: consistently disable pin bias On Amlogic chipsets, the bias set through pinconf applies to the pad itself, not only the GPIO function. This means that even when we cha
arm64: dts: meson: consistently disable pin bias On Amlogic chipsets, the bias set through pinconf applies to the pad itself, not only the GPIO function. This means that even when we change the function of the pad from GPIO to anything else, the bias previously set still applies. As we have seen with the eMMC, depending on the bias type and the function, it may trigger problems. The underlying issue is that we inherit whatever was left by previous user of the pad (pinconf, u-boot or the ROM code). As a consequence, the actual setup we will get is undefined. There is nothing mentioned in the documentation about pad bias and pinmux function, however leaving it undefined is not an option. This change consistently disable the pad bias for every pinmux functions. It seems to work well, we can only assume that the necessary bias (if any) is already provided by the pin function itself. Signed-off-by: Jerome Brunet <jbrunet@baylibre.com> Signed-off-by: Kevin Hilman <khilman@baylibre.com>
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#
96a13691 |
| 09-Nov-2018 |
Jerome Brunet <jbrunet@baylibre.com> |
arm64: dts: meson: disable pad bias for mmc pinmuxes In some cases (such as a boot from SPI) the bootloader or the ROM code may leave a bias pull-down on the mmc pins. If so the MMC will
arm64: dts: meson: disable pad bias for mmc pinmuxes In some cases (such as a boot from SPI) the bootloader or the ROM code may leave a bias pull-down on the mmc pins. If so the MMC will fail during the initialisation. Explicitly disabling the pinmux solves the problem. Signed-off-by: Jerome Brunet <jbrunet@baylibre.com> Signed-off-by: Kevin Hilman <khilman@baylibre.com>
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#
06096d7a |
| 09-Nov-2018 |
Jerome Brunet <jbrunet@baylibre.com> |
arm64: dts: meson: remove extra subnode in mmc clk_gate pinmux In the pinmux of the mmc clk_gate nodes, we define 2 subnodes. One for the function definition, the other for the bias. Thi
arm64: dts: meson: remove extra subnode in mmc clk_gate pinmux In the pinmux of the mmc clk_gate nodes, we define 2 subnodes. One for the function definition, the other for the bias. This is not necessary since we can define the function and the bias in the same subnode. Signed-off-by: Jerome Brunet <jbrunet@baylibre.com> Signed-off-by: Kevin Hilman <khilman@baylibre.com>
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#
2c130695 |
| 08-Nov-2018 |
Jerome Brunet <jbrunet@baylibre.com> |
arm64: dts: meson-axg: enable SCPI Enable SCPI on the axg platform, with cpu clock and hwmon (core temperature) support Signed-off-by: Jerome Brunet <jbrunet@baylibre.com> R
arm64: dts: meson-axg: enable SCPI Enable SCPI on the axg platform, with cpu clock and hwmon (core temperature) support Signed-off-by: Jerome Brunet <jbrunet@baylibre.com> Reviewed-by: Neil Armstrong <narmstrong@baylibre.com> Signed-off-by: Kevin Hilman <khilman@baylibre.com>
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#
9c2d16bb |
| 08-Nov-2018 |
Jerome Brunet <jbrunet@baylibre.com> |
arm64: dts: meson-axg: correct sram shared mem unit-address Correct the unit-address in the node name of the SRAM shared memory Signed-off-by: Jerome Brunet <jbrunet@baylibre.com>
arm64: dts: meson-axg: correct sram shared mem unit-address Correct the unit-address in the node name of the SRAM shared memory Signed-off-by: Jerome Brunet <jbrunet@baylibre.com> Reviewed-by: Neil Armstrong <narmstrong@baylibre.com> Signed-off-by: Kevin Hilman <khilman@baylibre.com>
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#
9fdff382 |
| 08-Nov-2018 |
Jerome Brunet <jbrunet@baylibre.com> |
arm64: dts: meson-axg: fix mailbox address MHU mailbox address is wrong. Fixing it enables the mailboxes on the A113. These mailboxes are needed for SCPI Fixes: 9d59b708500f ("a
arm64: dts: meson-axg: fix mailbox address MHU mailbox address is wrong. Fixing it enables the mailboxes on the A113. These mailboxes are needed for SCPI Fixes: 9d59b708500f ("arm64: dts: meson-axg: add initial A113D SoC DT support") Signed-off-by: Jerome Brunet <jbrunet@baylibre.com> Reviewed-by: Neil Armstrong <narmstrong@baylibre.com> Signed-off-by: Kevin Hilman <khilman@baylibre.com>
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#
96dc5702 |
| 08-Nov-2018 |
Jerome Brunet <jbrunet@baylibre.com> |
arm64: dts: meson-axg: add secure monitor Add the secure monitor device to the axg platform. With this, we can read the SoC serial number. Signed-off-by: Jerome Brunet <jbrunet@
arm64: dts: meson-axg: add secure monitor Add the secure monitor device to the axg platform. With this, we can read the SoC serial number. Signed-off-by: Jerome Brunet <jbrunet@baylibre.com> Reviewed-by: Neil Armstrong <narmstrong@baylibre.com> Signed-off-by: Kevin Hilman <khilman@baylibre.com>
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#
fbd5cbc5 |
| 08-Nov-2018 |
Jerome Brunet <jbrunet@baylibre.com> |
arm64: dts: meson-axg: fix dtc warning about unit address section 2.2.1 of the DT specs says: " If the node has no reg property, the @unit-address must be omitted and the node-name alone
arm64: dts: meson-axg: fix dtc warning about unit address section 2.2.1 of the DT specs says: " If the node has no reg property, the @unit-address must be omitted and the node-name alone differentiates the node from other nodes at the same level in the tree" Simply replace the '@' with a '-' to fix this warning. Cc: Fabio Estevam <festevam@gmail.com> Cc: Martin Blumenstingl <martin.blumenstingl@googlemail.com> Signed-off-by: Jerome Brunet <jbrunet@baylibre.com> Reviewed-by: Neil Armstrong <narmstrong@baylibre.com> Signed-off-by: Kevin Hilman <khilman@baylibre.com>
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Revision tags: v4.18.17, v4.19.1, v4.19, v4.18.16, v4.18.15, v4.18.14, v4.18.13, v4.18.12, v4.18.11, v4.18.10, v4.18.9 |
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#
445f2bda |
| 13-Sep-2018 |
Neil Armstrong <narmstrong@baylibre.com> |
arm64: dts: meson: Switch simple-mfd and syscon order The order between "syscon" and "simple-mfd" is important because in these particular cases, the node needs to be first a "simple-mfd
arm64: dts: meson: Switch simple-mfd and syscon order The order between "syscon" and "simple-mfd" is important because in these particular cases, the node needs to be first a "simple-mfd" to expose it's sub-nodes, and later on a "syscon" to permit other nodes to access this register space through the "syscon" mechanism. Signed-off-by: Neil Armstrong <narmstrong@baylibre.com> Signed-off-by: Kevin Hilman <khilman@baylibre.com>
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