#
76e77bf5 |
| 18-Sep-2018 |
Philipp Zabel <p.zabel@pengutronix.de> |
gpu: ipu-v3: image-convert: move tile alignment helpers
Move tile_width_align and tile_height_align up so they can be used by the tile edge position calculation code.
Signed-off-by: Philipp Zabel <
gpu: ipu-v3: image-convert: move tile alignment helpers
Move tile_width_align and tile_height_align up so they can be used by the tile edge position calculation code.
Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de> Acked-by: Steve Longerbeam <slongerbeam@gmail.com> Tested-by: Steve Longerbeam <slongerbeam@gmail.com>
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#
26ddd032 |
| 18-Sep-2018 |
Philipp Zabel <p.zabel@pengutronix.de> |
gpu: ipu-v3: image-convert: calculate tile dimensions and offsets outside fill_image
This will allow to calculate seam positions after initializing the ipu_image base structure but before calculatin
gpu: ipu-v3: image-convert: calculate tile dimensions and offsets outside fill_image
This will allow to calculate seam positions after initializing the ipu_image base structure but before calculating tile dimensions.
Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de> Acked-by: Steve Longerbeam <slongerbeam@gmail.com> Tested-by: Steve Longerbeam <slongerbeam@gmail.com>
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#
571dd82c |
| 18-Sep-2018 |
Philipp Zabel <p.zabel@pengutronix.de> |
gpu: ipu-v3: image-convert: store tile top/left position
Store tile top/left position in pixels in the tile structure. This will allow overlapping tiles with different sizes later.
Signed-off-by: P
gpu: ipu-v3: image-convert: store tile top/left position
Store tile top/left position in pixels in the tile structure. This will allow overlapping tiles with different sizes later.
Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de> Acked-by: Steve Longerbeam <slongerbeam@gmail.com> Tested-by: Steve Longerbeam <slongerbeam@gmail.com>
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#
0537db80 |
| 18-Sep-2018 |
Philipp Zabel <p.zabel@pengutronix.de> |
gpu: ipu-v3: image-convert: reconfigure IC per tile
For differently sized tiles or if the resizing coefficients change, we have to stop, reconfigure, and restart the IC between tiles.
Signed-off-by
gpu: ipu-v3: image-convert: reconfigure IC per tile
For differently sized tiles or if the resizing coefficients change, we have to stop, reconfigure, and restart the IC between tiles.
Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de> Acked-by: Steve Longerbeam <slongerbeam@gmail.com> Tested-by: Steve Longerbeam <slongerbeam@gmail.com>
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#
70b9b6b3 |
| 18-Sep-2018 |
Philipp Zabel <p.zabel@pengutronix.de> |
gpu: ipu-v3: image-convert: calculate per-tile resize coefficients
Slightly modifying resize coefficients per-tile allows to completely hide the seams between tiles and to sample the correct input p
gpu: ipu-v3: image-convert: calculate per-tile resize coefficients
Slightly modifying resize coefficients per-tile allows to completely hide the seams between tiles and to sample the correct input pixels at the bottom and right edges of the image.
Tiling requires a bilinear interpolator reset at each tile start, which causes the image to be slightly shifted if the starting pixel should not have been sampled from an integer pixel position in the source image according to the full image resizing ratio. To work around this hardware limitation, calculate per-tile resizing coefficients that make sure that the correct input pixels are sampled at the tile end.
Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de> Acked-by: Steve Longerbeam <slongerbeam@gmail.com> Tested-by: Steve Longerbeam <slongerbeam@gmail.com>
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#
dd65d2a9 |
| 18-Sep-2018 |
Philipp Zabel <p.zabel@pengutronix.de> |
gpu: ipu-v3: image-convert: prepare for per-tile configuration
Let convert_start start from a given tile index, allocate intermediate tile with maximum tile size.
Signed-off-by: Philipp Zabel <p.za
gpu: ipu-v3: image-convert: prepare for per-tile configuration
Let convert_start start from a given tile index, allocate intermediate tile with maximum tile size.
Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de> Acked-by: Steve Longerbeam <slongerbeam@gmail.com> Tested-by: Steve Longerbeam <slongerbeam@gmail.com>
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#
c4e45658 |
| 21-Sep-2018 |
Steve Longerbeam <slongerbeam@gmail.com> |
gpu: ipu-v3: image-convert: Catch unaligned tile offsets
Catch calculated tile offsets that are not 8-byte aligned as required by the IDMAC engine and return error in calc_tile_offsets().
Signed-of
gpu: ipu-v3: image-convert: Catch unaligned tile offsets
Catch calculated tile offsets that are not 8-byte aligned as required by the IDMAC engine and return error in calc_tile_offsets().
Signed-off-by: Steve Longerbeam <slongerbeam@gmail.com> Tested-by: Philipp Zabel <p.zabel@pengutronix.de> Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
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#
b288adad |
| 19-Sep-2018 |
Steve Longerbeam <slongerbeam@gmail.com> |
gpu: ipu-v3: image-convert: Remove need_abort flag
The need_abort flag is not really needed anymore in __ipu_image_convert_abort(), remove it. No functional changes.
Signed-off-by: Steve Longerbeam
gpu: ipu-v3: image-convert: Remove need_abort flag
The need_abort flag is not really needed anymore in __ipu_image_convert_abort(), remove it. No functional changes.
Signed-off-by: Steve Longerbeam <slongerbeam@gmail.com> Tested-by: Philipp Zabel <p.zabel@pengutronix.de> Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
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#
aa60b261 |
| 19-Sep-2018 |
Steve Longerbeam <slongerbeam@gmail.com> |
gpu: ipu-v3: image-convert: Allow reentrancy into abort
Allow reentrancy into ipu_image_convert_abort(), by moving re-init of ctx->aborted completion under the spin lock, and only if there is an act
gpu: ipu-v3: image-convert: Allow reentrancy into abort
Allow reentrancy into ipu_image_convert_abort(), by moving re-init of ctx->aborted completion under the spin lock, and only if there is an active run, and complete all waiters do_bh(). Note: ipu_image_convert_unprepare() is still _not_ reentrant, and can't be made reentrant.
Signed-off-by: Steve Longerbeam <slongerbeam@gmail.com> Tested-by: Philipp Zabel <p.zabel@pengutronix.de> Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
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#
920340ae |
| 19-Sep-2018 |
Steve Longerbeam <slongerbeam@gmail.com> |
gpu: ipu-v3: image-convert: Only wait for abort completion if active run
Only wait for the ctx->aborted completion if there is an active run in progress, otherwise the wait will just timeout after 1
gpu: ipu-v3: image-convert: Only wait for abort completion if active run
Only wait for the ctx->aborted completion if there is an active run in progress, otherwise the wait will just timeout after 10 seconds. If there is no active run in progress, the done queue just needs to be emptied.
Signed-off-by: Steve Longerbeam <slongerbeam@gmail.com> Tested-by: Philipp Zabel <p.zabel@pengutronix.de> Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
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#
819bec35 |
| 19-Sep-2018 |
Steve Longerbeam <slongerbeam@gmail.com> |
gpu: ipu-v3: image-convert: Prevent race between run and unprepare
Prevent possible race by parallel threads between ipu_image_convert_run() and ipu_image_convert_unprepare(). This involves setting
gpu: ipu-v3: image-convert: Prevent race between run and unprepare
Prevent possible race by parallel threads between ipu_image_convert_run() and ipu_image_convert_unprepare(). This involves setting ctx->aborting to true unconditionally so that no new job runs can be queued during unprepare, and holding the ctx->aborting flag until the context is freed.
Note that the "normal" ipu_image_convert_abort() case (e.g. not during context unprepare) should clear the ctx->aborting flag after aborting any active run and clearing the context's pending queue. This is because it should be possible to continue to use the conversion context and queue more runs after an abort.
Signed-off-by: Steve Longerbeam <slongerbeam@gmail.com> Tested-by: Philipp Zabel <p.zabel@pengutronix.de> Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
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#
dec408fd |
| 06-Oct-2018 |
Steve Longerbeam <slongerbeam@gmail.com> |
gpu: ipu-v3: Add chroma plane offset overrides to ipu_cpmem_set_image()
Allow the caller of ipu_cpmem_set_image() to override the latters calculation of the chroma plane offsets, by adding override
gpu: ipu-v3: Add chroma plane offset overrides to ipu_cpmem_set_image()
Allow the caller of ipu_cpmem_set_image() to override the latters calculation of the chroma plane offsets, by adding override U/V plane offsets to 'struct ipu_image'.
Signed-off-by: Steve Longerbeam <slongerbeam@gmail.com> Tested-by: Philipp Zabel <p.zabel@pengutronix.de> Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
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Revision tags: v4.18.7, v4.18.6, v4.18.5, v4.17.18, v4.18.4, v4.18.3, v4.17.17, v4.18.2, v4.17.16, v4.17.15, v4.18.1, v4.18, v4.17.14, v4.17.13, v4.17.12 |
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#
5c41bb60 |
| 02-Aug-2018 |
Philipp Zabel <p.zabel@pengutronix.de> |
gpu: ipu-v3: add support for XRGB32 and XBGR32 V4L2 pixel formats
These should be used instead of the ill-defined deprecated RGB32 and BGR32 V4L2 pixel formats.
Signed-off-by: Philipp Zabel <p.zabe
gpu: ipu-v3: add support for XRGB32 and XBGR32 V4L2 pixel formats
These should be used instead of the ill-defined deprecated RGB32 and BGR32 V4L2 pixel formats.
Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
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Revision tags: v4.17.11, v4.17.10, v4.17.9, v4.17.8, v4.17.7, v4.17.6, v4.17.5, v4.17.4, v4.17.3, v4.17.2, v4.17.1, v4.17, v4.16, v4.15, v4.13.16, v4.14, v4.13.5, v4.13, v4.12, v4.10.17, v4.10.16, v4.10.15, v4.10.14, v4.10.13, v4.10.12, v4.10.11, v4.10.10, v4.10.9, v4.10.8, v4.10.7, v4.10.6, v4.10.5, v4.10.4, v4.10.3, v4.10.2 |
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#
320a89ad |
| 08-Mar-2017 |
Lucas Stach <l.stach@pengutronix.de> |
gpu: ipu-v3: only set non-zero AXI ID for IC when PRG is absent
Using non-zero AXI IDs for anything other than the display channels collides with the PRG AXI snooping, so only do this if there is no
gpu: ipu-v3: only set non-zero AXI ID for IC when PRG is absent
Using non-zero AXI IDs for anything other than the display channels collides with the PRG AXI snooping, so only do this if there is no PRG present.
Signed-off-by: Lucas Stach <l.stach@pengutronix.de> Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
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Revision tags: v4.10.1, v4.10, v4.9, openbmc-4.4-20161121-1, v4.4.33, v4.4.32, v4.4.31, v4.4.30, v4.4.29, v4.4.28, v4.4.27, v4.7.10, openbmc-4.4-20161021-1, v4.7.9, v4.4.26, v4.7.8, v4.4.25, v4.4.24, v4.7.7, v4.8, v4.4.23, v4.7.6, v4.7.5, v4.4.22 |
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#
4ad3e92c |
| 21-Sep-2016 |
Wei Yongjun <weiyongjun1@huawei.com> |
gpu: ipu-v3: Use ERR_CAST instead of ERR_PTR(PTR_ERR())
Use ERR_CAST inlined function instead of ERR_PTR(PTR_ERR(...)).
Generated by: scripts/coccinelle/api/err_cast.cocci
Signed-off-by: Wei Yongj
gpu: ipu-v3: Use ERR_CAST instead of ERR_PTR(PTR_ERR())
Use ERR_CAST inlined function instead of ERR_PTR(PTR_ERR(...)).
Generated by: scripts/coccinelle/api/err_cast.cocci
Signed-off-by: Wei Yongjun <weiyongjun1@huawei.com> Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
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#
cd98e85a |
| 17-Sep-2016 |
Steve Longerbeam <slongerbeam@gmail.com> |
gpu: ipu-v3: Add queued image conversion support
This patch implements image conversion support using the IC tasks, with tiling to support scaling to and from images up to 4096x4096. Image rotation
gpu: ipu-v3: Add queued image conversion support
This patch implements image conversion support using the IC tasks, with tiling to support scaling to and from images up to 4096x4096. Image rotation is also supported. Image conversion requests are added to a run queue under the IC tasks.
The internal API is subsystem agnostic (no V4L2 dependency except for the use of V4L2 fourcc pixel formats).
Callers prepare for image conversion by calling ipu_image_convert_prepare(), which initializes the parameters of the conversion. The caller passes in the ipu and IC task to use for the conversion, the input and output image formats, a rotation mode, and a completion callback and completion context pointer:
struct ipu_image_converter_ctx * ipu_image_convert_prepare(struct ipu_soc *ipu, enum ipu_ic_task ic_task, struct ipu_image *in, struct ipu_image *out, enum ipu_rotate_mode rot_mode, ipu_image_converter_cb_t complete, void *complete_context);
A new conversion context is created that is added to an IC task context queue. The caller is given the new conversion context, which can then be passed to the further APIs:
int ipu_image_convert_queue(struct ipu_image_converter_run *run);
This queues the given image conversion request run to a run queue, and starts the conversion immediately if the run queue is empty. Only the physaddr's of the input and output image buffers are needed, since the conversion context was created previously with ipu_image_convert_prepare(). When the conversion completes, the run pointer is returned to the completion callback.
void ipu_image_convert_abort(struct ipu_image_converter_ctx *ctx);
This will abort any active or pending conversions for this context. Any currently active or pending runs belonging to this context are returned via the completion callback with an error status.
void ipu_image_convert_unprepare(struct ipu_image_converter_ctx *ctx);
Unprepares the conversion context. Any active or pending runs will be aborted by calling ipu_image_convert_abort().
Signed-off-by: Steve Longerbeam <steve_longerbeam@mentor.com> Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
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#
17d4cb08 |
| 25-Jun-2020 |
Steve Longerbeam <slongerbeam@gmail.com> |
gpu: ipu-v3: image-convert: Wait for all EOFs before completing a tile [ Upstream commit dd81d821d0b3f77d949d0cac5c05c1f05b921d46 ] Use a bit-mask of EOF irqs to determine when all
gpu: ipu-v3: image-convert: Wait for all EOFs before completing a tile [ Upstream commit dd81d821d0b3f77d949d0cac5c05c1f05b921d46 ] Use a bit-mask of EOF irqs to determine when all required idmac channel EOFs have been received for a tile conversion, and only do tile completion processing after all EOFs have been received. Otherwise it was found that a conversion would stall after the completion of a tile and the start of the next tile, because the input/read idmac channel had not completed and entered idle state, thus locking up the channel when attempting to re-start it for the next tile. Fixes: 0537db801bb01 ("gpu: ipu-v3: image-convert: reconfigure IC per tile") Signed-off-by: Steve Longerbeam <slongerbeam@gmail.com> Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de> Signed-off-by: Sasha Levin <sashal@kernel.org>
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#
5882f8f0 |
| 17-Jun-2020 |
Steve Longerbeam <slongerbeam@gmail.com> |
gpu: ipu-v3: image-convert: Combine rotate/no-rotate irq handlers [ Upstream commit 0f6245f42ce9b7e4d20f2cda8d5f12b55a44d7d1 ] Combine the rotate_irq() and norotate_irq() handlers i
gpu: ipu-v3: image-convert: Combine rotate/no-rotate irq handlers [ Upstream commit 0f6245f42ce9b7e4d20f2cda8d5f12b55a44d7d1 ] Combine the rotate_irq() and norotate_irq() handlers into a single eof_irq() handler. Signed-off-by: Steve Longerbeam <slongerbeam@gmail.com> Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de> Signed-off-by: Sasha Levin <sashal@kernel.org>
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Revision tags: v5.7.3, v5.4.47, v5.4.46, v5.7.2, v5.4.45, v5.7.1, v5.4.44, v5.7, v5.4.43, v5.4.42, v5.4.41, v5.4.40, v5.4.39, v5.4.38, v5.4.37, v5.4.36, v5.4.35, v5.4.34, v5.4.33, v5.4.32, v5.4.31, v5.4.30, v5.4.29, v5.6, v5.4.28, v5.4.27, v5.4.26, v5.4.25, v5.4.24, v5.4.23, v5.4.22, v5.4.21, v5.4.20, v5.4.19, v5.4.18, v5.4.17, v5.4.16, v5.5, v5.4.15, v5.4.14, v5.4.13, v5.4.12, v5.4.11, v5.4.10, v5.4.9, v5.4.8, v5.4.7, v5.4.6, v5.4.5, v5.4.4, v5.4.3, v5.3.15, v5.4.2, v5.4.1, v5.3.14, v5.4, v5.3.13, v5.3.12, v5.3.11, v5.3.10, v5.3.9, v5.3.8, v5.3.7, v5.3.6, v5.3.5, v5.3.4, v5.3.3, v5.3.2, v5.3.1, v5.3, v5.2.14, v5.3-rc8, v5.2.13, v5.2.12, v5.2.11, v5.2.10, v5.2.9 |
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#
4d243763 |
| 14-Aug-2019 |
Philipp Zabel <p.zabel@pengutronix.de> |
gpu: ipu-v3: image-convert: only sample into the next tile if necessary The first pixel of the next tile is only sampled by the hardware if the fractional input position corresponding to
gpu: ipu-v3: image-convert: only sample into the next tile if necessary The first pixel of the next tile is only sampled by the hardware if the fractional input position corresponding to the last written output pixel is not an integer position. Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
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#
fbefb84d |
| 14-Aug-2019 |
Philipp Zabel <p.zabel@pengutronix.de> |
gpu: ipu-v3: image-convert: move tile burst alignment out of loop Burst aligned input and output width can be calculated once per column, instead of repeatedly for each tile in the colum
gpu: ipu-v3: image-convert: move tile burst alignment out of loop Burst aligned input and output width can be calculated once per column, instead of repeatedly for each tile in the column. The same goes for input and output height per row. Also don't round up the same values repeatedly. Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
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#
5fb8b650 |
| 13-Aug-2019 |
Philipp Zabel <p.zabel@pengutronix.de> |
gpu: ipu-v3: image-convert: bail on invalid tile sizes If we managed to create tiles sized 0x0 because of a bug in the seam calculation, return with an error message instead of letting t
gpu: ipu-v3: image-convert: bail on invalid tile sizes If we managed to create tiles sized 0x0 because of a bug in the seam calculation, return with an error message instead of letting the driver run into a division by zero later. Also check for tile sizes that are larger than supported by the hardware. Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
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#
de2564c7 |
| 13-Aug-2019 |
Philipp Zabel <p.zabel@pengutronix.de> |
gpu: ipu-v3: image-convert: fix image downsize coefficients and tiling calculation This patch effectively reverts commit 912bbf7e9ca4 ("gpu: ipu-v3: image-convert: Fix image downsize coe
gpu: ipu-v3: image-convert: fix image downsize coefficients and tiling calculation This patch effectively reverts commit 912bbf7e9ca4 ("gpu: ipu-v3: image-convert: Fix image downsize coefficients") and replaces it with a different solution based on the preceding patches. The previous fix tried to solve the problem of intermediate tile size between IC downsizing and main processing sections not being limited to 1024 pixels by downsizing the input image to a smaller intermediate size in the downsizing box filter. This causes unnecessary blurring, especially for scaling factors close to 1. Now that the seam position calculation makes sure that the 1024 pixel intermediate tile size limit is not exceeded, calculate the number of tiles from the maximum of intermediate size and output size and avoid unnecessary downsizing. Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
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#
2e67a553 |
| 13-Aug-2019 |
Philipp Zabel <p.zabel@pengutronix.de> |
gpu: ipu-v3: image-convert: limit input seam position to hardware requirements Limit the input seam position to an interval that guarantees the tile size does not exceed 1024 pixels afte
gpu: ipu-v3: image-convert: limit input seam position to hardware requirements Limit the input seam position to an interval that guarantees the tile size does not exceed 1024 pixels after the IC downsizing section and that space is left for the next tile. Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
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#
82c3e948 |
| 13-Aug-2019 |
Philipp Zabel <p.zabel@pengutronix.de> |
gpu: ipu-v3: image-convert: fix output seam valid interval This fixes a failure to determine any seam if the output size is exactly 1024 multiplied by the number of tiles in a given dire
gpu: ipu-v3: image-convert: fix output seam valid interval This fixes a failure to determine any seam if the output size is exactly 1024 multiplied by the number of tiles in a given direction. In that case an empty interval out_start == out_end is being passed to find_best_seam, which looks for a seam out_start <= x < out_end. Also reduce the interval for all but the left column / top row, to avoid returning position 0 as best fit. Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
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#
ca84b1b8 |
| 13-Aug-2019 |
Philipp Zabel <p.zabel@pengutronix.de> |
gpu: ipu-v3: image-convert: move output seam valid interval calculation into find_best_seam This reduces code duplication and allows to apply the following modifications in a single plac
gpu: ipu-v3: image-convert: move output seam valid interval calculation into find_best_seam This reduces code duplication and allows to apply the following modifications in a single place. Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
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