| /openbmc/qemu/target/mips/tcg/sysemu/ |
| H A D | cp0_helper.c | 37 CPUMIPSState *env = &c->env; in mips_vpe_is_wfi()
49 CPUMIPSState *env = &c->env; in mips_vp_is_wfi()
80 CPUMIPSState *c = &cpu->env; in mips_tc_wake()
90 CPUMIPSState *c = &cpu->env; in mips_tc_sleep()
112 static CPUMIPSState *mips_cpu_map_tc(CPUMIPSState *env, int *tc) in mips_cpu_map_tc()
154 static void sync_c0_tcstatus(CPUMIPSState *cpu, int tc, in sync_c0_tcstatus()
186 static void sync_c0_entryhi(CPUMIPSState *cpu, int tc) in sync_c0_entryhi()
204 uint32_t cpu_mips_get_random(CPUMIPSState *env) in cpu_mips_get_random()
229 target_ulong helper_mfc0_mvpcontrol(CPUMIPSState *env) in helper_mfc0_mvpcontrol()
234 target_ulong helper_mfc0_mvpconf0(CPUMIPSState *env) in helper_mfc0_mvpconf0()
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| H A D | special_helper.c | 29 target_ulong helper_di(CPUMIPSState *env) in helper_di()
37 target_ulong helper_ei(CPUMIPSState *env) in helper_ei()
45 static void debug_pre_eret(CPUMIPSState *env) in debug_pre_eret()
60 static void debug_post_eret(CPUMIPSState *env) in debug_post_eret()
93 CPUMIPSState *env = cpu_env(cs); in mips_io_recompile_replay_branch()
104 static inline void exception_return(CPUMIPSState *env) in exception_return()
118 void helper_eret(CPUMIPSState *env) in helper_eret()
125 void helper_eretnc(CPUMIPSState *env) in helper_eretnc()
130 void helper_deret(CPUMIPSState *env) in helper_deret()
142 void helper_cache(CPUMIPSState *env, target_ulong addr, uint32_t op) in helper_cache()
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| H A D | tlb_helper.c | 31 static void r4k_mips_tlb_flush_extra(CPUMIPSState *env, int first) in r4k_mips_tlb_flush_extra()
49 static void r4k_fill_tlb(CPUMIPSState *env, int idx) in r4k_fill_tlb()
83 static void r4k_helper_tlbinv(CPUMIPSState *env) in r4k_helper_tlbinv()
103 static void r4k_helper_tlbinvf(CPUMIPSState *env) in r4k_helper_tlbinvf()
113 static void r4k_helper_tlbwi(CPUMIPSState *env) in r4k_helper_tlbwi()
161 static void r4k_helper_tlbwr(CPUMIPSState *env) in r4k_helper_tlbwr()
169 static void r4k_helper_tlbp(CPUMIPSState *env) in r4k_helper_tlbp()
232 static void r4k_helper_tlbr(CPUMIPSState *env) in r4k_helper_tlbr()
273 void helper_tlbwi(CPUMIPSState *env) in helper_tlbwi()
278 void helper_tlbwr(CPUMIPSState *env) in helper_tlbwr()
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| H A D | lcsr_helper.c | 16 uint64_t helper_lcsr_rdcsr(CPUMIPSState *env, target_ulong r_addr) in helper_lcsr_rdcsr()
22 uint64_t helper_lcsr_drdcsr(CPUMIPSState *env, target_ulong r_addr) in helper_lcsr_drdcsr()
28 void helper_lcsr_wrcsr(CPUMIPSState *env, target_ulong w_addr, in helper_lcsr_wrcsr()
35 void helper_lcsr_dwrcsr(CPUMIPSState *env, target_ulong w_addr, in helper_lcsr_dwrcsr()
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| H A D | mips-semi.c | 120 static void report_fault(CPUMIPSState *env) in report_fault()
129 CPUMIPSState *env = cpu_env(cs); in uhi_cb()
170 CPUMIPSState *env = cpu_env(cs); in uhi_fstat_cb()
202 void mips_semihosting(CPUMIPSState *env) in mips_semihosting()
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| /openbmc/qemu/target/mips/tcg/ |
| H A D | vr54xx_helper.c | 27 static inline uint64_t get_HILO(CPUMIPSState *env) in get_HILO()
33 static inline target_ulong set_HIT0_LO(CPUMIPSState *env, uint64_t HILO) in set_HIT0_LO()
39 static inline target_ulong set_HI_LOT0(CPUMIPSState *env, uint64_t HILO) in set_HI_LOT0()
47 target_ulong helper_muls(CPUMIPSState *env, target_ulong arg1, in helper_muls()
54 target_ulong helper_mulsu(CPUMIPSState *env, target_ulong arg1, in helper_mulsu()
61 target_ulong helper_macc(CPUMIPSState *env, target_ulong arg1, in helper_macc()
68 target_ulong helper_macchi(CPUMIPSState *env, target_ulong arg1, in helper_macchi()
75 target_ulong helper_maccu(CPUMIPSState *env, target_ulong arg1, in helper_maccu()
82 target_ulong helper_macchiu(CPUMIPSState *env, target_ulong arg1, in helper_macchiu()
89 target_ulong helper_msac(CPUMIPSState *env, target_ulong arg1, in helper_msac()
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| H A D | fpu_helper.c | 40 target_ulong helper_cfc1(CPUMIPSState *env, uint32_t reg) in helper_cfc1()
88 void helper_ctc1(CPUMIPSState *env, target_ulong arg1, uint32_t fs, uint32_t rt) in helper_ctc1()
203 static inline void update_fcr31(CPUMIPSState *env, uintptr_t pc) in update_fcr31()
234 uint64_t helper_float_sqrt_d(CPUMIPSState *env, uint64_t fdt0) in helper_float_sqrt_d()
241 uint32_t helper_float_sqrt_s(CPUMIPSState *env, uint32_t fst0) in helper_float_sqrt_s()
248 uint64_t helper_float_cvtd_s(CPUMIPSState *env, uint32_t fst0) in helper_float_cvtd_s()
257 uint64_t helper_float_cvtd_w(CPUMIPSState *env, uint32_t wt0) in helper_float_cvtd_w()
266 uint64_t helper_float_cvtd_l(CPUMIPSState *env, uint64_t dt0) in helper_float_cvtd_l()
275 uint64_t helper_float_cvt_l_d(CPUMIPSState *env, uint64_t fdt0) in helper_float_cvt_l_d()
288 uint64_t helper_float_cvt_l_s(CPUMIPSState *env, uint32_t fst0) in helper_float_cvt_l_s()
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| H A D | tcg-internal.h | 30 G_NORETURN void do_raise_exception_err(CPUMIPSState *env, uint32_t exception,
34 void do_raise_exception(CPUMIPSState *env, in do_raise_exception()
46 void mmu_init(CPUMIPSState *env, const mips_def_t *def);
48 void update_pagemask(CPUMIPSState *env, target_ulong arg1, int32_t *pagemask);
50 void r4k_invalidate_tlb(CPUMIPSState *env, int idx, int use_extra);
51 uint32_t cpu_mips_get_random(CPUMIPSState *env);
55 hwaddr cpu_mips_translate_address(CPUMIPSState *env, target_ulong address,
62 void cpu_mips_tlb_flush(CPUMIPSState *env);
68 void mips_semihosting(CPUMIPSState *env);
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| H A D | exception.c | 28 target_ulong exception_resume_pc(CPUMIPSState *env) in exception_resume_pc()
46 void helper_raise_exception_err(CPUMIPSState *env, uint32_t exception, in helper_raise_exception_err()
52 void helper_raise_exception(CPUMIPSState *env, uint32_t exception) in helper_raise_exception()
57 void helper_raise_exception_debug(CPUMIPSState *env) in helper_raise_exception_debug()
62 static void raise_exception(CPUMIPSState *env, uint32_t exception) in raise_exception()
67 void helper_wait(CPUMIPSState *env) in helper_wait()
82 CPUMIPSState *env = cpu_env(cs); in mips_cpu_synchronize_from_tb()
139 void do_raise_exception_err(CPUMIPSState *env, uint32_t exception, in do_raise_exception_err()
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| H A D | op_helper.c | 154 target_ulong helper_yield(CPUMIPSState *env, target_ulong arg) in helper_yield()
185 static inline void check_hwrena(CPUMIPSState *env, int reg, uintptr_t pc) in check_hwrena()
193 target_ulong helper_rdhwr_cpunum(CPUMIPSState *env) in helper_rdhwr_cpunum()
199 target_ulong helper_rdhwr_synci_step(CPUMIPSState *env) in helper_rdhwr_synci_step()
205 target_ulong helper_rdhwr_cc(CPUMIPSState *env) in helper_rdhwr_cc()
215 target_ulong helper_rdhwr_ccres(CPUMIPSState *env) in helper_rdhwr_ccres()
221 target_ulong helper_rdhwr_performance(CPUMIPSState *env) in helper_rdhwr_performance()
227 target_ulong helper_rdhwr_xnp(CPUMIPSState *env) in helper_rdhwr_xnp()
233 void helper_pmon(CPUMIPSState *env, int function) in helper_pmon()
261 target_ulong helper_lcsr_cpucfg(CPUMIPSState *env, target_ulong rs) in helper_lcsr_cpucfg()
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| H A D | dsp_helper.c | 55 CPUMIPSState *env) in set_DSPControl_overflow_flag()
60 static inline void set_DSPControl_carryflag(bool flag, CPUMIPSState *env) in set_DSPControl_carryflag()
66 static inline uint32_t get_DSPControl_carryflag(CPUMIPSState *env) in get_DSPControl_carryflag()
71 static inline void set_DSPControl_24(uint32_t flag, int len, CPUMIPSState *env) in set_DSPControl_24()
82 static inline void set_DSPControl_pos(uint32_t pos, CPUMIPSState *env) in set_DSPControl_pos()
97 static inline uint32_t get_DSPControl_pos(CPUMIPSState *env) in get_DSPControl_pos()
113 static inline void set_DSPControl_efi(uint32_t flag, CPUMIPSState *env) in set_DSPControl_efi()
121 CPUMIPSState *env) \
136 static inline int16_t mipsdsp_add_i16(int16_t a, int16_t b, CPUMIPSState *env) in mipsdsp_add_i16()
150 CPUMIPSState *env) in mipsdsp_sat_add_i16()
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| H A D | ldst_helper.c | 34 target_ulong helper_##name(CPUMIPSState *env, target_ulong arg, int mem_idx) \
56 static inline target_ulong get_lmask(CPUMIPSState *env, in get_lmask()
70 void helper_swl(CPUMIPSState *env, target_ulong arg1, target_ulong arg2, in helper_swl()
94 void helper_swr(CPUMIPSState *env, target_ulong arg1, target_ulong arg2, in helper_swr()
124 void helper_sdl(CPUMIPSState *env, target_ulong arg1, target_ulong arg2, in helper_sdl()
168 void helper_sdr(CPUMIPSState *env, target_ulong arg1, target_ulong arg2, in helper_sdr()
215 void helper_lwm(CPUMIPSState *env, target_ulong addr, target_ulong reglist, in helper_lwm()
237 void helper_swm(CPUMIPSState *env, target_ulong addr, target_ulong reglist, in helper_swm()
259 void helper_ldm(CPUMIPSState *env, target_ulong addr, target_ulong reglist, in helper_ldm()
281 void helper_sdm(CPUMIPSState *env, target_ulong addr, target_ulong reglist, in helper_sdm()
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| H A D | msa_helper.c | 98 void helper_msa_nloc_b(CPUMIPSState *env, uint32_t wd, uint32_t ws) in helper_msa_nloc_b()
121 void helper_msa_nloc_h(CPUMIPSState *env, uint32_t wd, uint32_t ws) in helper_msa_nloc_h()
136 void helper_msa_nloc_w(CPUMIPSState *env, uint32_t wd, uint32_t ws) in helper_msa_nloc_w()
147 void helper_msa_nloc_d(CPUMIPSState *env, uint32_t wd, uint32_t ws) in helper_msa_nloc_d()
156 void helper_msa_nlzc_b(CPUMIPSState *env, uint32_t wd, uint32_t ws) in helper_msa_nlzc_b()
179 void helper_msa_nlzc_h(CPUMIPSState *env, uint32_t wd, uint32_t ws) in helper_msa_nlzc_h()
194 void helper_msa_nlzc_w(CPUMIPSState *env, uint32_t wd, uint32_t ws) in helper_msa_nlzc_w()
205 void helper_msa_nlzc_d(CPUMIPSState *env, uint32_t wd, uint32_t ws) in helper_msa_nlzc_d()
230 void helper_msa_pcnt_b(CPUMIPSState *env, uint32_t wd, uint32_t ws) in helper_msa_pcnt_b()
253 void helper_msa_pcnt_h(CPUMIPSState *env, uint32_t wd, uint32_t ws) in helper_msa_pcnt_h()
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| H A D | translate.c | 1240 tcg_gen_ld_i32(t2, tcg_env, offsetof(CPUMIPSState, CP0_SRSCtl)); in gen_load_srsgpr()
1260 tcg_gen_ld_i32(t2, tcg_env, offsetof(CPUMIPSState, CP0_SRSCtl)); in gen_store_srsgpr()
1299 static inline void restore_cpu_state(CPUMIPSState *env, DisasContext *ctx) in restore_cpu_state()
1336 offsetof(CPUMIPSState, error_code)); in generate_exception_break()
1930 tcg_gen_st_tl(t0, tcg_env, offsetof(CPUMIPSState, lladdr)); \
1931 tcg_gen_st_tl(ret, tcg_env, offsetof(CPUMIPSState, llval)); \
4285 offsetof(CPUMIPSState, error_code)); in gen_trap()
4330 offsetof(CPUMIPSState, error_code)); in gen_trap()
4918 gen_mfhc0_entrylo(arg, offsetof(CPUMIPSState, CP0_EntryLo0)); in gen_mfhc0()
4929 gen_mfhc0_entrylo(arg, offsetof(CPUMIPSState, CP0_EntryLo1)); in gen_mfhc0()
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| /openbmc/qemu/target/mips/ |
| H A D | internal.h | 115 int get_physical_address(CPUMIPSState *env, hwaddr *physical,
144 int (*map_address)(CPUMIPSState *env, hwaddr *physical, int *prot,
146 void (*helper_tlbwi)(CPUMIPSState *env);
147 void (*helper_tlbwr)(CPUMIPSState *env);
148 void (*helper_tlbp)(CPUMIPSState *env);
149 void (*helper_tlbr)(CPUMIPSState *env);
150 void (*helper_tlbinv)(CPUMIPSState *env);
151 void (*helper_tlbinvf)(CPUMIPSState *env);
159 void sync_c0_status(CPUMIPSState *env, CPUMIPSState *cpu, int tc);
160 void cpu_mips_store_status(CPUMIPSState *env, target_ulong val);
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| H A D | fpu_helper.h | 16 static inline void restore_rounding_mode(CPUMIPSState *env) in restore_rounding_mode()
22 static inline void restore_flush_mode(CPUMIPSState *env) in restore_flush_mode()
28 static inline void restore_snan_bit_mode(CPUMIPSState *env) in restore_snan_bit_mode()
40 static inline void restore_fp_status(CPUMIPSState *env) in restore_fp_status()
47 static inline void fp_reset(CPUMIPSState *env) in fp_reset()
78 static inline void restore_msa_fp_status(CPUMIPSState *env) in restore_msa_fp_status()
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| H A D | cpu.h | 1194 } CPUMIPSState; typedef
1207 CPUMIPSState env;
1234 void cpu_wrdsp(uint32_t rs, uint32_t mask_num, CPUMIPSState *env);
1235 uint32_t cpu_rddsp(uint32_t mask_num, CPUMIPSState *env);
1254 static inline int mips_env_mmu_index(CPUMIPSState *env) in mips_env_mmu_index()
1318 bool cpu_supports_isa(const CPUMIPSState *env, uint64_t isa_mask);
1322 static inline bool ase_3d_available(const CPUMIPSState *env) in ase_3d_available()
1328 static inline bool ase_msa_available(CPUMIPSState *env) in ase_msa_available()
1334 static inline bool ase_lcsr_available(CPUMIPSState *env) in ase_lcsr_available()
1340 static inline bool ase_mt_available(CPUMIPSState *env) in ase_mt_available()
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| H A D | cpu.c | 66 static void fpu_dump_state(CPUMIPSState *env, FILE *f, int flags) in fpu_dump_state()
83 CPUMIPSState *env = cpu_env(cs); in mips_cpu_dump_state()
137 CPUMIPSState *env = cpu_env(cs); in mips_cpu_has_work()
193 CPUMIPSState *env = &cpu->env; in mips_cpu_reset_hold()
199 memset(env, 0, offsetof(CPUMIPSState, end_reset_fields)); in mips_cpu_reset_hold()
448 CPUMIPSState *env = &cpu->env; in mips_cp0_period_set()
459 CPUMIPSState *env = &cpu->env; in mips_cpu_realizefn()
500 CPUMIPSState *env = &cpu->env; in mips_cpu_initfn()
660 bool cpu_supports_isa(const CPUMIPSState *env, uint64_t isa_mask) in cpu_supports_isa()
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| H A D | kvm.c | 66 CPUMIPSState *env = cpu_env(cs); in kvm_arch_init_vcpu()
100 CPUMIPSState *env = &cpu->env; in kvm_mips_reset_vcpu()
128 CPUMIPSState *env = &cpu->env; in cpu_mips_io_interrupts_pending()
462 CPUMIPSState *env = cpu_env(cs); in kvm_mips_save_count()
503 CPUMIPSState *env = cpu_env(cs); in kvm_mips_restore_count()
590 CPUMIPSState *env = cpu_env(cs); in kvm_mips_put_fpu_registers()
669 CPUMIPSState *env = cpu_env(cs); in kvm_mips_get_fpu_registers()
749 CPUMIPSState *env = cpu_env(cs); in kvm_mips_put_cp0_registers()
971 CPUMIPSState *env = cpu_env(cs); in kvm_mips_get_cp0_registers()
1177 CPUMIPSState *env = cpu_env(cs); in kvm_arch_put_registers()
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| /openbmc/qemu/target/mips/sysemu/ |
| H A D | cp0_timer.c | 30 static uint32_t cpu_mips_get_count_val(CPUMIPSState *env) in cpu_mips_get_count_val()
38 static void cpu_mips_timer_update(CPUMIPSState *env) in cpu_mips_timer_update()
54 static void cpu_mips_timer_expire(CPUMIPSState *env) in cpu_mips_timer_expire()
63 uint32_t cpu_mips_get_count(CPUMIPSState *env) in cpu_mips_get_count()
81 void cpu_mips_store_count(CPUMIPSState *env, uint32_t count) in cpu_mips_store_count()
99 void cpu_mips_store_compare(CPUMIPSState *env, uint32_t value) in cpu_mips_store_compare()
111 void cpu_mips_start_count(CPUMIPSState *env) in cpu_mips_start_count()
116 void cpu_mips_stop_count(CPUMIPSState *env) in cpu_mips_stop_count()
125 CPUMIPSState *env; in mips_timer_cb()
138 CPUMIPSState *env = &cpu->env; in cpu_mips_clock_init()
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| H A D | cp0.c | 27 void sync_c0_status(CPUMIPSState *env, CPUMIPSState *cpu, int tc) in sync_c0_status()
61 void cpu_mips_store_status(CPUMIPSState *env, target_ulong val) in cpu_mips_store_status()
94 void cpu_mips_store_cause(CPUMIPSState *env, target_ulong val) in cpu_mips_store_cause()
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| H A D | physaddr.c | 78 static int get_seg_physical_address(CPUMIPSState *env, hwaddr *physical, in get_seg_physical_address()
102 static int get_segctl_physical_address(CPUMIPSState *env, hwaddr *physical, in get_segctl_physical_address()
116 int get_physical_address(CPUMIPSState *env, hwaddr *physical, in get_physical_address()
234 CPUMIPSState *env = cpu_env(cs); in mips_cpu_get_phys_page_debug()
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| /openbmc/qemu/linux-user/mips/ |
| H A D | target_cpu.h | 22 static inline void cpu_clone_regs_child(CPUMIPSState *env, target_ulong newsp, in cpu_clone_regs_child()
32 static inline void cpu_clone_regs_parent(CPUMIPSState *env, unsigned flags) in cpu_clone_regs_parent()
36 static inline void cpu_set_tls(CPUMIPSState *env, target_ulong newtls) in cpu_set_tls()
41 static inline abi_ulong get_sp_from_cpustate(CPUMIPSState *state) in get_sp_from_cpustate()
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| H A D | signal.c | 103 static inline void setup_sigcontext(CPUMIPSState *regs, in setup_sigcontext()
140 restore_sigcontext(CPUMIPSState *regs, struct target_sigcontext *sc) in restore_sigcontext()
174 get_sigframe(struct target_sigaction *ka, CPUMIPSState *regs, size_t frame_size) in get_sigframe()
188 static void mips_set_hflags_isa_mode_from_pc(CPUMIPSState *env) in mips_set_hflags_isa_mode_from_pc()
200 target_sigset_t *set, CPUMIPSState *regs) in setup_frame()
245 long do_sigreturn(CPUMIPSState *regs) in do_sigreturn()
294 target_sigset_t *set, CPUMIPSState *env) in setup_rt_frame()
351 long do_rt_sigreturn(CPUMIPSState *env) in do_rt_sigreturn()
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| /openbmc/qemu/hw/mips/ |
| H A D | mips_int.c | 32 CPUMIPSState *env = &cpu->env; in cpu_mips_irq_request()
60 CPUMIPSState *env = &cpu->env; in cpu_mips_irq_init_cpu()
71 void cpu_mips_soft_irq(CPUMIPSState *env, int irq, int level) in cpu_mips_soft_irq()
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