xref: /openbmc/qemu/target/mips/fpu_helper.h (revision f15f7273ea55472d5904c53566c82369d81214c1)
181ddae7cSPhilippe Mathieu-Daudé /*
281ddae7cSPhilippe Mathieu-Daudé  * Helpers for emulation of FPU-related MIPS instructions.
381ddae7cSPhilippe Mathieu-Daudé  *
481ddae7cSPhilippe Mathieu-Daudé  *  Copyright (C) 2004-2005  Jocelyn Mayer
581ddae7cSPhilippe Mathieu-Daudé  *
681ddae7cSPhilippe Mathieu-Daudé  * SPDX-License-Identifier: LGPL-2.1-or-later
781ddae7cSPhilippe Mathieu-Daudé  */
881ddae7cSPhilippe Mathieu-Daudé #include "fpu/softfloat-helpers.h"
981ddae7cSPhilippe Mathieu-Daudé #include "cpu.h"
1081ddae7cSPhilippe Mathieu-Daudé 
1181ddae7cSPhilippe Mathieu-Daudé extern const FloatRoundMode ieee_rm[4];
1281ddae7cSPhilippe Mathieu-Daudé 
1381ddae7cSPhilippe Mathieu-Daudé uint32_t float_class_s(uint32_t arg, float_status *fst);
1481ddae7cSPhilippe Mathieu-Daudé uint64_t float_class_d(uint64_t arg, float_status *fst);
1581ddae7cSPhilippe Mathieu-Daudé 
restore_rounding_mode(CPUMIPSState * env)1681ddae7cSPhilippe Mathieu-Daudé static inline void restore_rounding_mode(CPUMIPSState *env)
1781ddae7cSPhilippe Mathieu-Daudé {
1881ddae7cSPhilippe Mathieu-Daudé     set_float_rounding_mode(ieee_rm[env->active_fpu.fcr31 & 3],
1981ddae7cSPhilippe Mathieu-Daudé                             &env->active_fpu.fp_status);
2081ddae7cSPhilippe Mathieu-Daudé }
2181ddae7cSPhilippe Mathieu-Daudé 
restore_flush_mode(CPUMIPSState * env)2281ddae7cSPhilippe Mathieu-Daudé static inline void restore_flush_mode(CPUMIPSState *env)
2381ddae7cSPhilippe Mathieu-Daudé {
2481ddae7cSPhilippe Mathieu-Daudé     set_flush_to_zero((env->active_fpu.fcr31 & (1 << FCR31_FS)) != 0,
2581ddae7cSPhilippe Mathieu-Daudé                       &env->active_fpu.fp_status);
2681ddae7cSPhilippe Mathieu-Daudé }
2781ddae7cSPhilippe Mathieu-Daudé 
restore_snan_bit_mode(CPUMIPSState * env)2881ddae7cSPhilippe Mathieu-Daudé static inline void restore_snan_bit_mode(CPUMIPSState *env)
2981ddae7cSPhilippe Mathieu-Daudé {
30e9e5534fSRichard Henderson     bool nan2008 = env->active_fpu.fcr31 & (1 << FCR31_NAN2008);
31e9e5534fSRichard Henderson 
32e9e5534fSRichard Henderson     /*
33e9e5534fSRichard Henderson      * With nan2008, SNaNs are silenced in the usual way.
34e9e5534fSRichard Henderson      * Before that, SNaNs are not silenced; default nans are produced.
35e9e5534fSRichard Henderson      */
36e9e5534fSRichard Henderson     set_snan_bit_is_one(!nan2008, &env->active_fpu.fp_status);
37e9e5534fSRichard Henderson     set_default_nan_mode(!nan2008, &env->active_fpu.fp_status);
3881ddae7cSPhilippe Mathieu-Daudé }
3981ddae7cSPhilippe Mathieu-Daudé 
restore_fp_status(CPUMIPSState * env)4081ddae7cSPhilippe Mathieu-Daudé static inline void restore_fp_status(CPUMIPSState *env)
4181ddae7cSPhilippe Mathieu-Daudé {
4281ddae7cSPhilippe Mathieu-Daudé     restore_rounding_mode(env);
4381ddae7cSPhilippe Mathieu-Daudé     restore_flush_mode(env);
4481ddae7cSPhilippe Mathieu-Daudé     restore_snan_bit_mode(env);
4581ddae7cSPhilippe Mathieu-Daudé }
4681ddae7cSPhilippe Mathieu-Daudé 
fp_reset(CPUMIPSState * env)47*0c587f13SPeter Maydell static inline void fp_reset(CPUMIPSState *env)
48*0c587f13SPeter Maydell {
49*0c587f13SPeter Maydell     restore_fp_status(env);
50*0c587f13SPeter Maydell 
51*0c587f13SPeter Maydell     /*
52*0c587f13SPeter Maydell      * According to MIPS specifications, if one of the two operands is
53*0c587f13SPeter Maydell      * a sNaN, a new qNaN has to be generated. This is done in
54*0c587f13SPeter Maydell      * floatXX_silence_nan(). For qNaN inputs the specifications
55*0c587f13SPeter Maydell      * says: "When possible, this QNaN result is one of the operand QNaN
56*0c587f13SPeter Maydell      * values." In practice it seems that most implementations choose
57*0c587f13SPeter Maydell      * the first operand if both operands are qNaN. In short this gives
58*0c587f13SPeter Maydell      * the following rules:
59*0c587f13SPeter Maydell      *  1. A if it is signaling
60*0c587f13SPeter Maydell      *  2. B if it is signaling
61*0c587f13SPeter Maydell      *  3. A (quiet)
62*0c587f13SPeter Maydell      *  4. B (quiet)
63*0c587f13SPeter Maydell      * A signaling NaN is always silenced before returning it.
64*0c587f13SPeter Maydell      */
65*0c587f13SPeter Maydell     set_float_2nan_prop_rule(float_2nan_prop_s_ab,
66*0c587f13SPeter Maydell                              &env->active_fpu.fp_status);
67*0c587f13SPeter Maydell }
68*0c587f13SPeter Maydell 
6981ddae7cSPhilippe Mathieu-Daudé /* MSA */
7081ddae7cSPhilippe Mathieu-Daudé 
7181ddae7cSPhilippe Mathieu-Daudé enum CPUMIPSMSADataFormat {
7281ddae7cSPhilippe Mathieu-Daudé     DF_BYTE = 0,
7381ddae7cSPhilippe Mathieu-Daudé     DF_HALF,
7481ddae7cSPhilippe Mathieu-Daudé     DF_WORD,
7581ddae7cSPhilippe Mathieu-Daudé     DF_DOUBLE
7681ddae7cSPhilippe Mathieu-Daudé };
7781ddae7cSPhilippe Mathieu-Daudé 
restore_msa_fp_status(CPUMIPSState * env)7881ddae7cSPhilippe Mathieu-Daudé static inline void restore_msa_fp_status(CPUMIPSState *env)
7981ddae7cSPhilippe Mathieu-Daudé {
8081ddae7cSPhilippe Mathieu-Daudé     float_status *status = &env->active_tc.msa_fp_status;
8181ddae7cSPhilippe Mathieu-Daudé     int rounding_mode = (env->active_tc.msacsr & MSACSR_RM_MASK) >> MSACSR_RM;
8281ddae7cSPhilippe Mathieu-Daudé     bool flush_to_zero = (env->active_tc.msacsr & MSACSR_FS_MASK) != 0;
8381ddae7cSPhilippe Mathieu-Daudé 
8481ddae7cSPhilippe Mathieu-Daudé     set_float_rounding_mode(ieee_rm[rounding_mode], status);
8581ddae7cSPhilippe Mathieu-Daudé     set_flush_to_zero(flush_to_zero, status);
8681ddae7cSPhilippe Mathieu-Daudé     set_flush_inputs_to_zero(flush_to_zero, status);
8781ddae7cSPhilippe Mathieu-Daudé }
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