Merge tag 'for-upstream' of https://gitlab.com/bonzini/qemu into staging

* util/log: re-allow switching away from stderr log file
* finish audio configuration rework
* cleanup HVF stubs
* remove mor

Merge tag 'for-upstream' of https://gitlab.com/bonzini/qemu into staging

* util/log: re-allow switching away from stderr log file
* finish audio configuration rework
* cleanup HVF stubs
* remove more mentions of softmmu

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# gpg: Signature made Sun 08 Oct 2023 15:08:50 EDT
# gpg: using RSA key F13338574B662389866C7682BFFBD25F78C7AE83
# gpg: issuer "pbonzini@redhat.com"
# gpg: Good signature from "Paolo Bonzini <bonzini@gnu.org>" [full]
# gpg: aka "Paolo Bonzini <pbonzini@redhat.com>" [full]
# Primary key fingerprint: 46F5 9FBD 57D6 12E7 BFD4 E2F7 7E15 100C CD36 69B1
# Subkey fingerprint: F133 3857 4B66 2389 866C 7682 BFFB D25F 78C7 AE83

* tag 'for-upstream' of https://gitlab.com/bonzini/qemu: (25 commits)
audio, qtest: get rid of QEMU_AUDIO_DRV
audio: reintroduce default audio backend for VNC
audio: do not use first -audiodev as default audio device
audio: extend -audio to allow creating a default backend
audio: extract audio_define_default
audio: disable default backends if -audio/-audiodev is used
audio: error hints need a trailing \n
cutils: squelch compiler warnings with custom paths
configure: change $softmmu to $system
system: Rename softmmu/ directory as system/
meson: Rename target_softmmu_arch -> target_system_arch
meson: Rename softmmu_mods -> system_mods
target/i386: Rename i386_softmmu_kvm_ss -> i386_kvm_ss
semihosting: Rename softmmu_FOO_user() -> uaccess_FOO_user()
gdbstub: Rename 'softmmu' -> 'system'
accel: Rename accel_softmmu* -> accel_system*
tcg: Correct invalid mentions of 'softmmu' by 'system-mode'
fuzz: Correct invalid mentions of 'softmmu' by 'system'
cpu: Correct invalid mentions of 'softmmu' by 'system-mode'
travis-ci: Correct invalid mentions of 'softmmu' by 'system'
...

Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>

show more ...

semihosting: Rename softmmu_FOO_user() -> uaccess_FOO_user()

Add a check in 'softmmu-uaccess.h' that the header is only
include in system emulation, and rename it as 'uaccess.h'.

Rename the API met

semihosting: Rename softmmu_FOO_user() -> uaccess_FOO_user()

Add a check in 'softmmu-uaccess.h' that the header is only
include in system emulation, and rename it as 'uaccess.h'.

Rename the API methods:

- softmmu_[un]lock_user*() -> uaccess_[un]lock_user*()
- softmmu_strlen_user() -> uaccess_strlen_user().

Update a pair of comments.

Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Message-ID: <20231004090629.37473-9-philmd@linaro.org>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>

show more ...

Merge tag 'pull-tcg-20231004' of https://gitlab.com/rth7680/qemu into staging

accel: Introduce AccelClass::cpu_common_[un]realize
accel: Target agnostic code movement
accel/tcg: Cleanups to use CPUS

Merge tag 'pull-tcg-20231004' of https://gitlab.com/rth7680/qemu into staging

accel: Introduce AccelClass::cpu_common_[un]realize
accel: Target agnostic code movement
accel/tcg: Cleanups to use CPUState instead of CPUArchState
accel/tcg: Move CPUNegativeOffsetState into CPUState
tcg: Split out tcg init functions to tcg/startup.h
linux-user/hppa: Fix struct target_sigcontext layout
build: Remove --enable-gprof

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# gpg: issuer "richard.henderson@linaro.org"
# gpg: Good signature from "Richard Henderson <richard.henderson@linaro.org>" [full]
# Primary key fingerprint: 7A48 1E78 868B 4DB6 A85A 05C0 64DF 38E8 AF7E 215F

* tag 'pull-tcg-20231004' of https://gitlab.com/rth7680/qemu: (47 commits)
tcg/loongarch64: Fix buid error
tests/avocado: Re-enable MIPS Malta tests (GitLab issue #1884 fixed)
build: Remove --enable-gprof
linux-user/hppa: Fix struct target_sigcontext layout
tcg: Split out tcg init functions to tcg/startup.h
tcg: Remove argument to tcg_prologue_init
accel/tcg: Make cpu-exec-common.c a target agnostic unit
accel/tcg: Make icount.o a target agnostic unit
accel/tcg: Make monitor.c a target-agnostic unit
accel/tcg: Rename target-specific 'internal.h' -> 'internal-target.h'
exec: Rename target specific page-vary.c -> page-vary-target.c
exec: Rename cpu.c -> cpu-target.c
accel: Rename accel-common.c -> accel-target.c
accel: Make accel-blocker.o target agnostic
accel/tcg: Restrict dump_exec_info() declaration
exec: Move cpu_loop_foo() target agnostic functions to 'cpu-common.h'
exec: Make EXCP_FOO definitions target agnostic
accel/tcg: move ld/st helpers to ldst_common.c.inc
accel/tcg: Unify user and softmmu do_[st|ld]*_mmu()
accel/tcg: Remove env_tlb()
...

Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>

show more ...

accel/tcg: Replace CPUState.env_ptr with cpu_env()

Reviewed-by: Anton Johansson <anjo@rev.ng>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>

Merge tag 'pull-gdbstub-070323-3' of https://gitlab.com/stsquad/qemu into staging

gdbstub refactor:

- split user and softmmu code
- use cleaner headers for tb_flush, target_ulong
- probe for

Merge tag 'pull-gdbstub-070323-3' of https://gitlab.com/stsquad/qemu into staging

gdbstub refactor:

- split user and softmmu code
- use cleaner headers for tb_flush, target_ulong
- probe for gdb multiarch support at configure
- make syscall handling target independent
- add update guest debug of accel ops

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# gpg: Signature made Tue 07 Mar 2023 20:45:23 GMT
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# gpg: Good signature from "Alex Bennée (Master Work Key) <alex.bennee@linaro.org>" [full]
# Primary key fingerprint: 6685 AE99 E751 67BC AFC8 DF35 FBD0 DB09 5A9E 2A44

* tag 'pull-gdbstub-070323-3' of https://gitlab.com/stsquad/qemu: (30 commits)
gdbstub: move update guest debug to accel ops
gdbstub: Build syscall.c once
stubs: split semihosting_get_target from system only stubs
gdbstub: Adjust gdb_do_syscall to only use uint32_t and uint64_t
gdbstub: Remove gdb_do_syscallv
gdbstub: split out softmmu/user specifics for syscall handling
include: split target_long definition from cpu-defs
testing: probe gdb for supported architectures ahead of time
gdbstub: only compile gdbstub twice for whole build
gdbstub: move syscall handling to new file
gdbstub: move register helpers into standalone include
gdbstub: don't use target_ulong while handling registers
gdbstub: fix address type of gdb_set_cpu_pc
gdbstub: specialise stub_can_reverse
gdbstub: introduce gdb_get_max_cpus
gdbstub: specialise target_memory_rw_debug
gdbstub: specialise handle_query_attached
gdbstub: abstract target specific details from gdb_put_packet_binary
gdbstub: rationalise signal mapping in softmmu
gdbstub: move chunks of user code into own files
...

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>

show more ...

gdbstub: move syscall handling to new file

Our GDB syscall support is the last chunk of code that needs target
specific support so move it to a new file. We take the opportunity to
move the syscall

gdbstub: move syscall handling to new file

Our GDB syscall support is the last chunk of code that needs target
specific support so move it to a new file. We take the opportunity to
move the syscall state into its own singleton instance and add in a
few helpers for the main gdbstub to interact with the module.

I also moved the gdb_exit() declaration into syscalls.h as it feels
pretty related and most of the callers of it treat it as such.

Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Alex Bennée <alex.bennee@linaro.org>

Message-Id: <20230302190846.2593720-22-alex.bennee@linaro.org>
Message-Id: <20230303025805.625589-22-richard.henderson@linaro.org>

show more ...

gdbstub: move register helpers into standalone include

These inline helpers are all used by target specific code so move them
out of the general header so we don't needlessly pollute the rest of
the

gdbstub: move register helpers into standalone include

These inline helpers are all used by target specific code so move them
out of the general header so we don't needlessly pollute the rest of
the API with target specific stuff.

Note we have to include cpu.h in semihosting as it was relying on a
side effect before.

Reviewed-by: Taylor Simpson <tsimpson@quicinc.com>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Alex Bennée <alex.bennee@linaro.org>

Message-Id: <20230302190846.2593720-21-alex.bennee@linaro.org>
Message-Id: <20230303025805.625589-21-richard.henderson@linaro.org>

show more ...

Merge tag 'mips-20220809' of https://github.com/philmd/qemu into staging

MIPS/SPARC patches queue

- target/mips: Handle lock_user failure in UHI_plog semihosting (Peter Maydell)
- hw/mips/malta: Tu

Merge tag 'mips-20220809' of https://github.com/philmd/qemu into staging

MIPS/SPARC patches queue

- target/mips: Handle lock_user failure in UHI_plog semihosting (Peter Maydell)
- hw/mips/malta: Turn off x86 specific features of PIIX4 PM (Igor Mammedov)
- hw/misc/grlib_ahb_apb_pnp: Support 8 and 16 bit accesses (Peter Maydell)

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# gpg: Signature made Mon 08 Aug 2022 03:29:23 PM PDT
# gpg: using RSA key FAABE75E12917221DCFD6BB2E3E32C2CDEADC0DE
# gpg: Good signature from "Philippe Mathieu-Daudé (F4BUG) <f4bug@amsat.org>" [full]

* tag 'mips-20220809' of https://github.com/philmd/qemu:
hw/misc/grlib_ahb_apb_pnp: Support 8 and 16 bit accesses
hw/mips/malta: turn off x86 specific features of PIIX4_PM
target/mips: Handle lock_user() failure in UHI_plog semihosting call

Signed-off-by: Richard Henderson <richard.henderson@linaro.org>

show more ...

target/mips: Handle lock_user() failure in UHI_plog semihosting call

Coverity notes that we forgot to check the error return from
lock_user() in one place in the handling of the UHI_plog semihosting

target/mips: Handle lock_user() failure in UHI_plog semihosting call

Coverity notes that we forgot to check the error return from
lock_user() in one place in the handling of the UHI_plog semihosting
call. Add the missing error handling.

report_fault() is rather brutal in that it will call abort(), but
this is the same error-handling used in the rest of this file.

Resolves: Coverity CID 1490684
Fixes: ea4210600db3c5 ("target/mips: Avoid qemu_semihosting_log_out for UHI_plog")
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Message-Id: <20220719191737.384744-1-peter.maydell@linaro.org>
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>

show more ...

Merge tag 'mips-20220712' of https://github.com/philmd/qemu into staging

MIPS patches queue

- Cavium Octeon MIPS extension and CPU model (Pavel Dovgalyuk)
- Semihosting cleanup (Richard Henderson)

Merge tag 'mips-20220712' of https://github.com/philmd/qemu into staging

MIPS patches queue

- Cavium Octeon MIPS extension and CPU model (Pavel Dovgalyuk)
- Semihosting cleanup (Richard Henderson)

# gpg: Signature made Tue 12 Jul 2022 21:52:52 BST
# gpg: using RSA key FAABE75E12917221DCFD6BB2E3E32C2CDEADC0DE
# gpg: Good signature from "Philippe Mathieu-Daudé (F4BUG) <f4bug@amsat.org>" [full]
# Primary key fingerprint: FAAB E75E 1291 7221 DCFD 6BB2 E3E3 2C2C DEAD C0DE

* tag 'mips-20220712' of https://github.com/philmd/qemu:
target/mips: Remove GET_TARGET_STRING and FREE_TARGET_STRING
target/mips: Simplify UHI_argnlen and UHI_argn
semihosting: Remove qemu_semihosting_log_out
target/mips: Use error_report for UHI_assert
target/mips: Avoid qemu_semihosting_log_out for UHI_plog
target/mips: Use semihosting/syscalls.h
target/mips: Drop link syscall from semihosting
target/mips: Create report_fault for semihosting
target/mips: introduce Cavium Octeon CPU model
target/mips: implement Octeon-specific arithmetic instructions
target/mips: implement Octeon-specific BBIT instructions
target/mips: introduce decodetree structure for Cavium Octeon extension

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>

show more ...

target/mips: Remove GET_TARGET_STRING and FREE_TARGET_STRING

Inline these macros into the only two callers.

Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Signed-off-by: Richard Henderson <r

target/mips: Remove GET_TARGET_STRING and FREE_TARGET_STRING

Inline these macros into the only two callers.

Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20220628111701.677216-9-richard.henderson@linaro.org>
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>

show more ...

target/mips: Simplify UHI_argnlen and UHI_argn

With semihosting_get_arg, we already have a check vs argc, so
there's no point replicating it -- just check the result vs NULL.
Merge copy_argn_to_targ

target/mips: Simplify UHI_argnlen and UHI_argn

With semihosting_get_arg, we already have a check vs argc, so
there's no point replicating it -- just check the result vs NULL.
Merge copy_argn_to_target into its caller.

Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Message-Id: <20220628111701.677216-8-richard.henderson@linaro.org>
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>

show more ...

target/mips: Use error_report for UHI_assert

Always log the assert locally. Do not report_fault, but
instead include the fact of the fault in the assertion.
Don't bother freeing allocated strings b

target/mips: Use error_report for UHI_assert

Always log the assert locally. Do not report_fault, but
instead include the fact of the fault in the assertion.
Don't bother freeing allocated strings before the abort().

Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Message-Id: <20220628111701.677216-6-richard.henderson@linaro.org>
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>

show more ...

target/mips: Avoid qemu_semihosting_log_out for UHI_plog

Use semihost_sys_write and/or qemu_semihosting_console_write
for implementing plog. When using gdbstub, copy the temp
string below the stack

target/mips: Avoid qemu_semihosting_log_out for UHI_plog

Use semihost_sys_write and/or qemu_semihosting_console_write
for implementing plog. When using gdbstub, copy the temp
string below the stack so that gdb has a guest address from
which to perform the log.

Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Message-Id: <20220628111701.677216-5-richard.henderson@linaro.org>
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>

show more ...

target/mips: Use semihosting/syscalls.h

This separates guest file descriptors from host file descriptors,
and utilizes shared infrastructure for integration with gdbstub.

Signed-off-by: Richard Hen

target/mips: Use semihosting/syscalls.h

This separates guest file descriptors from host file descriptors,
and utilizes shared infrastructure for integration with gdbstub.

Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Message-Id: <20220628111701.677216-4-richard.henderson@linaro.org>
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>

show more ...

target/mips: Drop link syscall from semihosting

We don't implement it with _WIN32 hosts, and the syscall
is missing from the gdb remote file i/o interface.
Since we can't implement it universally, d

target/mips: Drop link syscall from semihosting

We don't implement it with _WIN32 hosts, and the syscall
is missing from the gdb remote file i/o interface.
Since we can't implement it universally, drop it.

Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Message-Id: <20220628111701.677216-3-richard.henderson@linaro.org>
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>

show more ...

target/mips: Create report_fault for semihosting

The UHI specification does not have an EFAULT value,
and further specifies that "undefined UHI operations
should not return control to the target".

target/mips: Create report_fault for semihosting

The UHI specification does not have an EFAULT value,
and further specifies that "undefined UHI operations
should not return control to the target".

So, log the error and abort.

Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Message-Id: <20220628111701.677216-2-richard.henderson@linaro.org>
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>

show more ...

Merge tag 'pull-semi-20220628' of https://gitlab.com/rth7680/qemu into staging

Semihosting syscall reorg:
* Split out semihosting/syscalls.c with common implementations.
* Reorg arm-compat-semi.

Merge tag 'pull-semi-20220628' of https://gitlab.com/rth7680/qemu into staging

Semihosting syscall reorg:
* Split out semihosting/syscalls.c with common implementations.
* Reorg arm-compat-semi.c to use syscalls.c.
* Minor prep cleanups to m68k, mips, nios2.

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# W3zUDd3bWah3fXw8XYgSzh/RCrC5E2gFFc1G1g+6SIVZ7pbgkre2rRk5WMmylCLd
# jf9pmyswrheaKumCoBxU/S4XDgxVpaf3khiIqdbo8A20MDGnK/SZUWsBwJLK3QB8
# SKKv8o1ovbnl/HykABaszCIkO/LIu6SX3LoK7pF2CujkgSuwEN3WW0DOml6+b3fU
# J7YeZg==
# =sTbM
# -----END PGP SIGNATURE-----
# gpg: Signature made Tue 28 Jun 2022 10:22:58 AM +0530
# gpg: using RSA key 7A481E78868B4DB6A85A05C064DF38E8AF7E215F
# gpg: issuer "richard.henderson@linaro.org"
# gpg: Good signature from "Richard Henderson <richard.henderson@linaro.org>" [ultimate]

* tag 'pull-semi-20220628' of https://gitlab.com/rth7680/qemu: (60 commits)
target/nios2: Move nios2-semi.c to nios2_softmmu_ss
target/nios2: Eliminate nios2_semi_is_lseek
target/mips: Drop pread and pwrite syscalls from semihosting
target/mips: Add UHI errno values
target/mips: Use an exception for semihosting
target/m68k: Make semihosting system only
target/m68k: Eliminate m68k_semi_is_fseek
semihosting: Create semihost_sys_poll_one
semihosting: Remove qemu_semihosting_console_outs
semihosting: Use console_out_gf for SYS_WRITE0
semihosting: Remove qemu_semihosting_console_outc
semihosting: Use console_out_gf for SYS_WRITEC
semihosting: Use console_in_gf for SYS_READC
semihosting: Create qemu_semihosting_guestfd_init
semihosting: Add GuestFDConsole
semihosting: Create qemu_semihosting_console_write
semihosting: Cleanup chardev init
semihosting: Expand qemu_semihosting_console_inc to read
semihosting: Pass CPUState to qemu_semihosting_console_inc
semihosting: Fix docs comment for qemu_semihosting_console_inc
...

Signed-off-by: Richard Henderson <richard.henderson@linaro.org>

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target/mips: Drop pread and pwrite syscalls from semihosting

We don't implement it with _WIN32 hosts, and the syscalls
are missing from the gdb remote file i/o interface.
Since we can't implement th

target/mips: Drop pread and pwrite syscalls from semihosting

We don't implement it with _WIN32 hosts, and the syscalls
are missing from the gdb remote file i/o interface.
Since we can't implement them universally, drop them.

Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>

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target/mips: Add UHI errno values

From the Unified Hosting Interface, MD01069 Reference Manual,
version 1.1.6, 06 July 2015.

Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Signed-off-by: Ric

target/mips: Add UHI errno values

From the Unified Hosting Interface, MD01069 Reference Manual,
version 1.1.6, 06 July 2015.

Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>

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target/mips: Use an exception for semihosting

Within do_interrupt, we hold the iothread lock, which
is required for Chardev access for the console, and for
the round trip for use_gdb_syscalls().

Re

target/mips: Use an exception for semihosting

Within do_interrupt, we hold the iothread lock, which
is required for Chardev access for the console, and for
the round trip for use_gdb_syscalls().

Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>

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semihosting: Move exec/softmmu-semi.h to semihosting/softmmu-uaccess.h

We have a subdirectory for semihosting; move this file out of exec.
Rename to emphasize the contents are a replacement for the

semihosting: Move exec/softmmu-semi.h to semihosting/softmmu-uaccess.h

We have a subdirectory for semihosting; move this file out of exec.
Rename to emphasize the contents are a replacement for the functions
in linux-user/bsd-user uaccess.c.

Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>

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Merge remote-tracking branch 'remotes/philmd/tags/mips-20210711' into staging

MIPS patches queue

- Rename Raven ASIC PCI bridge, add PCI_IO_BASE_ADDR definition
- Various Toshiba TX79 opcodes imple

Merge remote-tracking branch 'remotes/philmd/tags/mips-20210711' into staging

MIPS patches queue

- Rename Raven ASIC PCI bridge, add PCI_IO_BASE_ADDR definition
- Various Toshiba TX79 opcodes implemented
- Rewrite UHI errno_mips() using switch statement
- Few fixes and improvements in the SONIC model (dp8393x)

# gpg: Signature made Sun 11 Jul 2021 22:12:49 BST
# gpg: using RSA key FAABE75E12917221DCFD6BB2E3E32C2CDEADC0DE
# gpg: Good signature from "Philippe Mathieu-Daudé (F4BUG) <f4bug@amsat.org>" [full]
# Primary key fingerprint: FAAB E75E 1291 7221 DCFD 6BB2 E3E3 2C2C DEAD C0DE

* remotes/philmd/tags/mips-20210711:
dp8393x: don't force 32-bit register access
dp8393x: Rewrite dp8393x_get() / dp8393x_put()
dp8393x: Store CAM registers as 16-bit
dp8393x: Replace 0x40 magic value by SONIC_REG_COUNT definition
dp8393x: Replace address_space_rw(is_write=1) by address_space_write()
dp8393x: fix CAM descriptor entry index
target/mips: Rewrite UHI errno_mips() using switch statement
target/mips/tx79: Introduce SQ opcode (Store Quadword)
target/mips/tx79: Introduce LQ opcode (Load Quadword)
target/mips/tx79: Introduce PROT3W opcode (Parallel Rotate 3 Words)
target/mips/tx79: Introduce PPACW opcode (Parallel Pack to Word)
target/mips/tx79: Introduce PCGT* (Parallel Compare for Greater Than)
target/mips/tx79: Introduce PCEQ* opcodes (Parallel Compare for Equal)
target/mips/tx79: Introduce PEXTL[BHW] opcodes (Parallel Extend Lower)
target/mips/tx79: Introduce PEXTUW (Parallel Extend Upper from Word)
target/mips/tx79: Introduce PSUB* opcodes (Parallel Subtract)
target/mips/tx79: Introduce PAND/POR/PXOR/PNOR opcodes (parallel logic)
hw/pci-host/raven: Add PCI_IO_BASE_ADDR definition
hw/pci-host: Rename Raven ASIC PCI bridge as raven.c

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>

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target/mips: Rewrite UHI errno_mips() using switch statement

Linking on Haiku OS fails:

/boot/system/develop/tools/bin/../lib/gcc/x86_64-unknown-haiku/8.3.0/../../../../x86_64-unknown-haiku/bin/l

target/mips: Rewrite UHI errno_mips() using switch statement

Linking on Haiku OS fails:

/boot/system/develop/tools/bin/../lib/gcc/x86_64-unknown-haiku/8.3.0/../../../../x86_64-unknown-haiku/bin/ld:
error: libqemu-mips-softmmu.fa.p/target_mips_tcg_sysemu_mips-semi.c.o(.rodata) is too large (0xffff405a bytes)
/boot/system/develop/tools/bin/../lib/gcc/x86_64-unknown-haiku/8.3.0/../../../../x86_64-unknown-haiku/bin/ld:
final link failed: memory exhausted
collect2: error: ld returned 1 exit status

This is because the host_to_mips_errno[] uses errno as index,
for example:

static const uint16_t host_to_mips_errno[] = {
[ENAMETOOLONG] = 91,
...

and Haiku defines [*] ENAMETOOLONG as:

12 /* Error baselines */
13 #define B_GENERAL_ERROR_BASE INT_MIN
..
22 #define B_STORAGE_ERROR_BASE (B_GENERAL_ERROR_BASE + 0x6000)
...
106 #define B_NAME_TOO_LONG (B_STORAGE_ERROR_BASE + 4)
...
211 #define ENAMETOOLONG B_TO_POSIX_ERROR(B_NAME_TOO_LONG)

so the array ends up beeing indeed too big.

Since POSIX errno can't be use as indexes on Haiku,
rewrite errno_mips() using a switch statement.

[*] https://github.com/haiku/haiku/blob/r1beta3/headers/os/support/Errors.h#L130

Reported-by: Richard Zak <richard.j.zak@gmail.com>
Suggested-by: Thomas Huth <thuth@redhat.com>
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Reviewed-by: Thomas Huth <thuth@redhat.com>
Message-Id: <20210706130723.1178961-1-f4bug@amsat.org>

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Merge remote-tracking branch 'remotes/philmd/tags/mips-20210625' into staging

MIPS patches queue

Various fixes:
- Potential integer overflow (CID 1452921)
- Invalid emulation of nanoMIPS BPOSGE32 o

Merge remote-tracking branch 'remotes/philmd/tags/mips-20210625' into staging

MIPS patches queue

Various fixes:
- Potential integer overflow (CID 1452921)
- Invalid emulation of nanoMIPS BPOSGE32 opcode
- Missing exception when DINSV opcode used with DSP disabled
- Do not abort but emit exception for invalid BRANCH opcodes
- TCG temporary leaks

Housekeeping:
- Remove dead code / comments
- Restrict few files to TCG, declarations to sysemu
- Merge MSA32 and MSA64 decodetree definitions

# gpg: Signature made Fri 25 Jun 2021 10:22:20 BST
# gpg: using RSA key FAABE75E12917221DCFD6BB2E3E32C2CDEADC0DE
# gpg: Good signature from "Philippe Mathieu-Daudé (F4BUG) <f4bug@amsat.org>" [full]
# Primary key fingerprint: FAAB E75E 1291 7221 DCFD 6BB2 E3E3 2C2C DEAD C0DE

* remotes/philmd/tags/mips-20210625:
target/mips: Merge msa32/msa64 decodetree definitions
target/mips: Remove pointless gen_msa()
target/mips: Optimize regnames[] arrays
target/mips: Constify host_to_mips_errno[]
target/mips: fix emulation of nanoMIPS BPOSGE32 instruction
target/mips: Remove microMIPS BPOSGE32 / BPOSGE64 unuseful cases
target/mips: Remove SmartMIPS / MDMX unuseful comments
target/mips: Restrict some system specific declarations to sysemu
target/mips: Move translate.h to tcg/ sub directory
target/mips: Move TCG trace events to tcg/ sub directory
target/mips: Do not abort on invalid instruction
target/mips: Raise exception when DINSV opcode used with DSP disabled
target/mips: Fix more TCG temporary leaks in gen_pool32a5_nanomips_insn
target/mips: Fix TCG temporary leaks in gen_pool32a5_nanomips_insn()
target/mips: Fix potential integer overflow (CID 1452921)

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>

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