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/openbmc/u-boot/arch/arm/dts/
H A Dast2600.dtsi1 // SPDX-License-Identifier: GPL-2.0+
2 #include <dt-bindings/interrupt-controller/arm-gic.h>
3 #include <dt-bindings/gpio/aspeed-gpio.h>
8 compatible = "aspeed,ast2600";
9 #address-cells = <1>;
10 #size-cells = <1>;
11 interrupt-parent = <&gic>;
46 #address-cells = <1>;
47 #size-cells = <0>;
48 enable-method = "aspeed,ast2600-smp";
[all …]
H A Dast2600-u-boot.dtsi1 #include <dt-bindings/clock/ast2600-clock.h>
2 #include <dt-bindings/reset/ast2600-reset.h>
4 #include "ast2600.dtsi"
7 scu: clock-controller@1e6e2000 { label
8 compatible = "aspeed,ast2600-scu";
10 u-boot,dm-pre-reloc;
11 #clock-cells = <1>;
12 #reset-cells = <1>;
13 uart-clk-source = <0x0>; /* uart clock source selection: 0: uxclk 1: huxclk*/
16 rst: reset-controller {
[all …]
H A Dast2600-ampere.dts1 // SPDX-License-Identifier: GPL-2.0+
3 /dts-v1/;
5 #include "ast2600-u-boot.dtsi"
8 model = "AST2600 Ampere BMC";
9 compatible = "aspeed,ast2600-ampere", "aspeed,ast2600";
17 stdout-path = &uart5;
27 clock-frequency = <800000000>;
30 clock-frequency = <800000000>;
36 u-boot,dm-pre-reloc;
41 clock-frequency = <400000000>;
[all …]
H A Dast2600-qcom-dc-scm-v1.dts1 // SPDX-License-Identifier: GPL-2.0-or-later
2 // Copyright (c) 2021-2022 Qualcomm Innovation Center, Inc. All rights reserved.
3 /dts-v1/;
5 #include "ast2600-u-boot.dtsi"
8 model = "Qualcomm DC-SCM V1 BMC";
9 compatible = "qcom,dc-scm-v1-bmc", "aspeed,ast2600";
17 stdout-path = &uart5;
28 clock-frequency = <800000000>;
31 clock-frequency = <800000000>;
37 u-boot,dm-pre-reloc;
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H A Dast2600-greatlakes.dts1 // SPDX-License-Identifier: GPL-2.0+
3 /dts-v1/;
5 #include "ast2600-u-boot.dtsi"
9 compatible = "facebook,greatlakes-bmc", "aspeed,ast2600";
17 stdout-path = &uart5;
27 clock-frequency = <800000000>;
30 clock-frequency = <800000000>;
36 u-boot,dm-pre-reloc;
41 clock-frequency = <400000000>;
58 pinctrl-names = "default";
[all …]
H A Dast2600-s6q.dts1 // SPDX-License-Identifier: GPL-2.0+
3 /dts-v1/;
5 #include "ast2600-u-boot.dtsi"
9 compatible = "quanta,s6q-bmc", "aspeed,ast2600";
17 stdout-path = &uart5;
29 clock-frequency = <800000000>;
32 clock-frequency = <800000000>;
38 u-boot,dm-pre-reloc;
43 clock-frequency = <400000000>;
47 u-boot,dm-pre-reloc;
[all …]
H A Dast2600-pfr.dts1 // SPDX-License-Identifier: GPL-2.0-or-later
2 /dts-v1/;
4 #include "ast2600-u-boot.dtsi"
7 model = "AST2600 EVB";
8 compatible = "aspeed,ast2600-evb", "aspeed,ast2600";
16 stdout-path = &uart5;
34 clock-frequency = <800000000>;
37 clock-frequency = <800000000>;
43 u-boot,dm-pre-reloc;
48 clock-frequency = <400000000>;
[all …]
H A Dast2600-intel.dts1 // SPDX-License-Identifier: GPL-2.0+
2 /dts-v1/;
4 #include "ast2600-u-boot.dtsi"
7 model = "AST2600 Intel EGS server board";
8 compatible = "aspeed,ast2600-intel", "aspeed,ast2600";
16 stdout-path = &uart5;
34 clock-frequency = <1200000000>;
37 clock-frequency = <1200000000>;
43 u-boot,dm-pre-reloc;
48 clock-frequency = <400000000>;
[all …]
H A Dast2600-evb.dts1 /dts-v1/;
3 #include "ast2600-u-boot.dtsi"
6 model = "AST2600 EVB";
7 compatible = "aspeed,ast2600-evb", "aspeed,ast2600";
15 stdout-path = &uart5;
33 clock-frequency = <800000000>;
36 clock-frequency = <800000000>;
42 u-boot,dm-pre-reloc;
47 clock-frequency = <400000000>;
64 pinctrl-names = "default";
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/openbmc/linux/Documentation/devicetree/bindings/soc/aspeed/
H A Dxdma.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Eddie James <eajames@linux.ibm.com>
13 This binding describes the XDMA Engine embedded in the AST2500 and AST2600
20 - aspeed,ast2500-xdma
21 - aspeed,ast2600-xdma
33 reset-names:
35 - const: device
36 - const: root-complex
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/openbmc/linux/Documentation/devicetree/bindings/interrupt-controller/
H A Daspeed,ast2xxx-scu-ic.txt1 Aspeed AST25XX and AST26XX SCU Interrupt Controller
4 - #interrupt-cells : must be 1
5 - compatible : must be "aspeed,ast2500-scu-ic",
6 "aspeed,ast2600-scu-ic0" or
7 "aspeed,ast2600-scu-ic1"
8 - interrupts : interrupt from the parent controller
9 - interrupt-controller : indicates that the controller receives and
17 scu_ic: interrupt-controller@18 {
18 #interrupt-cells = <1>;
19 compatible = "aspeed,ast2500-scu-ic";
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/openbmc/linux/Documentation/devicetree/bindings/mfd/
H A Daspeed,ast2x00-scu.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/mfd/aspeed,ast2x00-scu.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
14 - Joel Stanley <joel@jms.id.au>
15 - Andrew Jeffery <andrew@aj.id.au>
20 - enum:
21 - aspeed,ast2400-scu
22 - aspeed,ast2500-scu
23 - aspeed,ast2600-scu
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/openbmc/u-boot/drivers/reset/aspeed/
H A Dreset-ast2600.c1 // SPDX-License-Identifier: GPL-2.0
10 #include <reset-uclass.h>
18 struct ast2600_scu *scu; member
23 struct ast2600_reset_priv *priv = dev_get_priv(reset_ctl->dev); in ast2600_reset_deassert()
24 struct ast2600_scu *scu = priv->scu; in ast2600_reset_deassert() local
26 debug("ast2600_reset_assert reset_ctl->id %ld \n", reset_ctl->id); in ast2600_reset_deassert()
28 if(reset_ctl->id >= 32) in ast2600_reset_deassert()
29 writel(BIT(reset_ctl->id - 32), &scu->sysreset_clr_ctrl2); in ast2600_reset_deassert()
31 writel(BIT(reset_ctl->id), &scu->sysreset_clr_ctrl1); in ast2600_reset_deassert()
38 struct ast2600_reset_priv *priv = dev_get_priv(reset_ctl->dev); in ast2600_reset_assert()
[all …]
/openbmc/linux/drivers/soc/aspeed/
H A Daspeed-lpc-ctrl.c1 // SPDX-License-Identifier: GPL-2.0-or-later
17 #include <linux/aspeed-lpc-ctrl.h>
19 #define DEVICE_NAME "aspeed-lpc-ctrl"
40 struct regmap *scu; member
45 return container_of(file->private_data, struct aspeed_lpc_ctrl, in file_aspeed_lpc_ctrl()
52 unsigned long vsize = vma->vm_end - vma->vm_start; in aspeed_lpc_ctrl_mmap()
53 pgprot_t prot = vma->vm_page_prot; in aspeed_lpc_ctrl_mmap()
55 if (vma->vm_pgoff + vma_pages(vma) > lpc_ctrl->mem_size >> PAGE_SHIFT) in aspeed_lpc_ctrl_mmap()
56 return -EINVAL; in aspeed_lpc_ctrl_mmap()
61 if (remap_pfn_range(vma, vma->vm_start, in aspeed_lpc_ctrl_mmap()
[all …]
/openbmc/linux/Documentation/devicetree/bindings/pinctrl/
H A Daspeed,ast2600-pinctrl.yaml1 # SPDX-License-Identifier: GPL-2.0+
3 ---
4 $id: http://devicetree.org/schemas/pinctrl/aspeed,ast2600-pinctrl.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: ASPEED AST2600 Pin Controller
10 - Andrew Jeffery <andrew@aj.id.au>
16 - compatible: Should be one of the following:
17 "aspeed,ast2600-scu", "syscon", "simple-mfd"
29 const: aspeed,ast2600-pinctrl
32 $ref: pinmux-node.yaml#
[all …]
/openbmc/linux/drivers/irqchip/
H A Dirq-aspeed-scu-ic.c1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * Aspeed AST24XX, AST25XX, and AST26XX SCU Interrupt Controller
42 struct regmap *scu; member
55 unsigned int mask = scu_ic->irq_enable << ASPEED_SCU_IC_STATUS_SHIFT; in aspeed_scu_ic_irq_handler()
60 * The SCU IC has just one register to control its operation and read in aspeed_scu_ic_irq_handler()
69 regmap_read(scu_ic->scu, scu_ic->reg, &sts); in aspeed_scu_ic_irq_handler()
70 enabled = sts & scu_ic->irq_enable; in aspeed_scu_ic_irq_handler()
73 bit = scu_ic->irq_shift; in aspeed_scu_ic_irq_handler()
74 max = scu_ic->num_irqs + bit; in aspeed_scu_ic_irq_handler()
77 generic_handle_domain_irq(scu_ic->irq_domain, in aspeed_scu_ic_irq_handler()
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/openbmc/linux/Documentation/devicetree/bindings/spi/
H A Daspeed,ast2600-fmc.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/spi/aspeed,ast2600-fmc.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Chin-Ting Kuo <chin-ting_kuo@aspeedtech.com>
11 - Cédric Le Goater <clg@kaod.org>
15 SPI) of the AST2400, AST2500 and AST2600 SOCs.
18 - $ref: spi-controller.yaml#
23 - aspeed,ast2600-fmc
24 - aspeed,ast2600-spi
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/openbmc/u-boot/drivers/clk/aspeed/
H A Dclk_ast2600.c1 // SPDX-License-Identifier: GPL-2.0
10 #include <clk-uclass.h>
15 #include <dt-bindings/clock/ast2600-clock.h>
16 #include <dt-bindings/reset/ast2600-reset.h>
19 * SCU 80 & 90 clock stop control for MAC controllers
87 * SCU 320 & 330 Frequency counters
134 * For H-PLL and M-PLL the formula is
136 * M - Numerator
137 * N - Denumerator
138 * P - Post Divider
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/openbmc/linux/arch/arm/boot/dts/aspeed/
H A Daspeed-g6.dtsi1 // SPDX-License-Identifier: GPL-2.0-or-later
4 #include <dt-bindings/interrupt-controller/arm-gic.h>
5 #include <dt-bindings/interrupt-controller/aspeed-scu-ic.h>
6 #include <dt-bindings/clock/ast2600-clock.h>
10 compatible = "aspeed,ast2600";
11 #address-cells = <1>;
12 #size-cells = <1>;
13 interrupt-parent = <&gic>;
47 #address-cells = <1>;
48 #size-cells = <0>;
[all …]
/openbmc/qemu/hw/arm/
H A Daspeed_ast2600.c4 * Copyright (c) 2016-2019, IBM Corporation.
7 * the COPYING file in the top-level directory.
15 #include "qemu/error-report.h"
19 #include "target/arm/cpu-qom.h"
96 /* Shared Peripheral Interrupt values below are offset by -32 from datasheet */
138 [ASPEED_DEV_I2C] = 110, /* 110 -> 125 */
139 [ASPEED_DEV_PCIE] = 167, /* 167 -> 168 */
146 [ASPEED_DEV_KCS] = 138, /* 138 -> 142 */
150 [ASPEED_DEV_I3C] = 102, /* 102 -> 107 */
158 return qdev_get_gpio_in(DEVICE(&a->a7mpcore), sc->irqmap[dev]); in aspeed_soc_ast2600_get_irq()
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/openbmc/qemu/docs/system/arm/
H A Daspeed.rst1 …-evb``, ``ast2600-evb``, ``ast2700-evb``, ``bletchley-bmc``, ``fuji-bmc``, ``fby35-bmc``, ``fp5280…
6 Aspeed SoC : the AST2400 integrating an ARM926EJ-S CPU (400MHz), the
7 AST2500 with an ARM1176JZS CPU (800MHz), the AST2600
8 with dual cores ARM Cortex-A7 CPUs (1.2GHz) and more recently the AST2700
9 with quad cores ARM Cortex-A35 64 bits CPUs (1.6GHz)
16 - ``palmetto-bmc`` OpenPOWER Palmetto POWER8 BMC
17 - ``quanta-q71l-bmc`` OpenBMC Quanta BMC
18 - ``supermicrox11-bmc`` Supermicro X11 BMC (ARM926EJ-S)
19 - ``supermicrox11spi-bmc`` Supermicro X11 SPI BMC (ARM1176)
23 - ``ast2500-evb`` Aspeed AST2500 Evaluation board
[all …]
/openbmc/qemu/include/hw/watchdog/
H A Dwdt_aspeed.h4 * Copyright (C) 2016-2017 IBM Corp.
7 * COPYING file in the top-level directory.
19 #define TYPE_ASPEED_2400_WDT TYPE_ASPEED_WDT "-ast2400"
20 #define TYPE_ASPEED_2500_WDT TYPE_ASPEED_WDT "-ast2500"
21 #define TYPE_ASPEED_2600_WDT TYPE_ASPEED_WDT "-ast2600"
22 #define TYPE_ASPEED_2700_WDT TYPE_ASPEED_WDT "-ast2700"
23 #define TYPE_ASPEED_1030_WDT TYPE_ASPEED_WDT "-ast1030"
37 AspeedSCUState *scu; member
/openbmc/linux/drivers/iio/adc/
H A Daspeed_adc.c1 // SPDX-License-Identifier: GPL-2.0-only
11 * Ast2600:
16 #include <linux/clk-provider.h>
179 struct regmap *scu; in aspeed_adc_set_trim_data() local
185 dev_warn(data->dev, "Couldn't find syscon node\n"); in aspeed_adc_set_trim_data()
186 return -EOPNOTSUPP; in aspeed_adc_set_trim_data()
188 scu = syscon_node_to_regmap(syscon); in aspeed_adc_set_trim_data()
190 if (IS_ERR(scu)) { in aspeed_adc_set_trim_data()
191 dev_warn(data->dev, "Failed to get syscon regmap\n"); in aspeed_adc_set_trim_data()
192 return -EOPNOTSUPP; in aspeed_adc_set_trim_data()
[all …]
/openbmc/linux/drivers/gpu/drm/aspeed/
H A Daspeed_gfx_drv.c1 // SPDX-License-Identifier: GPL-2.0+
5 #include <linux/dma-mapping.h>
61 u32 dac_reg; /* DAC register in SCU */
63 u32 vga_scratch_reg; /* VGA scratch register in SCU */
93 { .compatible = "aspeed,ast2400-gfx", .data = &ast2400_config },
94 { .compatible = "aspeed,ast2500-gfx", .data = &ast2500_config },
95 { .compatible = "aspeed,ast2600-gfx", .data = &ast2600_config },
114 drm->mode_config.min_width = 0; in aspeed_gfx_setup_mode_config()
115 drm->mode_config.min_height = 0; in aspeed_gfx_setup_mode_config()
116 drm->mode_config.max_width = 800; in aspeed_gfx_setup_mode_config()
[all …]
/openbmc/u-boot/drivers/ram/aspeed/
H A Dsdram_ast2600.c1 // SPDX-License-Identifier: GPL-2.0
19 #include <dt-bindings/clock/ast2600-clock.h>
24 /* in order to speed up DRAM init time, write pre-defined values to registers
38 /* bit-field of AST_SCU_HW_STRAP */
42 /* bit-field of AST_SCU_EFUSE_DATA */
45 /* bit-field of AST_SCU_HANDSHAKE */
54 /* bit-field of AST_SCU_MPLL */
88 * MR01[26:24] - ODT configuration (DRAM side)
118 /* mode register setting for real chip are derived from the model GDDR4-1600 */
134 * tRFI in MCR0C = floor(tRFI * 12.5M) - margin
[all …]

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