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Searched refs:phydev_warn (Results 1 – 19 of 19) sorted by relevance

/openbmc/linux/drivers/net/phy/
H A Dmicrochip.c95 phydev_warn(phydev, "Failed to get current page\n"); in lan88xx_TR_reg_set()
105 phydev_warn(phydev, "Failed to write TR low data\n"); in lan88xx_TR_reg_set()
112 phydev_warn(phydev, "Failed to write TR high data\n"); in lan88xx_TR_reg_set()
122 phydev_warn(phydev, "Failed to write data in reg\n"); in lan88xx_TR_reg_set()
129 phydev_warn(phydev, "TR Register[0x%X] configuration failed\n", in lan88xx_TR_reg_set()
145 phydev_warn(phydev, "Failed to Set Register[0x0F82]\n"); in lan88xx_config_TR_regs()
153 phydev_warn(phydev, "Failed to Set Register[0x168C]\n"); in lan88xx_config_TR_regs()
161 phydev_warn(phydev, "Failed to Set Register[0x17A2]\n"); in lan88xx_config_TR_regs()
170 phydev_warn(phydev, "Failed to Set Register[0x16A0]\n"); in lan88xx_config_TR_regs()
178 phydev_warn(phydev, "Failed to Set Register[0x16A6]\n"); in lan88xx_config_TR_regs()
[all …]
H A Dmotorcomm.c777 phydev_warn(phydev, "Unsupported value %d for %s using default (%u)\n", in ytphy_get_delay_reg_value()
1036 phydev_warn(phydev, "Freq err:%u\n", freq); in yt8521_probe()
1063 phydev_warn(phydev, "Freq err:%u\n", freq); in yt8521_probe()
1067 phydev_warn(phydev, "PHY id err\n"); in yt8521_probe()
1104 phydev_warn(phydev, "Freq err:%u\n", freq); in yt8531_probe()
1697 phydev_warn(phydev, "Modify TX_CLK_SEL err:%d\n", ret); in yt8531_link_change_notify()
1879 phydev_warn(phydev, "Unsupported Master/Slave mode\n"); in ytphy_setup_master_slave()
H A Dphy-c45.c96 phydev_warn(phydev, "Unsupported Master/Slave mode\n"); in genphy_c45_pma_baset1_setup_master_slave()
232 phydev_warn(phydev, "Unsupported Master/Slave mode\n"); in genphy_c45_baset1_an_config_aneg()
1456phydev_warn(phydev, "Not all supported or advertised EEE link modes were passed to the user space\… in genphy_c45_ethtool_get_eee()
1486 phydev_warn(phydev, "At least some EEE link modes are not supported.\n"); in genphy_c45_ethtool_set_eee()
H A Dnxp-c45-tja11xx.c696 phydev_warn(priv->phydev, in nxp_c45_process_txts()
792 phydev_warn(phydev, "The period can be set only to 1 second."); in nxp_c45_perout_enable()
798phydev_warn(phydev, "The start time is not configurable. Should be set to 0 seconds and 0 nanoseco… in nxp_c45_perout_enable()
804 phydev_warn(phydev, "The phase can be set only to 0 or 500000000 nanoseconds."); in nxp_c45_perout_enable()
H A Dintel-xway.c193 phydev_warn(phydev, in xway_gphy_rgmii_init()
H A Ddp83640.c568 phydev_warn(phydev, in enable_status_frames()
575 phydev_warn(phydev, "failed to add mc address\n"); in enable_status_frames()
578 phydev_warn(phydev, "failed to delete mc address\n"); in enable_status_frames()
H A Dphy.c1331 phydev_warn(phydev, "Error %d requesting IRQ %d, falling back to polling\n", in phy_request_interrupt()
1336 phydev_warn(phydev, "Can't enable interrupt, falling back to polling\n"); in phy_request_interrupt()
H A Dmediatek-ge-soc.c689 phydev_warn(phydev, "TX-VCM SW cal result at low margin 0x%x\n", in tx_vcm_cal_sw()
694 phydev_warn(phydev, "TX-VCM SW cal result at high margin 0x%x\n", in tx_vcm_cal_sw()
H A Dmicrochip_t1.c827 phydev_warn(phydev, "Unsupported Master/Slave mode\n"); in lan87xx_config_aneg()
H A Dadin.c245 phydev_warn(phydev, in adin_get_reg_value()
H A Dphy-core.c492phydev_warn(phydev, "Downshift occurred from negotiated speed %s to actual speed %s, check cabling… in phy_check_downshift()
H A Dnxp-tja11xx.c248 phydev_warn(phydev, "Unsupported Master/Slave mode\n"); in tja11xx_config_aneg()
H A Ddp83867.c508 phydev_warn(phydev, in dp83867_verify_rgmii_cfg()
H A Drealtek.c790 phydev_warn(phydev, "Unsupported Master/Slave mode\n"); in rtl9000a_config_aneg()
H A Dmarvell.c786 phydev_warn(phydev, "Fail to config marvell phy LED.\n"); in marvell_config_led()
1476 phydev_warn(phydev, "Fast Link Down detection requires EEE to be disabled!\n"); in m88e1540_set_fld()
H A Dphy_device.c2135 phydev_warn(phydev, "Unsupported Master/Slave mode\n"); in genphy_setup_master_slave()
H A Dmicrel.c1122 phydev_warn(phydev, in ksz9031_config_init()
/openbmc/linux/drivers/net/ethernet/realtek/
H A Dr8169_phy_config.c444 phydev_warn(phydev, "chipset not ready for firmware\n"); in rtl8168d_apply_firmware_cond()
/openbmc/linux/include/linux/
H A Dphy.h1786 #define phydev_warn(_phydev, format, args...) \ macro